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XTR300

www.ti.com

SBOS336C –JUNE 2005–REVISED JUNE 2011

Industrial Analog Current/Voltage

OUTPUT DRIVER

Check for Samples: XTR300

1

FEATURES

APPLICATIONS

2

•

USER-SELECTABLE: Voltage or Current

Output

+40V SUPPLY VOLTAGE

V_OUT: ±10V (up to ±17.5V at ±20V supply)

I_OUT: ±20mA (linear up to ±24mA)

SHORT- OR OPEN-CIRCUIT FAULT

INDICATOR PIN

•

PLC OUTPUT PROGRAMMABLE DRIVER

INDUSTRIAL CROSS-CONNECTORS

INDUSTRIAL HIGH-VOLTAGE I/O

3-WIRE-SENSOR CURRENT OR VOLTAGE

OUTPUT

•

±10V 2- AND 4-WIRE VOLTAGE OUTPUT

U.S. Patent Nos. 7,427,898, 7,425,848, and

7,449,873

Other Patents Pending

space

•

NO CURRENT SHUNT REQUIRED

OUTPUT DISABLE FOR SINGLE INPUT MODE

THERMAL PROTECTION

OVERCURRENT PROTECTION

SEPARATE DRIVER AND RECEIVER

CHANNELS

DESCRIPTION

The XTR300 is a complete output driver for industrial

and process control applications. The output can be

configured as current or voltage by the digital I/V

select pin. No external shunt resistor is required. Only

•

DESIGNED FOR TESTABILITY

C_C

external gain-setting resistors and

compensation capacitor are required.

a

loop

V-

XTR300 V+

The separate driver and receiver channels provide

flexibility. The Instrumentation Amplifier (IA) can be

used for remote voltage sense or as a high-voltage,

high-impedance measurement channel. In voltage

output mode, a copy of the output current is provided,

allowing calculation of load resistance.

Current Copy

IMON

R_IMON

I_COPY

1kW

I_DRV

Input Signal

V_IN

DRV

IA_IN+

OPA

(Optional)

SET

The digital output selection capability, together with

the error flags and monitor pins, make remote

configuration and troubleshooting possible. Fault

conditions on the output and on the IA input as well

as over-temperature conditions are indicated by the

error flags. The monitoring pins provide continuous

feedback about load power or impedance. For

additional protection, the maximum output current is

limited and thermal protection is provided.

R_OS

R_SET

I_IA

RG₁

RG₂

R_GAIN

Load

IA

GND1

V_REF

IA_IN-

IA_OUT

GND2

EF_CM

EF_LD

EF_OT

R_IA

OD

M1

M2

1kW

Digital

Control

Error

Flags

GND3

DGND

The XTR300 is specified over the −40°C to +85°C

industrial temperature range and for supply voltages

up to 40V.

Figure 1. XTR300 Basic Diagram

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION⁽¹⁾

PACKAGE

PRODUCT

PACKAGE-LEAD

DESIGNATOR

PACKAGE MARKING

XTR300

QFN-20 (5mm x 5mm)

RGW

XTR300

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the

device product folder at www.ti.com.

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

Over operating free-air temperature range (unless otherwise noted).

XTR300

UNIT

Supply Voltage, V_VSP

Signal Input Terminals:

Voltage⁽²⁾

+44

V

(V−) − 0.5 to (V+) + 0.5

V

Current⁽²⁾

±25

mA

DGND

Output Short-Circuit⁽³⁾

Operating Temperature

Storage Temperature

Junction Temperature

Electrostatic Discharge Ratings:

Human Body Model (HBM)

Charged Device Model (CDM)

Continuous

–55 to +125

+150

°C

2000

1000

V

(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may

degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond

those specified is not supported.

(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails must

be current limited. DRV pin allows a peak current of 50mA. See the Output Protection section in Applications Information.

(3) See the Driver Output Disable section in Applications Information for thermal protection.

2

XTR300

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SBOS336C –JUNE 2005–REVISED JUNE 2011

ELECTRICAL CHARACTERISTICS: VOLTAGE OUTPUT MODE

Boldface limits apply over the specified temperature range: T_A= –40°C to +85°C.

All specifications at T_A= +25°C, V_S= ±20V, R_LOAD= 800Ω, R_SET= 2kΩ, R_OS= 2kΩ, V_REF= 4V, R_GAIN= 10kΩ, Input Signal

Span 0V to 4V, and C_C= 100pF, unless otherwise noted.

XTR300

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

OFFSET VOLTAGE

Offset Voltage, RTI

V_OS

dV_OS/dT

PSRR

±0.4

±1.6

±0.2

±1.9

±6

mV

vs Temperature

μV/°C

μV/V

vs Power Supply

V_S= ±5V to ±22V

±10

INPUT VOLTAGE RANGE

Nominal Setup for ±10V Output

Input Voltage for Linear Operation

NOISE

See Figure 2

(V−) + 3V

(V+) − 3V

V

Voltage Noise, f = 0.1Hz to 10Hz, RTI

Voltage Noise Density, f = 1kHz, RTI

OUTPUT

3

μV_PP

e_n

40

nV/√Hz

Voltage Output Swing from Rail

Gain Nonlinearity

I_DRV≤ 15mA

(V−) +3

(V+) − 3

±0.1

±1

V

%FS

ppm/°C

%FS

ppm/°C

mΩ

±0.01

±0.1

±0.04

±0.2

7

vs Temperature

Gain Error

I_B

±0.1

±1

vs Temperature

Output Impedance, dV_DRV/dI_DRV

Output Leakage Current While Output Disabled

Short-Circuit Current

Pin OD = L⁽¹⁾

30

nA

I_SC

±15

±20

1

±24

mA

Capacitive Load Drive

C_LOAD

C_C= 10nF, R_C= 15⁽²⁾

μF

Rejection of Voltage Difference between GND1 and

GND2, RTO

130

dB

FREQUENCY RESPONSE

Bandwidth⁽³⁾

Slew Rate⁽²⁾

−3dB

SR

G = 5

300

1

kHz

V/μs

μs

SR

C_C= 10nF, C_L= 1μF, R_C= 15Ω

V_DRV= ±1V

0.015

8

Settling Time⁽²⁾⁽⁴⁾, 0.1%, Small Signal

Overload Recovery Time

50% Overdrive

12

μs

(1) Output leakage includes input bias current of INA.

(2) Refer to Driving Capacitive Loads section in Applications Information.

(3) Small signal with no capacitive load.

(4) 8μs plus number of chopping periods. See Applications Information, Internal Current Sources and Settling Time section.

3

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

ELECTRICAL CHARACTERISTICS: CURRENT OUTPUT MODE

Boldface limits apply over the specified temperature range: T_A= –40°C to +85°C.

All specifications at T_A= +25°C, V_S= ±20V, R_LOAD= 800Ω, R_SET= 2kΩ, R_OS= 2kΩ, V_REF= 4V, Input Signal Span 0 to 4V, and

C_C= 100pF, unless otherwise noted.

XTR300

PARAMETER

CONDITIONS

Output Current < 1μA

V_S= ±5V to ±22V

See Figure 3

MIN

TYP

MAX

UNIT

OFFSET VOLTAGE

Input Offset Voltage

V_OS

dV_OS/dT

PSRR

±0.4

±1.5

±0.2

±1.8

±6

mV

vs Temperature

μV/°C

μV/V

vs Power Supply

±10

INPUT VOLTAGE RANGE

Nominal Setup for ±20mA Output

Maximum Input Voltage for Linear Operation

NOISE

(V−) + 3V

(V+) − 3V

V

Voltage Noise, f = 0.1Hz to 10Hz, RTI

Voltage Noise Density, f = 1kHz, RTI

OUTPUT

3

μV_PP

e_n

33

nV/√Hz

Compliance Voltage Swing from Rail

I_DRV= ±24mA

dV_DRV= ±15V, dI_DRV= ±24mA

See Transfer Function in Figure 3

I_DRV= ±24mA

(V−) +3

(V+) − 3

V

Output Conductance (dI_DRV/dV_DRV

Transconductance

Gain Error

)

0.7

μA/V

±0.04

±3.6

±0.01

±1.5

0.6

±0.12

±10

±0.1

±6

%FS

ppm/°C

%FS

ppm/°C

nA

vs Temperature

Linearity Error

I_DRV= ±24mA

I_B

I_DRV= ±24mA

vs Temperature

I_DRV= ±24mA

Output Leakage Current While Output Disabled

Pin OD = L

Short-Circuit Current

I_SC

±24.5

±32

1

±38.5

mA

Capacitive Load Drive⁽¹⁾⁽²⁾

FREQUENCY RESPONSE

Bandwidth

Slew Rate⁽²⁾

Settling Time⁽²⁾⁽³⁾, 0.1%, Small Signal

C_LOAD

μF

−3dB

160

1.3

8

kHz

mA/μs

μs

SR

I_DRV= ±2mA

Overload Recovery Time

C_LOAD= 0, 50% Overdrive

1

μs

(1) Refer to Driving Capacitive Loads section in Applications Information.

(2) With capacitive load, the slew rate can be limited by the short circuit current and the load error flag can trigger during slewing.

(3) 8μs plus number of chopping periods. See Applications Information, Internal Current Sources and Settling Time section.

4

XTR300

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SBOS336C –JUNE 2005–REVISED JUNE 2011

ELECTRICAL CHARACTERISTICS: OPERATIONAL AMPLIFIER (OPA)

Boldface limits apply over the specified temperature range: T_A= –40°C to +85°C.

All specifications at T_A= +25°C, V_S= ±20V, and R_LOAD= 800Ω, unless otherwise noted.

XTR300

TYP

PARAMETER

CONDITIONS

I_DRV= 0A

MIN

MAX

±1.8

UNIT

OFFSET VOLTAGE

Offset Voltage, RTI

Drift

V_OS

dV_OS/dT

PSRR

±0.4

±1.5

±0.2

mV

μV/°C

μV/V

vs Power Supply

V_S= ±5V to ±22V

±5

INPUT VOLTAGE RANGE

Common-Mode Voltage Range

Common-Mode Rejection Ratio

INPUT BIAS CURRENT

Input Bias Current

V_CM

(V−) + 3

(V+) − 3

V

CMRR

(V−) + 3V < V_CM< (V+) − 3V

100

126

dB

I_B

±20

±35

±10

nA

Input Offset Current

INPUT IMPEDANCE

Differential

I_OS

±0.3

10⁸|| 5

Ω || pF

Common-Mode

OPEN-LOOP GAIN

Open-Loop Voltage Gain

OUTPUT

A_OL

(V−) + 3V < V_DRV< (V+) − 3V , I_DRV= ±24mA

100

126

dB

Voltage Output Swing from Rail

Short-Circuit Current

I_DRV= ±24mA

M2 = High

M2 = Low

(V−) + 3

±25.5

±16

(V+) − 3

±38.5

±24

V

I_LIMIT

±32

±20

mA

Output Leakage Current While Output

Disabled

I_{LEAK_DRV}

Pin OD = L

10

pA

FREQUENCY RESPONSE

Gain-Bandwidth Product

Slew Rate

GBW

SR

G = 1

2

1

MHz

V/μs

5

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

ELECTRICAL CHARACTERISTICS: INSTRUMENTATION AMPLIFIER (IA)

Boldface limits apply over the specified temperature range: T_A= –40°C to +85°C.

All specifications at T_A= +25°C, V_S= ±20V, R_IA= 2kΩ, and R_GAIN= 2kΩ, unless otherwise noted. See Figure 4.

XTR300

PARAMETER

CONDITIONS

I_DRV= 0A

MIN

TYP

MAX

UNIT

OFFSET VOLTAGE

Offset Voltage, RTI

vs Temperature

V_OS

dV_OS/dT

PSRR

±0.7

±2.4

±0.8

±2.7

±10

mV

μV/°C

μV/V

vs Power Supply

V_S= ±5V to ±22V

INPUT VOLTAGE RANGE

Input Voltage Range

Common-Mode Rejection Ratio

INPUT BIAS CURRENT

Input Bias Current

V_CM

(V−) + 3

(V+) − 3

V

CMRR

RTI

100

130

dB

I_B

±20

±1

±35

±10

nA

Input Offset Current

INPUT IMPEDANCE

Differential

I_OS

10⁵|| 5

Ω || pF

Common-Mode

TRANSCONDUCTANCE (Gain)

IA_OUT= 2 (IA_IN+− IA_IN−)/R_GAIN

IA_OUT= ±2.4mA, (V−) + 3V < V_IAOUT< (V+) −

Transconductance Error

±0.04

±0.1

%/FS

3V

vs Temperature

Linearity Error

±0.2

±0.01

±20

ppm/°C

%FS

nA

(V−) + 3V < V_IAOUT< (V+) − 3V

Input Bias Current to G1, G2

Input Offset Current to G1, G2⁽¹⁾

OUTPUT

±1

nA

Output Swing to the Rail

Output Impedance

IA_OUT= ±2.4mA

M2 = High

(V−) + 3

(V+) − 3

V

600

±7.2

±4.5

mΩ

mA

Short-Circuit Current

I_LIMIT

M2 = Low

FREQUENCY RESPONSE

Gain-Bandwidth Product

Slew Rate

GBW

SR

G = 1, R_GAIN= 10kΩ, R_IA= 5kΩ

1

MHz

V/μs

IA_OUT= ±40μA, R_GAIN= 10kΩ, R_IA= 5kΩ, C_L

=

Settling Time⁽²⁾, 0.1%

6

μs

100pF

Overload Recovery Time, 50%

R_GAIN= 10kΩ, R_IA= 15kΩ, C_L= 100pF

10

(1) See Typical Characteristics curve (Figure 7).

(2) 6μs plus number of chopping periods. See Applications Information, Internal Current Sources and Settling Time section.

6

XTR300

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SBOS336C –JUNE 2005–REVISED JUNE 2011

ELECTRICAL CHARACTERISTICS: CURRENT MONITOR

Boldface limits apply over the specified temperature range: T_A= –40°C to +85°C.

All specifications at T_A= +25°C and V_S= ±20V, unless otherwise noted. See Figure 4.

XTR300

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

OUTPUT

Offset Current

I_OS

dI_OS/dT

PSRR

I_DRV= 0A

±30

±0.05

±0.1

±100

nA

nA/°C

nA/V

V

Drift

vs Power Supply

Monitor Output Swing to the Rail

Monitor Output Impedance

MONITOR CURRENT GAIN

Current Gain Error

vs Temperature

Linearity Error

V_S= ±5V to ±22V

I_MON= ±2.4mA

I_MON= I_DRV/10

I_DRV= ±24mA

±10

(V−) + 3

(V+) − 3

200

MΩ

±0.04

±3.6

±0.12

±0.1

%FS

ppm/°C

%FS

±0.01

±1.5

vs Temperature

ppm/°C

ELECTRICAL CHARACTERISTICS

Boldface limits apply over the specified temperature range: T_A= –40°C to +85°C.

All specifications at T_A= +25°C and V_S= ±20V, unless otherwise noted. See Figure 4.

XTR300

TYP

PARAMETER

CONDITIONS

MIN

MAX

UNIT

POWER SUPPLY

Specified Voltage Range

Operating Voltage Range

Quiescent Current

V_S

I_Q

±5

±20

±22

2.3

2.8

V

I_DRV= IA_OUT= 0A

1.8

mA

Over Temperature

TEMPERATURE RANGE

Specified Temperature Range

Operating Temperature Range

Storage Temperature Range

Thermal Resistance

−40

−55

+85

+125⁽¹⁾

+125

°C

Junction-to-Case

θ_JC

θ_JA

15.2

38

°C/W

Junction-to-Ambient

THERMAL FLAG (EF_OT) Output

Alarm (EF_OTpin LOW)

Return to Normal Operation (EF_OTpin HIGH)

DIGITAL INPUTS (M1, M2, OD)

V_ILLow-Level Input Voltage

V_IHHigh-Level Input Voltage

Input Current

140

125

°C

≤ 0.8

> 1.4

±1

V

μA

DIGITAL OUTPUTS (EF_LD, EF_CM, EF_OT

)

I_OHHigh-Level Leakage Current (Open-Drain)

V_OLLow-Level Output Voltage

DIGITAL GROUND PIN

−1.2

0.8

μA

V

I_OL= 5mA

I_OL= 2.8mA

0.4

V

(V−) ≤ DGND ≤ (V+) − 7V

M1 = M2 = L, OD = H, All Digital Outputs H

Current Input

−25

μA

(1) EF_OTnot connected with OD.

7

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

FUNCTIONAL BLOCK DIAGRAMS

C_C

V-

XTR300 V+

Current Copy

I_MON

R_IMON

I_COPY

1kW

I_DRV

Input Signal

V_IN= 0V to 4.0V

GND3

V_IN

DRV

IA_IN+

OPA

SET

Transfer Function:

R_OS

R_SET

I_IA

R_GAIN

V_IN

V

_IN- V_REF

RG₁

RG₂

V_OUT

=

+

(

)

R_GAIN

Load

IA

2

R_SET

R_OS

V_REF= 4.0V

IA_IN-

IA_OUT

EF_CM

EF_LD

EF_OT

OD

M1

M2

H

L

Digital

Control

Error

Flags

DGND

DV_GND

GND2

GND1

Figure 2. Standard Circuit for Voltage Output Mode

C_C

V-

XTR300 V+

Current Copy

I_MON

I_COPY

I_DRV

Input Signal

V_IN= 0V to 4.0V

V_IN

DRV

IA_IN+

OPA

SET

Transfer Function:

V_IN

V_IN- V_REF

I_OUT= 10

+

R_OS

R_SET

(

I_IA

R_SET

R_OS

RG₁

RG₂

IA

V_REF= 4.0V

IA_IN-

IA_OUT

I_OUT

EF_CM

EF_LD

EF_OT

OD

M1

M2

H

Digital

Control

Error

L

H

Flags

DGND

GND1

GND2

Figure 3. Standard Circuit for Current Output Mode

8

XTR300

www.ti.com

SBOS336C –JUNE 2005–REVISED JUNE 2011

Feedback

Network

V-

Current Copy

I_COPY

XTR300 V+

I_MON

I_DRV

GND3

Input Signal

V_IN

DRV

IA_IN+

OPA

SET

R_SET

I_IA

RG₁

RG₂

R_GAIN

IA

GND1

IA_IN-

IA_OUT

EF_CM

EF_LD

EF_OT

OD

M1

M2

R_IA

H

Digital

Control

Error

Flags

DGND

GND3

Figure 4. Standard Circuit for Externally Configured Mode

9

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

PIN CONFIGURATIONS

RGW PACKAGE

QFN-20

(TOP VIEW)

20 19 18 17 16

1

2

3

4

5

15

V+

M2

M1

Exposed

Thermal

Die Pad

on

14

13

12

11

NC

DRV

NC

V-

V_IN

Underside

(must be

connected

to V-)

SET

I_MON

6

7

8

9

10

Pad

PIN ASSIGNMENTS

PIN NO.

NAME

FUNCTION

1

2

M2

M1

Mode Input

3

V_IN

Noninverting Signal Input

4

SET

I_MON

IA_OUT

IA_IN–

IA_IN+

RG1

RG2

V–

Input for Gain Setting; Inverting Input

Current Monitor Output

5

6

Instrumentation Amplifier Signal Output

Instrumentation Amplifier Inverting Input

Instrumentation Amplifier Noninverting Input

Instrumentation Amplifier Gain Resistor

Negative Power Supply

7

8

9

10

11

12

13

14

15

16

17

18

19

20

Pad

NC

No Internal Connection

DRV

NC

Operational Amplifier Output

No Internal Connection

V+

Positive Power Supply

DGND

EF_CM

EF_LD

EF_OT

OD

Ground for Digital I/O

Error Flag for Common-Mode Over-Range, Active Low

Error Flag for Load Error, Active Low

Error Flag for Over Temperature, Active Low

Output Disable, Disabled Low

Exposed Pad

Exposed thermal pad must be connected to V−

10

XTR300

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SBOS336C –JUNE 2005–REVISED JUNE 2011

TYPICAL CHARACTERISTICS

At T_A= +25°C and V+ = ±20V, unless otherwise noted.

QUIESCENT CURRENT vs TEMPERATURE

QUIESCENT CURRENT vs SUPPLY VOLTAGE

3.0

2.5

2.0

1.5

1.0

0.5

0

1.90

1.88

1.86

1.84

1.82

1.80

1.78

1.76

1.74

1.72

1.70

-50

-25

0

25

50

75

100

125

10

15

20

25

30

35

40

45

Temperature (°C)

Total Supply Voltage (V)

Figure 5.

Figure 6.

INPUT BIAS CURRENT vs TEMPERATURE

(V_IN, SET, IA_IN+, IA_IN−, RG1, RG2)

OPA OUTPUT SWING TO RAIL vs TEMPERATURE

0

-5

2.2

2.0

1.8

1.6

1.4

1.2

1.0

I_DRV= +24mA

I_DRV= -24mA

I_DRV= +20mA

-10

-15

-20

-25

-30

I_DRV= +10mA

I_DRV= -10mA

I_DRV= -20mA

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

Temperature (°C)

Figure 7.

Figure 8.

OPA GAIN AND PHASE vs FREQUENCY

IA GAIN AND PHASE vs FREQUENCY

80

60

0

180

160

140

120

100

80

0

R_GAIN= 10kW

-20

-45

-40

R_IA= 500kW

R_IA= 50kW

R_IA= 10kW

-60

40

-90

Phase

-80

-100

-120

-140

-160

-180

-200

20

-135

-180

-225

-270

60

0

40

R_IA= 5kW

R_IA= 1kW

Gain

20

-20

-40

Gain

Phase

0

-20

0.001 0.01 0.1

1

10 100 1k 10k 100k 1M 10M

Frequency (Hz)

1

10

100

1k

10k

100k

1M

10M

Frequency (Hz)

Figure 9.

Figure 10.

11

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

TYPICAL CHARACTERISTICS (continued)

At T_A= +25°C and V+ = ±20V, unless otherwise noted.

OPA CMRR AND PSRR vs FREQUENCY

IA CMRR AND PSRR vs FREQUENCY

160

140

120

100

80

140

120

PSRR+

100

PSRR-

80

PSRR-

60

CMRR

PSRR+

40

CMRR

20

0

1

10

100

1k

10k

100k

1

10

100

1k

10k

100k

Frequency (Hz)

Figure 11.

Figure 12.

SMALL−SIGNAL STEP RESPONSE

LARGE−SIGNAL STEP RESPONSE

CURRENT MODE

I_OUT= ±200mA

G = 8

I_OUT= ±20mA

G = 8

C_L= 100nF || R_L= 800W

C_C= 4.7nF

C_L= 100nF || R_L= 800W

C_C= 4.7nF

R_SET= 1kW

R_GAIN= 10kW

See Figure 3

R_GAIN= 10kW

See Figure 3

200ms/div

Figure 13.

Figure 14.

SMALL−SIGNAL STEP RESPONSE

LARGE−SIGNAL STEP RESPONSE

VOLTAGE MODE

G = 5

C_L= 100nF || R_L= 800W

C_C= 4.7nF

C_L= 100nF || R_L= 800W

C_C= 4.7nF

R_SET= 1kW

R_GAIN= 10kW

See Figure 2

R_GAIN= 10kW

See Figure 2

200ms/div

Figure 15.

Figure 16.

12

XTR300

www.ti.com

SBOS336C –JUNE 2005–REVISED JUNE 2011

TYPICAL CHARACTERISTICS (continued)

At T_A= +25°C and V+ = ±20V, unless otherwise noted.

INPUT−REFERRED NOISE SPECTRUM

INPUT−REFERRED 0.1Hz to 10Hz NOISE

VOLTAGE OUTPUT MODE

1M

G = 5

100k

10k

1k

100

10

1

1s/div

1

10

100

1k

10k

100k

Frequency (Hz)

Figure 17.

Figure 18.

INPUT−REFERRED NOISE SPECTRUM

INPUT−REFERRED 0.1Hz to 10Hz NOISE

CURRENT OUTPUT MODE

1M

100k

10k

1k

G = 10

100

10

1

1s/div

1

10

100

1k

10k

100k

Frequency (Hz)

Figure 19.

Figure 20.

IA INPUT−REFERRED NOISE SPECTRUM

IA INPUT−REFERRED 0.1Hz to 10Hz NOISE

1M

100k

10k

1k

G = 20

100

10

1

1s/div

1

10

100

1k

10k

100k

Frequency (Hz)

Figure 21.

Figure 22.

13

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

TYPICAL CHARACTERISTICS (continued)

At T_A= +25°C and V+ = ±20V, unless otherwise noted.

OPA OFFSET VOLTAGE DISTRIBUTION

IA OFFSET VOLTAGE DISTRIBUTION

18

30

25

20

15

10

5

16

14

12

10

8

6

4

2

0

Offset Voltage (mV)

Figure 23.

Figure 24.

OPA OFFSET VOLTAGE DRIFT DISTRIBUTION

IA OFFSET VOLTAGE DRIFT DISTRIBUTION

60

40

35

30

25

20

15

10

5

50

40

30

20

10

0

Offset Voltage Drift (mV/°C)

Figure 25.

Figure 26.

VOLTAGE MODE GAIN ERROR DISTRIBUTION

CURRENT MODE GAIN ERROR DISTRIBUTION

40

30

25

20

15

10

5

35

30

25

20

15

10

5

0

Gain Error (ppm)

Figure 27.

Figure 28.

14

XTR300

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SBOS336C –JUNE 2005–REVISED JUNE 2011

TYPICAL CHARACTERISTICS (continued)

At T_A= +25°C and V+ = ±20V, unless otherwise noted.

VOLTAGE MODE NONLINEARITY DISTRIBUTION

CURRENT MODE NONLINEARITY DISTRIBUTION

60

50

40

30

20

10

0

60

50

40

30

20

10

0

Nonlinearity (ppm)

Figure 29.

Figure 30.

VOLTAGE MODE GAIN ERROR DRIFT DISTRIBUTION

CURRENT MODE GAIN ERROR DRIFT DISTRIBUTION

70

60

50

40

30

20

10

0

50

40

30

20

10

0

Gain Error Drift (ppm/°C)

Figure 31.

Figure 32.

VOLTAGE MODE NONLINEARITY DRIFT DISTRIBUTION

CURRENT MODE NONLINEARITY DRIFT DISTRIBUTION

80

100

90

80

70

60

50

40

30

20

10

0

70

60

50

40

30

20

10

0

Nonlinearity Drift (ppm/°C)

Figure 33.

Figure 34.

15

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

TYPICAL CHARACTERISTICS (continued)

At T_A= +25°C and V+ = ±20V, unless otherwise noted.

POSITIVE CURRENT LIMIT vs TEMPERATURE

NEGATIVE CURRENT LIMIT vs TEMPERATURE

36

34

-16

-18

-20

-22

-24

-26

-28

-30

-32

-34

-36

Voltage Mode

32

Current Mode

30

28

26

24

Voltage Mode

22

20

18

16

Current Mode

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

Temperature (°C)

Figure 35.

Figure 36.

NONLINEARITY vs OUTPUT CURRENT

(±24mA End Point Calibration)

(±20mA End Point Calibration)

0.025

0

0.025

0

-55°C

+25°C

-55°C

-0.025

-0.050

-0.075

-0.100

-0.025

-0.050

-0.075

-0.100

+85°C

+125°C

+85°C

+125°C

-24 -20 -16 -12 -8 -4

0

4

8

12 16 20 24

-24 -20 -16 -12 -8 -4

0

4

8

12 16 20 24

Output Current (mA)

Figure 37.

Figure 38.

16

XTR300

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SBOS336C –JUNE 2005–REVISED JUNE 2011

APPLICATION INFORMATION

V-

GND

V+

C₂

100nF

C₃

100nF

C_C

47nF

GND1

Thermal

Pad⁽²⁾

V-

XTR300 V+

I_MON

Current Copy

I_MON

I_COPY

R₃

I_DRV

1kW

V_IN

R_C

External Load

S_IN

OS

15W

DRV

R_OS

OPA

2kW

C₄

100nF R₆

SET

2.2kW

IA_IN+

RG₁

RG₂

GND1

R_IMON

R_SET

C_LOAD

R_LOAD

1kW

2kW

I_IA

R_GAIN

C₅

SG

IA

R₇

10kW

10nF

GND1

2.2kW

IA_O

IA_IN-

IA_OUT

GND2

EF_CM

EF_LD

EF_OT

OD

M1

M2

R_IA

Logic Supply

Digital

Control

Error

1kW

(+2.7V to +5V)

Flags

(1)

DGND

GND3

Pull-up Resistors

(10kW)

GND4

(1) See the Electrical Characteristics and Digital Input and Output section for operating limits of DGND.

(2) Connect thermal pad to V−.

Figure 39. Standard Circuit Configuration

The following information should be considered during XTR300 circuit configuration:

space

•

R_Censures stability for unknown load conditions

and limits the current into the internal protection

diodes. C₄helps protect the device. Over-voltage

clamp diodes (standard 1N4002) might be

necessary to protect the output.

R₆, R₇, and C₅protect the IA.

R_LOADand C_LOADrepresent the load resistance

and load capacitance.

R_SETdefines the transfer gain. It can be split to

allow a signal offset and, therefore, allow a 5V

single-supply digital-to-analog converter (DAC) to

control a ±10V or ±20mA output signal.

•

Recommended bypassing: 100nF or more for

supply bypassing at each supply.

R_IMONcan be in the kΩ-range or short-circuited if

not used. Do not leave this current output

unconnected—it would saturate the internal

current source. The current at this I_MONoutput is

I_DRV/10. Therefore, V_IMON= R_IMON(I_DRV/10).

R₃is not required but can match R_SET(or

R_SET||R_OS) to compensate for the bias current.

R_IAcan be short-circuited if not used. Do not leave

this current output unconnected. R_GAINis selected

to 10kΩ to match the output of 10V with 20mA for

the equal input signal.

•

space

17

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

The XTR300 can be used with asymmetric supply voltages; however, the minimum negative supply voltage

should be equal to or more negative than −3V (typically −5V). This supply value ensures proper control of 0V and

0mA with wire resistance, ground offsets, and noise added to the output. For positive output signals, the current

requirement from this negative voltage source is less than 5mA.

GND1 through GND4 must be selected to fulfill specified operating ranges. DGND must be in the range of (V−) ≤

DGND ≤ (V+) −7V.

Built on a robust high-voltage BiCMOS process, the XTR300 is designed to interface the 5V or 3V supply domain

used for processors, signal converters, and amplifiers to the high-voltage and high-current industrial signal

environment. It is specified for up to ±20V supply, but can also be powered asymmetrically (for example, +24V

and −5V). It is designed to allow insertion of external circuit protection elements and drive large capacitive loads.

FUNCTIONAL FEATURES

The XTR300 provides two basic functional blocks: an instrumentation amplifier (IA) and a driver that is a unique

operational amplifier (OPA) for current or voltage output. This combination represents an analog output stage

which can be digitally configured to provide either current or voltage output to the same terminal pin.

Alternatively, it can be configured for independent measurement channels.

Three open collector error signals are provided to indicate output related errors such as over-current or

open-load (EF_LD) or exceeding the common-mode input range at the IA inputs (EF_CM). An over-temperature flag

(EF_OT) can be used to control output disable to protect the circuit. The monitor outputs (I_MONand IA_OUT) and the

error flags offer optimal testability during operation and configuration. The I_MONoutput represents the current

flowing into the load in voltage output mode, while the IA_OUTrepresents the voltage across the connectors in

current output mode. Both monitor outputs can be connected together when used in current or voltage output

mode because the monitor signals are multiplexed accordingly.

VOLTAGE OUTPUT MODE

In voltage output mode (M1 and M2 are connected low or left unconnected), the feedback loop through the IA

provides high impedance remote sensing of the voltage at the destination, compensating the resistance of a

protection circuit, switches, wiring, and connector resistance. The output of the IA is a current that is proportional

to the input voltage. This current is internally routed to the OPA summing junction through a multiplexer, as

shown in Figure 40.

A 1:10 copy of the output current of the OPA can be monitored at the I_MONpin. This output current and the

known output voltage can be used to calculate the load resistance or load power.

During an output short-circuit or an over-current condition the XTR300 output current is limited and EF_LD(load

error, active low) flag is activated.

18

XTR300

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SBOS336C –JUNE 2005–REVISED JUNE 2011

C_C

V-

Current Copy

I_COPY

XTR300 V+

I_MON

R_IMON

GND3

I_DRV

Input Signal

V_IN

DRV

IA_IN+

OPA

SET

R_SET

I_IA

RG₁

RG₂

R_GAIN

Load

IA

GND1

IA_IN-

IA_OUT

EF_CM

EF_LD

EF_OT

OD

M1

M2

GND2

Digital

Control

Error

L

Flags

L

DGND

Figure 40. Simplified Voltage Output Mode Configuration

Applications not requiring the remote sense feature can use the OPA in stand-alone operation (M1 = high). In

this case, the IA is available as a separate input channel.

The IA gain can be set by two resistors, R_GAINand R_SET

:

R_GAIN

V_OUT

=

V_IN

2R_SET

(1)

or when adding an offset, V_REF, to get bidirectional output with a single-ended input:

V_IN

V

_IN- V_REF

R_GAIN

2

+

V_OUT

=

(

R_SET

R_OS

(2)

The R_SETresistor is also used in current output mode. Therefore, it is useful to define R_SETfor the current mode,

then set the ratio between current and voltage span with R_GAIN

.

19

XTR300

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CURRENT OUTPUT MODE

The XTR300 does not require a shunt resistor for current control because it uses a precise current mirror

arrangement.

In current output mode (M1 connected low, or left unconnected and M2 connected high) a precise copy of 1/10th

of the output is internally routed back to the summing junction of the OPA through a multiplexer, closing the

control loop for the output current.

The OPA driver can deliver more than ±24mA within a wide output voltage range. An open-output condition or

high-impedance load that prevents the flow of the required current activates the EF_LDflag and the IA can become

overloaded and draw greater than 7mA saturation current.

While in current output mode, a current (I_IA) that is proportional to the voltage at the IA input is routed to IA_OUT

and can be used to monitor the load voltage. A resistor converts this current into voltage. This arrangement

makes level shifting easy.

Alternatively, the IA can be used as an independent monitoring channel. If this output is not used, connect it to

GND to maintain proper function of the monitor stage, as shown in Figure 41.

V-

XTR300 V+

Current Copy

I_MON

I_COPY

I_DRV

Input Signal

V_IN

DRV

IA_IN+

OPA

SET

R_SET

I_IA

RG₁

RG₂

R_GAIN

Load

IA

GND1

IA_IN-

IA_OUT

GND2

EF_CM

EF_LD

EF_OT

OD

M1

M2

R_IA

Digital

Control

Error

L

Flags

H

DGND

GND3

Figure 41. Simplified Current Output Mode Configuration

The transconductance (gain) can be set by the resistor, R_SET, according to the equation:

10

I_OUT

=

V_IN

R_SET

(3)

(4)

space

or when adding an offset V_REFto get bidirectional output with a single-ended input:

V_IN

V_IN- V_REF

+

I_OUT= 10

(

R_SET

R_OS

20

XTR300

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SBOS336C –JUNE 2005–REVISED JUNE 2011

INPUT SIGNAL CONNECTION

It is possible to drive the XTR300 with a unidirectional input signal and still get a bidirectional output by adding an

additional resistor, R_OS, and an offset voltage signal, V_REF. It can be a mid-point voltage or a signal to shift the

output voltage to a desired value.

This design is illustrated in Figure 42a, Figure 42b, and Figure 42c. As with a normal operational amplifier, there

are several options for offset-shift circuits. The input can be connected for inverting or noninverting gain. Unlike

many op amp input circuits, however, this configuration uses current feedback, which removes the voltage

relationship between the noninverting input and output potential because there is no feedback resistor.

a) Noninverting Input

XTR300

V_IN

(0 to V_OFFSET

)

OPA

V_REF

R_OS

R_SET

2kW

I_Feedback

b) Noninverting Input

XTR300

V_IN

( V_MIDSCALE

)

OPA

V_MIDSCALE

R_SET

1kW

I_Feedback

c) Inverting Input (V_REF= V_OFFSET

)

XTR300

V_OFFSET

OPA

V_IN

(±V_OFFSET

)

R_SET

1kW

I_Feedback

Figure 42. Circuit Options for Op Amp Output Level-Shifting

The input bias current effect on the offset voltage can be reduced by connecting a resistor in series with the

positive input that matches the approximate resistance at the negative input. This resistor placed close to the

input pin acts as a damping element and makes the design less sensitive to RF noise. See R₃in Figure 39.

21

XTR300

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EXTERNALLY-CONFIGURED MODE: OPA AND IA

It is possible to use the precision of the operational amplifier (OPA) and instrumentation amplifier (IA)

independently from each other by configuring the digital control pins (M1 high). In this mode, the IA output

current is routed to IA_OUTand the copy of the OPA output current is routed to I_MON, as shown in Figure 4.

This mode allows external configuration of the analog signal routing and feedback loop.

The current output IA has high input impedance, low offset voltage and drift, and very high common-mode

rejection ratio. An external resistor (R_IA) can be used to convert the output current of the IA (I_IA) to an output

voltage. The gain is given by:

2

2R_IA

I_IA=

V_INor V_IA=

V_IN

R_GAIN

(5)

The OPA provides low drift and high voltage output swing that can be used like a common operational amplifier

by connecting a feedback network around it. In this mode, the copy of the output current is available at the I_MON

pin (it includes the current into the feedback network). It provides an output current limit for protection, which can

be set between two ranges by M2. The error flag indicates an overcurrent condition, as well as indicating driving

the output into the supply rails.

Alternatively, the feedback can be closed through the I_MONpin to create a precise voltage-to-current converter.

DRIVER OUTPUT DISABLE

The OPA output (DRV) can be switched to a high-impedance mode by driving the OD control pin low. This input

can be connected to the over-temperature flag, EF_OT, and a pull-up resistor to protect the IC from

over-temperature by disconnecting the load.

The output disable mode can be used to sense and measure the voltage at the IA input pins without loading from

the DRV output. This mode allows testing of any voltage present at the I/O connector. However, consider the

bias current of the IA input pins.

The digital control inputs, M1 and M2, set the four operation modes of the XTR300 as shown in Table 1. When

M1 is asserted low, M2 determines voltage or current mode and the corresponding appropriate current limit (I_SC

)

setting. When M1 is high, the internal feedback connections are opened; IA_OUTand I_MONare both connected to

the output pins; and M2 only determines the current limit (I_SC) setting.

M1 and M2 are pulled low internally with 1μA. Terminate these two pins to avoid noise coupling. Output disable

(OD) is internally pulled high with approximately 1μA. When connecting OD to EF_OT, a 2.2kΩ pull-up resistor is

recommended.

Table 1. Summary of Configuration Modes⁽¹⁾

M1

L

M2

L

MODE

V_OUT

I_OUT

Ext

DESCRIPTION

Voltage Output Mode, I_SC= 20mA

Current Output Mode, I_SC= 32mA

IA and I_MONon ext. pins, I_SC= 20A

IA and I_MONon ext. pins, I_SC= 32mA

L

H

L

H

Ext

(1) OD is a control pin independent of M1 or M2.

22

XTR300

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SBOS336C –JUNE 2005–REVISED JUNE 2011

DRIVING CAPACITIVE LOADS AND LOOP COMPENSATION

For normal operation, the driver OPA and the IA are connected in a closed loop for voltage output. In current

output mode, the current copy closes the loop directly.

In current output mode, loop compensation is not critical, even for large capacitive loads. However, in voltage

output mode, the capacitive load, together with the source impedance and the impedance of the protection

circuit, generates additional phase lag. The IA input might also be protected by a low-pass filter that influences

phase in the closed loop.

The loop compensation low-pass filter consists of C_Cand the parallel resistance of R_OSand R_SET. For loop

stability with large capacitive load, the external phase shift has to be added to the OPA phase. With C_C, the

voltage gain of the OPA has to approach zero at the frequency where the total phase approaches 180° + 135°.

The best stability for large capacitive loads is provided by adding a small resistor, R_C(15Ω). See the Output

Protection section.

An empirical method of evaluation is using a square wave input signal and observing the settling after transients.

Use small signal amplitudes only—steep signal edges cause excessive current to flow into the capacitive load

and may activate the current limit, which hides or prevents oscillation. A small-signal oscillation can be hidden

from large capacitive loads, but observing the I_MONoutput on an appropriate resistor (use a similar value like

R_SET||R_OS) would indicate stability issues. Note that noise pulses at I_MONduring overload (EF_LDactive) are normal

and are caused by cycling of the current mirror.

The voltage output mode includes the IA in the loop. An additional low-pass filter in the input reverses the phase

and therefore increases the signal bandwidth of the loop, but also increases the delay. Again, loop stability has to

be observed. Overloading the IA disconnects the closed loop and the output voltage rails.

INTERNAL CURRENT SOURCES, SWITCHING NOISE, AND SETTLING TIME

The accuracy of the current output mode and the dc performance of the IA rely on dynamically-matched current

mirrors.

Identical current sources are rotated to average out mismatch errors. It can take several clock cycles of the

internal 100kHz oscillator (or a submultiple of that frequency) to reach full accuracy. This may dominate the

settling time to the 0.1% accuracy level and can be as much as 100μs in current output mode or 40μs in voltage

output mode.

A small portion of the switching glitches appear at the DRV output, and also at the I_MONand IA_MONoutputs. The

standard circuit configuration, with R_C, C₄, and C_C, which are required for loop compensation and output

protection, also helps reduce the noise to negligible levels at the signal output. If necessary, the monitor outputs

can be filtered with a shunt capacitor.

23

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

IA STRUCTURE, VOLTAGE MONITOR

The instrumentation amplifier has high-impedance NPN transistor inputs that do not load the output signal, which

is especially important in current output mode. The output signal is a controlled current that is multiplexed either

to the SET pin (to close the voltage output loop) or to IA_OUT(for external access).

The principal circuit is shown in Figure 43. The two input buffer amplifiers reproduce the input difference voltage

across R_GAIN. The resulting current through this resistor is bidirectionally mirrored to the output. That mirroring

results in the ideal transfer function of:

(IA_IN+– IA_IN-

)

I_IA= IA_OUT= 2

R_GAIN

(6)

The accuracy and drift of R_GAINdefines the accuracy of the voltage to current conversion. The high accuracy and

stability of the current mirrors result from a cycling chopper technique.

Current Mirror

I_R

IA_IN+

A1

Current Mirror

I_R

R_GAIN

I_R

2I_R

I_IA

A2

IA_IN-

2I_R

Current Mirror

Figure 43. IA Block Diagram

The output current, IA_OUT, of the instrumentation amplifier is limited to protect the internal circuitry. This current

limit has two settings controlled by the state of M2 (see Electrical Characteristics, Short-Circuit Current

specification). Note that if R_SETis too small, the current output limitation of the instrumentation amplifier can

disrupt the closed loop of the XTR300 in voltage output mode. With M2 = low, the nominal R_GAINof 10kΩ allows

an input voltage of 20V_PP, which produces an output current of 4mA_PP. When using lower resistors for R_GAINthat

can allow higher currents, the IA output current limitation must be taken into account.

CURRENT MONITOR

In current output mode (M2 = high), the XTR300 provides high output impedance. A precision current mirror

generates an exact 1/10th copy of the output current and this current is either routed to the summing junction of

the OPA to close the feedback loop (in the current output mode) or to the I_MONpin for output current monitoring in

other operating modes.

The high accuracy and stability of this current split results from a cycling chopper technique. This design

eliminates the need for a precise shunt resistor or a precise shunt voltage measurement, which would require

high common-mode rejection performance.

During a saturation condition of the DRV output (the error flag is active), the monitor output (I_MON) shows a

current peak because the loop opens. Glitches from the current mirror chopper appear during this time in the

monitor signal. This part of the signal cannot be used for measurement.

24

XTR300

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SBOS336C –JUNE 2005–REVISED JUNE 2011

ERROR FLAGS

The XTR300 is designed for testability of its proper function and allows observation of the conditions at the load

connection without disrupting service.

If the output signal is not in accordance to the transfer function, an error flag is activated (limited by the dynamic

response capabilities). These error flags are in addition to the monitor outputs, I_MONand IA_OUT, which allow the

momentary output current (in voltage mode) or output voltage (in current mode) to be read back.

This combination of error flag and monitor signal allows easy observation of the XTR300 for function and working

condition, providing the basis for not only remote control, but also for remote diagnosis.

All error flags of the XTR300 have open collector outputs with a weak pull-up of approximately 1μA to an internal

5V. External pull-up resistors to the logic voltage are required when driving 3V or 5V logic.

The output sink current should not exceed 5mA. This is just enough to directly drive optical-couplers, but a

current-limiting resistor is required.

There are three error flags:

•

IA Common-Mode Over-Range (EF_CM)—goes low as soon as the inputs of the IA reach the limits of the

linear operation for the input voltage. This flag shows noise from the saturated current mirrors which can be

filtered with a capacitor to GND.

•

Load Error (EF_LD)—indicates fault conditions driving voltage or current into the load. In voltage output mode

it monitors the voltage limits of the output swing and the current limit condition caused from short or low load

resistance. In current output mode it indicates a saturation into the supply rails from a high load resistance or

open load.

•

Over-Temperature Flag (EF_OT)—is a digital output that goes low if the chip temperature reaches a

temperature of +140°C and resets as soon as it cools down to +125°C. It does not automatically shut down

the output; it allows the user system to take action on the situation. If desired, this output can be connected to

output disable (OD) which disables the output and therefore removes the source of power. This connection

acts like an automatic shut down, but requires a 2.2kΩ external pull-up resistor to safely override the internal

current sources. The IA channel is not affected, which allows continuous observation of the voltage at the

output.

DIGITAL I/O AND GROUND CONSIDERATIONS

The XTR300 offers voltage output mode, current output mode, external configuration, and instrumentation mode

(voltage input). In addition, the internal feedback mode can be disconnected and external loop connections can

be made. These modes are controlled by M1 and M2 (see the function table). The OD input pin controls enable

or disable of the output stage (OD is active low).

The digital I/O is referenced to DGND and signals on this pin should remain within 5V of the DGND potential.

This DGND pin carries the output low-current (sink current) of the logic outputs. DGND can be connected to a

potential within the supply voltage but needs to be 8V below the positive supply. Proper connection avoids

current from the digital outputs flowing into the analog ground.

CAUTION

It is important to note that DGND has normally reverse-biased diodes connected to the

supply. Therefore, high and destructive currents could flow if DGND is driven beyond

the supply rails by more than a diode forward voltage. Avoid this condition during

power-on and power-off!

25

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

OUTPUT PROTECTION

The XTR300 is intended to operate in a harsh industrial environment. Therefore, a robust semiconductor process

was chosen for this design. However, some external protection is still required.

The instrumentation amplifier inputs can be protected by external resistors that limit current into the protection

cell behind the IC-pins, as shown in Figure 44. This cell conducts to the power-supply connection through a

diode as soon as the input voltage exceeds the supply voltage. The circuit configuration example shows how to

arrange these two external resistors.

The bias current is best cancelled if both resistors are equal. The additional capacitor reduces RF noise in the

input signal to the IA.

R₆

2.2kW

IA_IN+

V_SENSE+

RG₁

C₅

10nF

IA

R_GAIN

R₇

RG₂

IA_IN-

2.2kW

V_SENSE-

Figure 44. Current-Limiting Resistors

The load connection to the DRV output must be low impedance; therefore, external protection diodes may be

necessary to handle excessive currents, as shown in Figure 45. The internal protection diodes start to conduct

earlier than a normal external PN-type diode because they are affected by the higher die temperature. Therefore,

either Schottky diodes are required, or an additional resistor (R_C) can be placed in series with the input. An

example of this protection is shown in Figure 45. Assuming the standard diodes limit the voltage to 1.4V and the

internal diodes clamp at 0.7V, this resistor can limit the current into the internal protection diodes to 50mA:

(1.4V – 0.7V)

= 47mA

15W

(7)

R_Cis also part of the recommended loop compensation. C₄helps protect the output against RFI and high-voltage

spikes.

C_C

V+

47nF

D

XTR300

1N4002

R_C

15W

DRV

I/V OUT

OPA

D

C₄

100nF

1N4002

V-

Figure 45. Example for DRV Output Protection

26

XTR300

www.ti.com

SBOS336C –JUNE 2005–REVISED JUNE 2011

POWER ON/OFF GLITCH

When power is turned on or off, most analog amplifiers generate some glitching of the output because of internal

circuit thresholds and capacitive charges. Characteristics of the supply voltage, as well as its rise and fall time,

directly influence output glitches. Load resistance and capacitive load also affect the amplitude.

The output disable control (OD) cannot fully suppress glitches during power-on and power-off, but reduces the

energy significantly. The glitch consists of a small amount of current and capacitive charge (voltage) that reacts

with the resistive and capacitive load. The bias current of the IA inputs that are normally connected to the output

also generate a voltage across the load.

Figure 46 indicates no glitches when transitioning between disable and enable. This measurement is made with

a load resistance of 1kΩ and tested in the circuit configuration of Figure 39.

Output

0.5V/div

OD

2.0V/div

Time (10ms/div)

Figure 46. Output Signal During Toggle of OD

When power is off or with low supply, the output is diode clamped to the momentary supply voltage, but can float

while output disabled within those limits unless terminated. Only an external switch (relays or opto-relays) can

isolate the output under such conditions. Refer to Figure 47 for an illustration of this configuration. The same

consideration applies if low impedance zero output is required, even during power-off.

C_C

47 nF

V_{EN_OPTO}

0V to 5V

R_LED

5 k

XTR300

R_C

15

CPC1017N

+

–

S_OUT

DRV

4

3

1

2

OPA

C₄

100 nF

I_LED

0mA to 1 mA

R₆

2.2 k

IA_IN+

RG₁

+

–

R_GAIN

10 k

C₅

10 nF

IA

R₇

2.2 k

RG₂

IA_IN–

R_LOAD

1 k

Figure 47. Example for Opto-Relay Output Isolation

27

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

LAYOUT CONSIDERATIONS

Supply bypass capacitors should be close to the package and connected with low-impedance conductors. Avoid

noise coupled into R_GAIN, and observe wiring resistance. For thermal management, see the Package and Heat

Sinking section.

Layout for the XTR300 is not critical; however, its internal current chopping works best with good (low dynamic

impedance) supply decoupling. Therefore, avoid throughhole contacts in the connection to the bypass capacitors

or use multiple through-hole contacts. Switching noise from chopper-type power supplies should be filtered

enough to reduce influence on the circuit. Small resistors (2Ω, for example) or damping inductors in series with

the supply connection (between the dc/dc converter and the XTR circuit) act as a decoupling filter together with

the bypass capacitor, as shown in Figure 48.

Resistors connected close to the input pins help dampen environmental noise coupled into conductor traces.

Therefore, place the OPA input- and IA input-related resistors close to the package. Also, avoid additional wire

resistance in series to R_SET, R_OS, and R_GAIN(observe the reliability of the through-hole contacts), because this

resistance could produce gain and offset error as well as drift; 1Ω is already 0.1% of the 1kΩ resistor.

The exposed lead-frame die pad on the bottom of the package must be connected to V−, pin 11 (see the QFN

Package and Heat Sinking section for more details).

V-

V+

L₁

L₂

10mH

C_B1

100nF

C_B2

100nF

C_B3

1mF

C_B4

1mF

V-

V+

XTR300

Figure 48. Suggested Supply Decoupling for Noisy Chopper-Type Supplies

QFN PACKAGE AND HEAT SINKING

The XTR300 is available in a QFN package. This leadless, near-chip-scale package maximizes board space and

enhances thermal and electrical characteristics of the device through an exposed thermal pad.

Packages with an exposed thermal pad are specifically designed to provide excellent power dissipation, but

printed circuit board (PCB) layout greatly influences overall heat dissipation. The thermal resistance from

junction-to-ambient (θ_JA) is specified for the packages with the exposed thermal pad soldered to a normalized

PCB, as described in Technical Brief SLMA002, PowerPAD™ Thermally-Enhanced Package. See also

EIA/JEDEC Specifications JESD51-0 to 7, QFN/SON PCB Attachment (SLUA271), and Quad Flatpack No-Lead

Logic Packages (SCBA017). These documents are available for download at www.ti.com.

NOTE: All thermal models have an accuracy variation of ±20%.

Component population, layout of traces, layers, and air flow strongly influence heat dissipation. Worst-case load

conditions should be tested in the real environment to ensure proper thermal conditions. Minimize thermal stress

for proper long-term operation with a junction temperature well below +125°C.

The exposed lead-frame die pad on the bottom of the package must be connected to the V− pin.

28

XTR300

www.ti.com

SBOS336C –JUNE 2005–REVISED JUNE 2011

POWER DISSIPATION

Power dissipation depends on power supply, signal, and load conditions. It is dominated by the power dissipation

of the output transistors of the OPA. For dc signals, power dissipation is equal to the product of output current,

I_OUTand the output voltage across the conducting output transistor (V_S– V_OUT).

It is very important to note that the temperature protection does not shut the part down in overtemperature

conditions, unless the EF_OTpin is connected to the output enable pin OD; see the Driver Output Disable section.

The power that can be safely dissipated in the package is related to the ambient temperature and the heatsink

design and conditions. The QFN package with an exposed thermal pad is specifically designed to provide

excellent power dissipation, but board layout greatly influences the heat dissipation.

To appropriately determine the required heatsink area, required power dissipation should be calculated and the

relationship between power dissipation and thermal resistance should be considered to minimize overheat

conditions and allow for reliable long-term operation.

The heat sinking efficiency can be tested using the EF_OToutput signal. This output goes low at nominally +140°C

junction temperature (assume 6% tolerance). With full power dissipation (for example, maximum current into a

0Ω load), the ambient temperature can be slowly raised until the OT flag goes low. This flag would indicate the

minimum heat-sinking for the usable operation condition.

The recommended landing pattern for the QFN package is shown at the end of this data sheet.

29

XTR300

SBOS336C –JUNE 2005–REVISED JUNE 2011

www.ti.com

REVISION HISTORY

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision B (March, 2006) to Revision C

Page

•

Updated document format to current standards ................................................................................................................... 1

Deleted information regarding HART digital communication throughout document ............................................................. 1

Added footnote regarding small-signal measurement with no capacitive load in Electrical Characteristics (Voltage

Output Mode) ........................................................................................................................................................................ 3

•

Corrected Nominal setup for ±20mA Output parameter from ±20V Output in Electrical Characteristics (Current

Output Mode) ........................................................................................................................................................................ 4

Changed Common-Mode Voltage Range parameter to Input Voltage Range in Electrical Characteristics

(Instrumentation Amplifier) .................................................................................................................................................... 6

•

Added conditions to Short Circuit Current parameter in Electrical Characteristics (Instrumentation Amplifier) ................... 6

Changed last paragraph of Driver Output Disable section ................................................................................................. 22

Corrected footnote to Table 1 ............................................................................................................................................. 22

Revised Over-Temperature Flag description in Error Flags section to indicate the need for a 2.2kΩ resistor .................. 25

Revised Power On/Off Glitch section and added Figure 47 ............................................................................................... 27

Updated and combined QFN Package and Heat Sinking sections .................................................................................... 28

Added Power Dissipation section ....................................................................................................................................... 29

30

PACKAGE MATERIALS INFORMATION

www.ti.com

26-Jan-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0

B0

K0

P1

W

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

XTR300AIRGWR

XTR300AIRGWT

VQFN

RGW

20

3000

250

330.0

180.0

12.4

5.3

1.5

8.0

12.0

Q2

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

26-Jan-2013

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

XTR300AIRGWR

XTR300AIRGWT

VQFN

RGW

20

3000

250

367.0

210.0

367.0

185.0

35.0

Pack Materials-Page 2

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厂商	型号	描述	页数
ETC	XTR100	[ ]	12 页
BB	XTR100AM	[ Instrumentation Amplifier, 1 Func, 50uV Offset-Max, MDIP14, ]	12 页
BB	XTR100AP	[ Instrumentation Amplifier, 1 Func, 50uV Offset-Max, PDIP14, ]	12 页
BB	XTR100BM	[ Instrumentation Amplifier, 1 Func, 25uV Offset-Max, MDIP14, ]	12 页
BB	XTR100BP	[ Instrumentation Amplifier, 1 Func, 25uV Offset-Max, PDIP14, ]	12 页
BB	XTR101	高精度，低漂移的4-20mA两线制变送器[ Precision, Low Drift 4-20mA TWO-WIRE TRANSMITTER ]	15 页
TI	XTR101	高精度，低漂移的4-20mA两线制变送器[ Precision, Low Drift 4-20mA TWO-WIRE TRANSMITTER ]	25 页
BB	XTR101AG	高精度，低漂移的4-20mA两线制变送器[ Precision, Low Drift 4-20mA TWO-WIRE TRANSMITTER ]	15 页
TI	XTR101AG	高精度，低漂移的4-20mA两线制变送器[ Precision, Low Drift 4-20mA TWO-WIRE TRANSMITTER ]	25 页
BB	XTR101AG-BI	[ Instrumentation Amplifier, 1 Func, 60uV Offset-Max, CDIP14, ]	13 页