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IXDE504D2T

型号:

IXDE504D2T

描述:

4安培双低侧MOSFET超快驱动器,启动快速,受控关闭[ 4 Ampere Dual Low-Side Ultrafast MOSFET Drivers with Enable for fast, controlled shutdown ]

品牌:

IXYS[ IXYS CORPORATION ]

页数:

13 页

PDF大小:

407 K

IXDD504/ IXDE504  
4 Ampere Dual Low-Side Ultrafast MOSFET Drivers  
with Enable for fast, controlled shutdown  
Features  
General Description  
• Built using the advantages and compatibility  
of CMOS and IXYS HDMOSTM processes  
• Latch-Up Protected up to 4 Amps  
• High 4A Peak Output Current  
• Wide Operating Range: 4.5V to 30V  
-55°Cto+125°CExtendedOperating  
Temperature  
• Ability to Disable Output under Faults  
• High Capacitive Load  
DriveCapability:1800pFin<15ns  
• Matched Rise And Fall Times  
• Low Propagation Delay Time  
• LowOutputImpedance  
TheIXDD504andIXDE504eachconsistoftwo4-Amp  
CMOShighspeedMOSFETgatedriversfordrivingthe  
latest IXYS MOSFETs & IGBTs. Each of the dual outputs  
can source and sink 4 Amps of peak current while produc-  
ing voltage rise and fall times of less than 15ns. The input  
of each driver is TTL or CMOS compatible and is virtually  
immune to latch up. Patented* design innovations eliminate  
crossconductionandcurrent"shoot-through".Improved  
speed and drive capabilities are further enhanced by fast,  
matched rise and fall times.  
Additionally,eachIXDD504orIXDE504driverincorporatesa  
unique ability to disable the output under fault conditions.  
When a logical low is forced into the Enable input of a  
driver, both of it's final output stage MOSFETs (NMOS and  
PMOS) are turned off. As a result, the respective output of  
the IXDD504 enters a tristate mode and, with additional  
cicuitry, achieves a soft turn-off of the MOSFET/IGBT when  
a short circuit is detected. This helps prevent damage that  
could occur to the MOSFET/IGBT if it were to be switched  
offabruptlyduetoadv/dtover-voltagetransient.  
• LowSupplyCurrent  
• Two Drivers in a Single Package  
Applications  
• Limiting di/dt under Short Circuit  
• DrivingMOSFETsandIGBTs  
• MotorControls  
• LineDrivers  
• PulseGenerators  
TheIXDD504andIXDE504areeachavailableinthe8-Pin  
P-DIP (PI) package, the 8-Pin SOIC (SIA) package, and the  
8-Lead DFN (D2) package, (which occupies less than 65%  
of the board area of the 8-Pin SOIC).  
• Local Power ON/OFF Switch  
• Switch Mode Power Supplies (SMPS)  
• DCtoDCConverters  
• PulseTransformerDriver  
• Class D Switching Amplifiers  
• PowerChargePumps  
*United States Patent 6,917,227  
Ordering Information  
Package  
Type  
Pack  
Qty  
50  
Part Number  
Description  
Packing Style  
Tube  
Tube  
Configuration  
IXDD504PI  
IXDD504SIA  
4A Low Side Gate Driver I.C. 8-Pin PDIP  
4A Low Side Gate Driver I.C. 8-Pin SOIC  
Dual Non-  
Inverting  
Drivers with  
Enable  
94  
IXDD504SIAT/R 4A Low Side Gate Driver I.C. 8-Pin SOIC  
IXDD504D2  
13” Tape and Reel 2500  
56  
4A Low Side Gate Driver I.C. 8-Lead DFN 2” x 2” Waffle Pack  
IXDD504D2T/R 4A Low Side Gate Driver I.C. 8-Lead DFN 13” Tape and Reel 2500  
IXDE504PI  
IXDE504SIA  
4A Low Side Gate Driver I.C. 8-Pin PDIP  
4A Low Side Gate Driver I.C. 8-Pin SOIC  
Tube  
Tube  
50  
94  
Dual Inverting  
Drivers  
Inverting with  
Enable  
IXDE504SIAT/R 4A Low Side Gate Driver I.C. 8-Pin SOIC  
IXDE504D2  
IXDE504D2T/R 4A Low Side Gate Driver I.C. 8-Lead DFN 13” Tape and Reel 2500  
13” Tape and Reel 2500  
56  
4A Low Side Gate Driver I.C. 8-Lead DFN 2” x 2” Waffle Pack  
NOTE: All parts are lead-free and RoHS Compliant  
DS99568A(10/07)  
Copyright © 2007 IXYS CORPORATION All rights reserved  
First Release  
IXDD504 / IXDE504  
Figure 1 - IXDD504 Dual Non-Inverting + Enable 4A Gate Driver Functional Block Diagram  
Vcc  
200K  
P
ANTI-CROSS  
IN A  
OUT A  
CONDUCTION  
CIRCUIT *  
*
N
EN A  
200K  
P
N
ANTI-CROSS  
CONDUCTION  
IN B  
OUT B  
CIRCUIT *  
*
EN B  
GND  
Figure 2 - IXDE504 Dual Inverting + Enable 4A Gate Driver Functional Block Diagram  
Vcc  
200K  
P
ANTI-CROSS  
IN A  
OUT A  
CONDUCTION  
CIRCUIT
*
N
EN A  
200K  
P
N
ANTI-CROSS  
CONDUCTION  
OUT B  
IN B  
CIRCUIT
*
EN B  
GND  
* United States Patent 6,917,227  
Copyright © 2007 IXYS CORPORATION All rights reserved  
2
IXDD504 / IXDE504  
Operating Ratings (2)  
Absolute Maximum Ratings (1)  
Parameter  
Value  
Parameter  
Value  
Supply Voltage  
All Other Pins (unless specified  
otherwise)  
JunctionTemperature  
StorageTemperature  
LeadTemperature(10Sec)  
35 V  
Operating Supply Voltage  
OperatingTemperatureRange  
PackageThermalResistance*  
4.5V to 30V  
-55 °C to 125°C  
-0.3 V to VCC + 0.3V  
150 °C  
-65 °C to 150 °C  
300°C  
8-PinPDIP  
(PI)  
θ
(typ) 125°C/W  
8-PinSOIC  
8-LeadDFN  
8-LeadDFN  
8-LeadDFN  
(SIA)  
(D2)  
(D2)  
(D2)  
θJJ--AA(typ) 200°C/W  
θ
(typ) 125-200°C/W  
θJ-A(max) 2.1°C/W  
θJJ--CS(typ) 6.4°C/W  
Electrical Characteristics @ TA = 25 oC (3)  
Unless otherwise noted, 4.5V VCC 30V .  
All voltage measurements with respect to GND. IXD_504 configured as described in Test Conditions. All specifications are for one channel.  
(4)  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
VIH, VENH High input & EN voltage  
3
V
V
4.5V VIN 18V  
4.5V VIN 18V  
VIL, VENL  
VIN  
Low input & EN voltage  
Input voltage range  
Enable voltage range  
Input current  
0.8  
VCC + 0.3  
VCC + 0.3  
10  
-5  
- 0.3  
V
VEN  
V
IIN  
-10  
0V VIN VCC  
µA  
V
VOH  
VOL  
High output voltage  
Low output voltage  
VCC - 0.025  
0.025  
2.5  
V
VCC = 18V  
IOUT = 10mA  
VCC = 18V  
IOUT = 10mA  
ROH  
High state output resistance  
1.5  
ROL  
IPEAK  
IDC  
Low state output resistance  
Peak output current  
1.2  
4
2.0  
A
A
VCC = 15V  
Limited by package  
dissipation  
Continuous output current  
1
CLOAD =1000pF  
VCC =18V  
CLOAD =1000pF  
VCC =18V  
CLOAD =1000pF  
VCC =18V  
tR  
Rise time  
9
8
16  
14  
40  
ns  
ns  
ns  
tF  
Fall time  
tONDLY  
On-time propagation delay  
19  
CLOAD =1000pF  
VCC =18V  
tOFFDLY  
tENOH  
tDOLD  
Off-time propagation delay  
18  
15  
63  
35  
30  
ns  
ns  
ns  
Enable to output high delay time  
Disable to high impedance state  
delay time  
100  
30  
VCC  
REN  
Power supply voltage  
Enable Pull-up Resistor  
4.5  
18  
V
200  
kΩ  
V
CC = 18V, VIN = 0V  
20  
3
20  
µA  
mA  
mA  
VIN = 3.5V  
VIN = VCC  
1
ICC  
Power supply current  
IXYS reserves the right to change limits, test conditions, and dimensions.  
3
IXDD504 / IXDE504  
Electrical Characteristics @ temperatures over -55 oC to 125 oC (3)  
Unless otherwise noted, 4.5V VCC 30V , Tj < 150oC  
All voltage measurements with respect to GND. IXD_504 configured as described in Test Conditions. All specifications are for one channel.  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
VIH  
VIL  
VIN  
IIN  
High input voltage  
Low input voltage  
Input voltage range  
Input current  
3
V
V
4.5V VCC 18V  
4.5V VCC 18V  
0.8  
VCC + 0.3  
10  
-5  
-10  
V
0V VIN VCC  
µA  
V
VOH  
VOL  
High output voltage  
Low output voltage  
VCC - 0.025  
0.025  
3
V
High state output  
resistance  
Low state output  
resistance  
ROH  
ROL  
VCC = 18V, IOUT = 10mA  
VCC = 18V, IOUT = 10mA  
2.5  
IDC  
Continuous output current  
Rise time  
1
A
tR  
CLOAD =1000pF VCC =18V  
CLOAD =1000pF VCC =18V  
10  
9
ns  
ns  
ns  
ns  
tF  
Fall time  
tONDLY  
tOFFDLY  
On-time propagation delay CLOAD =1000pF VCC =18V  
Off-time propagation delay CLOAD =1000pF VCC =18V  
23  
32  
Enable to output high  
delay time  
tENOH  
60  
ns  
Disable to high impedance  
state delay time  
tDOLD  
VCC  
120  
30  
ns  
V
Power supply voltage  
4.5  
18  
High impedance state  
output leakage  
IHIOL  
VCC = 18V, Temp. = 125°C  
200  
µA  
VCC = 18V, VIN = 0V  
VIN = 3.5V  
150  
3
150  
µA  
mA  
mA  
ICC  
Power supply current  
VIN = VCC  
Notes:  
1. Operating the device beyond the parameters listed as “Absolute Maximum Ratings” may cause permanent  
damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device  
reliability.  
2. The device is not intended to be operated outside of the Operating Ratings.  
3. Electrical Characteristics provided are associated with the stated Test Conditions.  
4. Typical values are presented in order to communicate how the device is expected to perform, but not necessarily  
to highlight any specific performance limits within which the device is guaranteed to function.  
* The following notes are meant to define the conditions for the θJ-A, θJ-C and θJ-S values:  
1) TheθJ-A (typ)isdefinedasjunctiontoambient. TheθJ-A ofthestandardsingledie8-LeadPDIPand8-LeadSOICaredominatedbythe  
resistanceofthepackage,andtheIXD_5XXaretypical. Thevaluesforthesepackagesarenaturalconvectionvalueswithverticalboards  
andthevalueswouldbelowerwithforcedconvection. Forthe8-LeadDFNpackage, theθJ-A valuesupposestheDFNpackageissoldered  
onaPCB. TheθJ-A (typ)is200°C/W with no special provisions on the PCB, but because the center pad provides a low thermal resistance  
to the die, it is easy to reduce the θJ-A by adding connected copper pads or traces on the PCB. These can reduce the θJ-A (typ) to 125 °C/W  
easily, andpotentiallyevenlower. TheθJ-AforDFNonPCBwithoutheatsinkorthermalmanagementwillvarysignificantlywithsize,  
construction, layout, materials, etc. Thistypicalrangetellstheuserwhatheislikelytogetifhedoesnothermalmanagement.  
2) θJ-C (max) is defined as juction to case, where case is the large pad on the back of the DFN package. The θJ-C values are generally not  
publishedforthePDIPandSOICpackages. TheθJ-CfortheDFNpackagesareimportanttoshowthelowthermalresistancefromjunctionto  
thedieattachpadonthebackoftheDFN, --andaguardbandhasbeenaddedtobesafe.  
3) TheθJ-S (typ)isdefinedasjunctiontoheatsink,wheretheDFNpackageissolderedtoathermalsubstratethatismountedonaheatsink.  
Thevaluemustbetypicalbecausethereareavarietyofthermalsubstrates. ThisvaluewascalculatedbasedoneasilyavailableIMSinthe  
U.S.orEurope,andnotapremiumJapaneseIMS. A4mildialectricwithathermalconductivityof2.2W/mCwasassumed. Theresultwas  
given as typical, and indicates what a user would expect on a typical IMS substrate, and shows the potential low thermal resistance for the  
DFNpackage.  
Copyright © 2007 IXYS CORPORATION All rights reserved  
4
IXDD504 / IXDE504  
Pin Description  
SYMBOL  
FUNCTION  
DESCRIPTION  
Channel A enable pin. When driven low, this pin disables the A channel and  
forces a high impedance state to the A channel output.  
A channel input signal-TTL or CMOS compatible.  
EN A  
IN A  
A Channel Enable  
A Channel Input  
The system ground pin. Internally connected to all circuitry, this pin provides  
ground reference for the entire chip. This pin should be connected to a low  
noise analog ground plane for optimum performance.  
GND  
Ground  
IN B  
B Channel Input  
B channel input signal-TTL or CMOS compatible.  
B channel driver output. For application purposes, this pin is connected via a  
resistor to the gate of a MOSFET/IGBT.  
OUT B  
B Channel Output  
Positive power-supply voltage input. This pin provides power to the entire  
chip. The range for this voltage is from 4.5V to 30V.  
A channel driver output. For application purposes, this pin is connected via a  
resistor to the gate of a MOSFET/IGBT.  
Channel B enable pin. When driven low, this pin disables the B channel and  
forces a high impedance state to the B channel output.  
VCC  
OUT A  
EN B  
Supply Voltage  
A Channel Output  
B Channel Enable  
CAUTION: Follow proper ESD procedures when handling and assembling this component.  
PinConfigurations  
8 PIN DIP (PI)  
8 PIN DIP (PI)  
8 PIN SOIC (SIA)  
8 PIN SOIC (SIA)  
1
2
8
7
6
5
1
2
8
7
6
5
EN B  
I
I
EN A  
IN A  
GND  
EN A  
EN B  
X
D
E
5
0
4
X
D
D
5
0
4
OUT A  
VCC  
IN A  
OUT A  
3
3
GND  
IN B  
VCC  
4
4
OUT B  
OUT B  
IN B  
8 LEAD DFN (D2)  
(Bottom View)  
8 LEAD DFN (D2)  
(Bottom View)  
I
EN A  
I
EN A  
OUT A  
GND  
1
2
3
4
OUT A  
GND  
1
2
3
4
8
8
X
D
E
5
0
4
X
D
D
5
0
4
IN A  
IN B  
EN B  
IN A  
IN B  
EN B  
7
6
5
7
6
5
VCC  
VCC  
OUT B  
OUT B  
NOTE: Solder tabs on bottoms of DFN packages are grounded  
Figure 3 - Characteristics Test Diagram  
VIN  
IXYS reserves the right to change limits, test conditions, and dimensions.  
5
IXDD504 / IXDE504  
Typical Performance Characteristics  
Fig. 4  
90  
Fig. 5  
Fall Time vs. Supply Voltage  
Rise Times vs. Supply Voltage  
80  
80  
70  
60  
50  
40  
30  
20  
10  
70  
60  
10000pF  
5400pF  
50  
10000pF  
5400pF  
40  
30  
20  
1000pF  
100pF  
10  
1000pF  
100pF  
0
0
0
0
5
10  
15  
20  
25  
30  
35  
5
10  
15  
20  
25  
30  
35  
Supply Voltage (V)  
Supply Voltage (V)  
Rise / Fall Time vs. Temperature  
SUPPLY = 15V CLOAD = 1000pF  
Fig. 7  
Fig. 6  
Rise Time vs. Capacitive Load  
V
70  
10  
9
8
7
6
5
4
3
2
1
5V  
60  
50  
40  
30  
20  
10  
15V  
30V  
0
0
100  
1000  
10000  
-50  
-30  
-10  
10  
30  
50  
70  
90  
110  
130  
150  
Load Capacitance (pF)  
Temperature (C)  
Fig. 8  
Fig. 9  
Fall Time vs. Capacitive Load  
Input Threshold Levels vs. Supply Voltage  
70  
60  
50  
40  
30  
20  
10  
2.5  
5V  
2
1.5  
1
Positive going input  
15V  
30V  
Negative going input  
0.5  
0
0
0
5
10  
15  
20  
25  
30  
35  
100  
1000  
10000  
Supply Voltage (V)  
Load Capacitance (pF)  
Copyright © 2007 IXYS CORPORATION All rights reserved  
6
IXDD504 / IXDE504  
Propagation Delay vs. Supply Voltage  
Rising Input, CLOAD = 1000pF  
Input Threshold Levels vs. Temperature  
Fig. 11  
Fig. 10  
VSUPPLY = 15V  
35  
30  
25  
20  
15  
10  
5
3
2.5  
2
Positive going input  
Negative going input  
1.5  
1
0.5  
0
0
0
5
10  
15  
20  
25  
30  
35  
-50  
-30  
-10  
10  
30  
70  
90  
110  
130  
150  
Tempera50ture (C)  
Supply Voltage (V)  
Fig. 13  
Propagation Delay vs. Temperature  
SUPPLY = 15V CLOAD = 1000pF  
Propagation Delay vs. Supply Voltage  
Falling Input, CLOAD = 1000pF  
Fig. 12  
V
45  
35  
30  
25  
20  
15  
10  
5
40  
35  
30  
25  
20  
15  
10  
5
Negative going input  
Positve going input  
0
0
0
5
10  
15  
20  
25  
30  
35  
-50  
0
50  
100  
150  
Supply Voltage (V)  
Temeprature (C)  
Fig. 14  
Fig. 15  
1000  
Quiescent Current vs. Supply Voltage  
Quiescent Current vs. Temperature  
V = 0V  
VSUPPLY = 15V  
IN  
10  
100  
10  
1
1
0.1  
0.01  
Non-inverting, Input= "0"  
Inverting Input = "1"  
0.1  
0.01  
0
5
10  
15  
20  
25  
30  
35  
-50  
-30  
-10  
10  
30  
50  
70  
90  
110  
130  
150  
Supply Voltage (V)  
Temperature (C)  
7
IXDD504 / IXDE504  
Fig. 17  
Supply Current vs. Capacitive Load  
SUPPLY = 5V  
Fig. 16  
Supply Current vs. Frequency  
V
VSUPPLY = 5V  
2MHz  
1MHz  
100  
100  
10000pF  
5400pF  
1000pF  
100pF  
10  
1
10  
1
100kHz  
10kHz  
0.1  
0.01  
0.1  
0.01  
10  
100  
1000  
10000  
100  
1000  
10000  
Load Capacitance (pF)  
Frequency (kHz)  
Fig. 18  
Supply Current vs. Frequency  
SUPPLY = 15V  
Supply Current vs. Capacitive Load  
Fig. 19  
VSUPPLY = 15V  
V
1000  
1000  
100  
10  
10000pF  
5400pF  
2MHz  
1MHz  
100  
10  
1
1000pF  
100pF  
100kHz  
10kHz  
1
0.1  
0.1  
0.01  
0.01  
10  
100  
1000  
10000  
100  
1000  
10000  
Load Capacitance (pF)  
Frequency (kHz)  
Supply Current vs. Capacitive Load  
Supply Current vs. Frequency  
SUPPLY = 30V  
Fig. 21  
Fig. 20  
VSUPPLY = 30V  
V
1000  
1000  
10000pF  
5400pF  
2MHz  
1MHz  
1000pF  
100pF  
100  
10  
1
100  
10  
1
100kHz  
10kHz  
0.1  
10  
0.1  
100  
1000  
10000  
100  
1000  
10000  
Frequency (kHz)  
Load Capacitance (pF)  
Copyright © 2007 IXYS CORPORATION All rights reserved  
8
IXDD504 / IXDE504  
Fig. 22  
Fig. 23  
Output Source Current vs. Supply Voltage  
Output Sink Current vs. Supply Voltage  
12  
0
-2  
-4  
10  
8
-6  
6
-8  
4
-10  
-12  
2
0
-14  
0
0
5
10  
15  
20  
25  
30  
35  
5
10  
15  
20  
25  
30  
35  
Supply Voltage (V)  
Supply Voltage (V)  
Fig. 24  
Fig. 25  
Output Sink Current vs. Temperature  
VSUPPLY = 15V  
Output Source Current vs. Temperature  
VSUPPLY = 15V  
0
-1  
-2  
-3  
-4  
-5  
6
5
4
3
2
1
0
-6  
-50  
0
50  
100  
150  
-50  
0
50  
100  
150  
Temperature (C)  
Temperature (C)  
Fig. 26  
Fig. 27  
Low State Output Resistance vs. Supply Voltage  
High State Output Resistance vs. Supply Voltage  
3
2.5  
2
3
2.5  
2
1.5  
1
1.5  
1
0.5  
0
0.5  
0
0
5
10  
15  
20  
25  
30  
35  
0
5
10  
15  
20  
25  
30  
35  
Supply Voltage (V)  
Supply Voltage (V)  
9
IXDD504 / IXDE504  
Fig. 29  
Fig. 28  
ENABLE Threshold vs. Temperature  
V
SUPPLY = 15V  
ENABLE Threshold vs. Supply Voltage  
1.8  
1.6  
1.4  
1.2  
1
2.5  
Positive going input  
2
1.5  
1
Positive going input  
Negative going input  
Negative going input  
0.8  
0.6  
0.4  
0.2  
0
0.5  
0
0
5
10  
15  
20  
25  
30  
35  
-50  
0
50  
100  
150  
Supply Voltage (V)  
Temperature (C)  
Fig. 30  
Fig. 31  
ENABLE Propagation vs. Temperature  
VSUPPLY = 15V  
ENABLE Propagation Time vs. Supply Voltage  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
400  
350  
300  
250  
200  
150  
100  
50  
Negative going ENABLE to high impedance state  
Positive going ENABLE to output ON  
Negative going ENABLE to high impedance state  
Positve going ENABLE to output ON  
0
-50  
0
50  
100  
150  
0
5
10  
15  
20  
25  
30  
35  
Temperature (C)  
Supply Voltage (V)  
Figure 32 - Typical Application Short Circuit di/dt Limit  
Ref  
Copyright © 2007 IXYS CORPORATION All rights reserved  
10  
IXDD504 / IXDE504  
APPLICATIONS INFORMATION  
Short Circuit di/dt Limit  
input of the comparator to eliminate any glitches in voltage  
caused by the inductance of the wire connecting the source  
resistor to ground. (Those glitches might cause false triggering  
of the comparator).  
Ashortcircuitinahigh-powerMOSFETsuchastheIXFN100N20,  
(20A, 1000V), as shown in Figure 32, can cause the current  
through the module to flow in excess of 60A for 10µs or more  
prior to self-destruction due to thermal runaway. For this  
reason, some protection circuitry is needed to turn off the  
MOSFET module. However, if the module is switched off too  
fast, there is a danger of voltage transients occuring on the  
drain due to Ldi/dt, (where L represents total inductance in  
series with drain). If these voltage transients exceed the  
MOSFET's voltage rating, this can cause an avalanche break-  
down.  
The comparator's output should be connected to a SRFF(Set  
Reset Flip Flop). The flip-flop controls both the Enable signal,  
andthelowpowerMOSFETgate. PleasenotethatCMOS4000-  
series devices operate with a VCC range from 3 to 15 VDC, (with  
18 VDC being the maximum allowable limit).  
A low power MOSFET, such as the 2N7002, in series with a  
resistor, will enable the IXFN100N20 gate voltage to drop  
gradually. The resistor should be chosen so that the RC time  
constant will be 100us, where "C" is the Miller capacitance of  
the IXFN100N20.  
The IXDD504 and IXDE504 have the unique capability, with  
additionalcircuitry,tosoftlyswitchoffthehigh-powerMOSFET  
module, significantly reducing these Ldi/dt transients.  
For resuming normal operation, a Reset signal is needed at  
the SRFF's input to enable the IXDD504 again. This Reset can  
be generated by connecting a One Shot circuit between the  
IXDD504 Input signal and the SRFF restart input. The One Shot  
will create a pulse on the rise of the IXDD504 input, and this  
pulse will reset the SRFF outputs to normal operation.  
Thus, the IXDD504 & IXDE504 help to prevent device destruc-  
tion from both dangers; over-current, and avalanche break-  
down due to di/dt induced over-voltage transients.  
The IXDD504 & IXDE504 are designed to not only provide ±4A  
per output under normal conditions, but also to allow their  
outputs to go into a high impedance state. This permits the  
IXDD504 or IXDE504 outputs to control a separate weak pull-  
down circuit during detected overcurrent shutdown conditions  
to limit and separately control dVGS/dt gate turnoff. This circuit  
is shown in Figure 33.  
When a short circuit occurs, the voltage drop across the low-  
value, current-sensing resistor, (Rs=0.005 Ohm), connected  
between the MOSFET Source and ground, increases. This  
triggers the comparator at a preset level. The SRFF drives a low  
input into the Enable pin disabling the IXDD504 output. The  
SRFF also turns on the low power MOSFET, (2N7000).  
Referring to Figure 33, the protection circuitry should include  
a comparator, whose positive input is connected to the source  
of the IXFN100N20. A low pass filter should be added to the  
In this way, the high-power MOSFET module is softly turned off  
by the IXDD504, preventing its destruction.  
+
Ld  
10uH  
VB  
-
Figure 33 - Application Test Diagram  
Rd  
0.1  
IXDD504  
VCC  
Rg  
1
IXFN100N20  
OUT  
IN  
Rsh  
1600  
EN  
DGND  
+
-
+
-
VCC  
VIN  
Rs  
Low_Power  
2N7000  
Ls  
20nH  
R+  
10k  
Circuit  
One Shot  
Rcomp  
5k  
Comp  
LM339  
+
NAND  
CD4011A  
NOT2  
CD4049A  
V+  
V-  
C+  
100pF  
NOT1  
CD4049A  
Ccomp  
1pF  
-
Ros  
1M  
+
-
R
REF  
Cos  
1pF  
Q
NOR1  
CD4001A  
NOT3  
S
CD4049A  
EN  
NOR2  
CD4001A  
SR Flip-Flop  
11  
IXDD504 / IXDE504  
Supply Bypassing and Grounding Practices, Output Lead inductance  
When designing a circuit to drive a high speed MOSFET  
utilizing the IXDD504 or IXDE504, it is very important to keep  
certaindesigncriteriainmind, inordertooptimizeperformance  
of the driver. Particular attention needs to be paid to Supply  
Bypassing, Grounding, and minimizing the Output Lead  
Inductance.  
Say, for example, we are using the IXDD504 to charge a  
2500pF capacitive load from 0 to 25 volts in 25ns.  
Using the formula: IC = C (∆V / t), where V=25V C=2500pF  
and t=25ns we can determine that to charge 2500pF to 25  
volts in 25ns will take a constant current of 2.5A. (In reality, the  
charging current won’t be constant, and will peak somewhere  
around 4A).  
SUPPLYBYPASSING  
Inorderforourdesigntoturntheloadonproperly, theIXDD504  
must be able to draw this 2.5A of current from the power supply  
inthe25ns. Thismeansthattheremustbeverylowimpedance  
between the driver and the power supply. The most common  
method of achieving this low impedance is to bypass the  
power supply at the driver with a capacitance value that is a  
magnitude larger than the load capacitance. Usually, this  
would be achieved by placing two different types of bypassing  
capacitors, with complementary impedance curves, very close  
to the driver itself. (These capacitors should be carefully  
selected, low inductance, low resistance, high-pulse current-  
servicecapacitors). Leadlengthsmayradiateathighfrequency  
due to inductance, so care should be taken to keep the lengths  
oftheleadsbetweenthesebypasscapacitorsandtheIXDD504  
to an absolute minimum.  
GROUNDING  
Inorderforthedesigntoturntheloadoffproperly, theIXDD504  
must be able to drain this 2.5A of current into an adequate  
grounding system. There are three paths for returning current  
that need to be considered: Path #1 is between the IXDD504  
and it’s load. Path #2 is between the IXDD504 and it’s power  
supply. Path #3 is between the IXDD504 and whatever logic  
is driving it. All three of these paths should be as low in  
resistance and inductance as possible, and thus as short as  
practical. In addition, every effort should be made to keep  
these three ground paths distinctly separate. Otherwise, (for  
instance), the returning ground current from the load may  
develop a voltage that would have a detrimental effect on the  
logic line driving the IXDD504.  
OUTPUTLEADINDUCTANCE  
Of equal importance to Supply Bypassing and Grounding are  
issues related to the Output Lead Inductance. Every effort  
should be made to keep the leads between the driver and it’s  
load as short and wide as possible. If the driver must be  
placed farther than 0.2” from the load, then the output leads  
should be treated as transmission lines. In this case, a  
twisted-pair should be considered, and the return line of each  
twisted pair should be placed as close as possible to the  
groundpinofthedriver,andconnectdirectlytotheground  
terminal of the load.  
Copyright © 2007 IXYS CORPORATION All rights reserved  
12  
IXDD504 / IXDE504  
A2  
b
b2  
b3  
c
D
D1  
E
E1  
e
eA  
eB  
L
E
H
B
C
D
E
e
H
h
L
M
N
D
A
A1  
e
B
h X 45  
N
L
C
M
0.048 [1.22]  
0.048 [1.22]  
0.197 [5.00]  
0.035 [0.90]  
0.101 [2.56]  
IXYS Corporation  
3540 Bassett St; Santa Clara, CA 95054  
Tel: 408-982-0700; Fax: 408-496-0670  
e-mail: sales@ixys.net  
S0.002^0.000; o  
[
S0.05^0.00;o  
]
0.031 [0.78]  
0.031 [0.78]  
www.ixys.com  
IXYS Semiconductor GmbH  
Edisonstrasse15 ; D-68623; Lampertheim  
Tel: +49-6206-503-0; Fax: +49-6206-503627  
e-mail: marcom@ixys.de  
13  
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