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WT41-A-HCI21

型号：

WT41-A-HCI21

品牌：

SILICON[ SILICON ]

页数：

48 页

PDF大小：

1295 K

下载PDF手册

WT41-A / WT41-N

DATA SHEET

Wednesday, 21 January 2015

Version 1.45

VERSION HISTORY

Version

0.1

Comment

First draft

0.2

Description and product codes added

Dimensions updated, layout guide added, UART and USB chapters added

Pin descriptions, PCM, USB, UART, SPI

Physical dimensions corrected

0.21

0.22

0.3

0.31

0.32

Product codes corrected

Recommendation for a power-up reset circuitry added to chapter 10

Pins 1 and 52 (GND) removed. Dimensions updated, recommended land

pattern added

0.4

0.5

Certification information added

0.6

Physical dimensions and recommended PCB land pattern updated

Figure 7 recommended land pattern corrected

Radio and antenna characteristics, layout guide for WT41-N

Japan certification info added

0.7

1.0

1.1

1.2

FCC RF radiation exposure statement updated

Layout guide updated

1.3

1.31

1.32

1.33

1.34

1.35

1.36

1.37

VDD added to table 1

FCC and IC statements updated

PIO current drive capability added. List of approved antennas added.

IC statements in French added

Information about Japan compliance updated

Absolute maximum supply voltage 3.7V

MIC Japan information updated

Silicon Labs

1.4

FCC C2PC to remove 20 cm restriction

MIC Japan ID corrected

1.41

1.42

1.43

1.44

1.45

MSL information updated

TXP vs VDD_PA figure added

Minor changes

Monopole chip antenna added to prequalified antennas list

Silicon Labs

TABLE OF CONTENTS

Ordering Information......................................................................................................................................8

Pinout and Terminal Description ...................................................................................................................9

Electrical Characteristics ............................................................................................................................ 12

3.1

Absolute Maximum Ratings ................................................................................................................ 12

Recommended Operating Conditions................................................................................................. 12

PIO Current Sink and Source Capability............................................................................................. 12

Transmitter Performance For BDR ..................................................................................................... 13

Radiated Spurious Emissions ............................................................................................................. 14

Receiver Performance ........................................................................................................................ 15

Current Consumption .......................................................................................................................... 15

Antenna Performance and Radiation Patterns ................................................................................... 16

3.2

3.3

3.4

3.5

3.6

3.7

3.8

Physical Dimensions .................................................................................................................................. 20

Layout Guidelines....................................................................................................................................... 22

5.1

5.2

5.2.1

5.2.2

WT41-A ............................................................................................................................................... 22

WT41-N............................................................................................................................................... 23

Layout for WT41-N with u.fl connector close to RF pin ............................................................... 23

Layout for WT41-N with 50 ohm trace from RF pin to a SMA connector .................................... 23

UART Interface........................................................................................................................................... 25

6.1

UART Bypass...................................................................................................................................... 27

UART Configuration While Reset is Active ......................................................................................... 27

UART Bypass Mode............................................................................................................................ 27

6.2

6.3

USB Interface ............................................................................................................................................. 28

7.1

USB Data Connections ....................................................................................................................... 28

USB Pull-Up resistor ........................................................................................................................... 28

USB Power Supply.............................................................................................................................. 28

Self-Powered Mode............................................................................................................................. 28

Bus-Powered Mode............................................................................................................................. 29

USB Suspend Current......................................................................................................................... 30

USB Detach and Wake-Up Signaling.................................................................................................. 30

USB Driver .......................................................................................................................................... 31

USB v2.0 Compliance and Compatibility ............................................................................................ 31

7.2

7.3

7.4

7.5

7.6

7.7

7.8

7.9

Serial Peripheral Interface (SPI)................................................................................................................. 32

PCM Codec Interface ................................................................................................................................. 33

9.1

PCM Interface Master/Slave ............................................................................................................... 33

Long Frame Sync................................................................................................................................ 34

Short Frame Sync ............................................................................................................................... 34

Multi-slot Operation ............................................................................................................................. 35

9.2

9.3

9.4

Silicon Labs

9.5

9.6

9.7

9.8

9.9

GCI Interface....................................................................................................................................... 35

Slots and Sample Formats.................................................................................................................. 36

Additional Features ............................................................................................................................. 37

PCM_CLK and PCM_SYNC Generation ............................................................................................ 37

PCM Configuration.............................................................................................................................. 38

I/O Parallel Ports..................................................................................................................................... 40

PIO Defaults................................................................................................................................. 40

Reset....................................................................................................................................................... 41

Pin States on Reset ..................................................................................................................... 42

Certifications ........................................................................................................................................... 43

Bluetooth...................................................................................................................................... 43

FCC.............................................................................................................................................. 43

IC (Industry Canada).................................................................................................................... 44

10.1

11.1

12.1

12.2

12.3

12.3.1 IC.................................................................................................................................................. 45

12.4

CE ................................................................................................................................................ 47

Japan ........................................................................................................................................... 47

Qualified Antenna Types for WT41-N.......................................................................................... 47

Moisture Sensitivity Level (MSL).................................................................................................. 48

Contact Information................................................................................................................................. 49

12.5

12.6

12.7

Silicon Labs

WT41 Bluetooth® Module

DESCRIPTION

FEATURES:

WT41 is a long range class 1, Bluetooth® 2.1 +

EDR module. WT41 is a highly integrated and

sophisticated Bluetooth® module, containing all the

necessary elements from Bluetooth® radio to

antenna and a fully implemented protocol stack.

Therefore WT41 provides an ideal solution for

developers who want to integrate Bluetooth®

wireless technology into their design with limited

knowledge of Bluetooth® and RF technologies.

WT41 is optimized for long range applications and

since it contains a RF power amplifier, low noise

amplifier and a highly efficient chip antenna. With

115 dB radio budget WT41 can reach over 1 km

range in line off sight.



Fully Qualified Bluetooth v2.1 + EDR end

product,



CE, FCC, IC and MIC Japan

TX power : 19 dBm

RX sensitivity : -92 dBm

Higly efficient chip antenna, U.FL connector or

RF pin



Class 1, range up to 800 meters

Industrial temperature range from -40^oC to

+85^oC



RoHS Compliant

USB interface (USB 2.0 compatible)

UART with bypass mode

6 x GPIO

By default WT41 module is equipped with powerful

and easy-to-use iWRAP firmware. iWRAP enables

users to access Bluetooth® functionality with simple

ASCII commands delivered to the module over

serial interface - it's just like a Bluetooth® modem.

1 x 8-bit AIO

Support for 802.11 Coexistence

Integrated iWRAP^TMBluetooth stack or HCI

firmware

APPLICATIONS:

 Hand held terminals

 Industrial devices

 Point-of-Sale systems

 PCs

 Personal Digital Assistants (PDAs)

 Computer Accessories

 Access Points

 Automotive Diagnostics Units

Silicon Labs

1 Ordering Information

WT41-A-HCI

Firmware

HCI21= HCI firmware (Bluetooth 2.1 + EDR)

HCI30= HCI firmware (Bluetooth 3.0)

AI4

AI5

iWRAP 4.0.0

iWRAP 5.0.2

Custom*

HW version

Chip antenna

RF pin

Product series

Silicon Labs

Page 8 of 49

Pinout and Terminal Description

Pins 1 and 52 (GND)

are not connected

and have been

removed

RFGND

GND

VDD_PA

PIO2

GND

AIO

UART_TX

PIO3

PIO5

UART_RTS

UART_RX

GND

USB+

USB-

UART_CTS

PCM_IN

PCM_CLK

PCM_SYNC

GND

SPI_MOSI

SPI_MISO

SPI_CLK

SPI_CSB

GND

PIO7

PIO6

RESET

VDD

GND

Figure 1: WT41 pin out

NUMBER

PAD TYPE

Not connected

DESCRIPTION

Pins 1 and 52 (GND) have been removed

from the module.

1, 52

Input, weak internal pull- Active low reset. Keep low for >5 ms

RESET

to cause a reset

2-10, 16,

23,24,26-

28, 30,

GND

31,36,44-

49, 53-59

RF output for WT41-N. For WT41-A

and WT41-E this pin is not connected

RF output

RF ground. Connected to GND internally to

the module.

Supply voltage for the RF power amplifier

and the low noise amplifier of the module

Supply voltage for BC4 and the flash

memory

RFGND

VDD_PA

VDD

GND

Supply voltage

Table 1: Supply and RF Terminal Descriptions

Silicon Labs

Page 9 of 49

NUMBER

PIO PORT

PAD TYPE

DESCRIPTION

Bi-directional, programmamble

strength internal pull-down/pull-up line

Programmamble input/output

PIO[2]

PIO[3]

PIO[4]

PIO[5]

PIO[6]

Bi-directional, programmamble

strength internal pull-down/pull-up line

Programmamble input/output

Bi-directional, programmamble

strength internal pull-down/pull-up line

Programmamble input/output

Bi-directional, programmamble

strength internal pull-down/pull-up line

Programmamble input/output

Bi-directional, programmamble

strength internal pull-down/pull-up line

Programmamble input/output

Bi-directional, programmamble

strength internal pull-down/pull-up line

Programmamble input/output

PIO[7]

AIO[1]

Programmamble analog

input/output line

Table 2: GPIO Terminal Descriptions

Bi-directional

SPI

INTERFACE

NUMBER

PAD TYPE

DESCRIPTION

CMOS output, tri-state,

weak internal pull-down

PCM_OUT

Synchronous data output

Synchronous data input

Synchronous data sync

Synchronous data clock

CMOS input, weak

internal pull-down

PCM_IN

Bi-directional, weak

internal pull-down

PCM_SYNC

PCM_CLK

Bi-directional, weak

internal pull-down

Table 3: PCM Terminal Descriptions

UART

Interfaces

NUMBER

PAD TYPE

DESCRIPTION

CMOS output, tri-

UART_TX

state, with weak UART data output, active high

internal pull-up

CMOS output, tri-

UART_RTS#

UART_RX

state, with weak UART request to send, active low

internal pull-up

CMOS input, tri-

state, with weak UART data input, active high

internal pull-down

CMOS input, tri-

state, with weak UART clear to send, active low

internal pull-down

UART_CTS#

Table 4: UART Terminal Descriptions

Silicon Labs

Page 10 of 49

NUMBER

USB Interfaces

PAD TYPE

DESCRIPTION

USB data plus with selectable internal 1.5k

pull-up resistor

USB data minus

USB+

USB-

Bidirectional

Table 5: USB Terminal Descriptions

SPI

INTERFACE

NUMBER

PAD TYPE

DESCRIPTION

SPI data input

CMOS input with weak

internal pull-down

SPI_MOSI

CMOS input with weak Chip select for Serial Peripheral

SPI_CS#

internal pull-up

Interface, active low

CMOS input with weak

internal pull-down

CMOS output, tristate,

with weak internal pull SPI data output

down

SPI_CLK

SPI clock

SPI_MISO

Table 6: Terminal Descriptions

Silicon Labs

Page 11 of 49

Electrical Characteristics

3.1 Absolute Maximum Ratings

Rating

Min

Max

Unit

Storage Temperature

-40

°C

VDD_PA, VDD

-0.4

3.7

Other Terminal Voltages

VSS-0.4

VDD+0.4

Table 7: Absolute Maximum Ratings

3.2 Recommended Operating Conditions

Rating

Min

-40

3.0

Max

3.6

Unit

°C

Operating Temperature Range

VDD_PA, VDD ^*)

*) VDD_PA has an effect on the RF output power.

Table 8: Recommended Operating Conditions

3.3 PIO Current Sink and Source Capability

Figure 2: WT41 PIO Current Drive Capability

Silicon Labs

Page 12 of 49

3.4 Transmitter Performance For BDR

Antenna gain 2.3dBi taken into account

RF Characetristics, VDD = 3.3V @ room

Bluetooth

Min

Typ

Max

Unit

dBm

temperature unless otherwise specified

Specification

maximum RF Transmit Power

RF power variation over temperature range

RF power variation over supply voltage range (*

1.5

RF power variation over BT band

RF power control range (*

0.1

-10

20dB band width for modulated carrier

F = F₀± 2MHz

942

1000

-20

kHz

-20

-40

ACP (1

F = F₀± 3MHz

F = F₀> 3MHz

-40

Drift rate

ΔF_1avg

169

+/-25

140<175

kHz

161

1.1

140<175

>=0.8

kHz

ΔF1_max

ΔF_2avg/ ΔF_1avg

Table 9: Transmitter performance for BDR

Figure 3: Typical TX power as a function of VDD_PA

Silicon Labs

Page 13 of 49

3.5 Radiated Spurious Emissions

Measured from WT41 evaluation board

Min

Typ

Max

Limit by the Standard

(AVG / PEAK)

Standard

Band / Frequency

Unit

(AVG / (AVG / (AVG /

PEAK) PEAK) PEAK)

2nd harmonic

3rd harmonic

Band edge

2390MHz

Band edge

54/58

54 / 74

dBuV/m

50/60

52/63

54 / 74

dBuV/m

FCC part 15

transmitter

spurious

52/65

54/67

2483.5MHz

Band edge

2400MHz

emissions

-50

-20

dBc

(conducted)

Band edge

2483.5MHz

(conducted)

Band edge

2400MHz

2nd harmonic

3rd harmonic

-58

-39

-20

-30

dBc

ETSI EN 300 328

transmitter

spurious

-36

dBm

-41

-30

-47

dBm

emissions

ETSI EN 300 328 (2400 - 2479) MHz

receiver spurious

(1600 - 1653) MHz

-52

Table 10:Radiated spurious emission for WT41-A

Min

(AVG /

PEAK)

Max

(AVG /

PEAK)

50/56

48/52

Typ (AVG

/ PEAK)

Limit by the Standard

(AVG / PEAK)

Standard

Unit

2nd harmonic

3rd harmonic

Band edge

2390MHz

Band edge

2483.5MHz

Band edge 2400

MHz (conducted)

Band edge

<48/55

<48/51

54 / 74

dBuV/m

50/60

52/65

-50

52/63

54 / 74

-20

dBuV/m

dBc

FCC part 15

transmitter

spurious emissions

54/67

3483.5MHz

(conducted)

Band edge

2400MHz

2nd harmonic

3rd harmonic

-58

-39

-20

dBc

-36

-30

ETSI EN 300 328

transmitter

spurious emissions

dBm

-30

-47

dBm

ETSI EN 300 328 (2400 - 2479) MHz

receiver spurious

(1600 - 1653) MHz

Table 11: Radiated spurious emission for WT41-N

Silicon Labs

Page 14 of 49

3.6 Receiver Performance

Antenna gain not taken into account

RF characteristis, VDD = 3.3V,

Bluetooth

Spefication

Packet type Min

Typ

Max

Unit

room temperature (**

DH1

DH3

DH5

2-DH1

2-DH3

2-DH5

3-DH1

3-DH3

3-DH5

-92

-91

-94

-93

-88

-85

-84

-70

dBm

Sensitivity for 0.1% BER

Sensitivity variation over

temperature range

TBD

Table 12: Receiver sensitivity

3.7 Current Consumption

Opearation mode

Peak (mA)

AVG (mA)

2.1

Stand-by, page mode 0

TX 3DH5

TX 2DH5

TX 3DH3

TX 2DH3

TX 2DH1

TX DH5

100.5

99.3

98.1

98.7

164

77.6

71.1

71.2

51.6

120

TX DH1

166

56.8

67.3

52.6

0.36

58.7

Deep sleep

Inquiry

169.3

Table 13: Current consumption

Silicon Labs

Page 15 of 49

3.8 Antenna Performance and Radiation Patterns

Antenna performance measured from the module as a standalone and as mounted to the evaluation board.

Table 14: Total efficiency of the chip antenna

Table 15:Peak gain of the chip antenna

Silicon Labs

Page 16 of 49

WT41 Evaluation Board

WT41 stand alone

Silicon Labs

Page 17 of 49

WT41 Evaluation Board

WT41 stand alone

Silicon Labs

Page 18 of 49

Back side of the

evaluation kit

Back side of

WT41-A

Silicon Labs

Page 19 of 49

4 Physical Dimensions

Figure 4: Physical dimensions (top view)

Figure 5: Dimensions for the RF pin (top view)

Silicon Labs

Page 20 of 49

25.3 mm

5.65 mm

3.35 mm

35.3 mm

14.0 mm

Figure 6: Dimensions of WT41

Figure 7: Recommended land pattern

Silicon Labs

Page 21 of 49

5 Layout Guidelines

5.1 WT41-A

WT41-A should be mounted directly over a solid GND plane. The best performance can be achieved when

placing the module to the left corner or to a middle edge of the mother board, as shown in the figure below.

Components can be mounted directly under the module and the antenna. The antenna is extremely robust for

environment in close proximity to the antenna. Any dielectric material has minor effect on the resonant

frequency of the antenna. Metal objects with physical height less than 2 mm can be placed freely anywhere

around the module within the area of the mother board without significantly effecting on the radiation

characteristics. It is important to place the module to the edge of the mother board and not to place metal

objects in front of the antenna.

Application

board

Figure 8: Recommended positions for WT41-A

Application

board

Figure 9: Do not place the module so that the GND plane reaches in front of the antenna

Silicon Labs

Page 22 of 49

5.2 WT41-N

5.2.1 Layout for WT41-N with u.fl connector close to RF pin

If the trace from the RF pin to u.fl connector is very short there is no need to use impedance controlled trace.

Figure 10 shows an example layout where the u.fl connector is placed right next to the RF pin.

Figure 10: Layout of WT41-N with U.FL connector placed next to the RF pin

5.2.2 Layout for WT41-N with 50 ohm trace from RF pin to a SMA connector

Use 50 ohm transmission line to trace the signal from RF pin to an external RF connector. Figure 11 shows a

layout example for WT41-N with an external SMA connector.

50 ohm trace from RF pin

to a SMA connector

GND contact

for the RF pin

GND stitching vias separated

by max 3 mm

Figure 11: Example RF trace for WT41-N

Silicon Labs

Page 23 of 49

A transmission line impedance calculator, such as TX-Line made by AWR, can be used to approximate the

dimensions for the 50 ohm transmission line. Figure 12 shows an example for two different 50 ohm

transmission lines.

CPW Ground

W = 0.15 mm

G = 0.25 mm

RF GROUND

Prepreg, ε_r= 3.7

RF GROUND

h = 0.076 mm

RF GROUND

FR4, ε_r= 4.6

GND stitching vias

MICROSTRIP

W = 1.8 mm

FR4, ε_r= 4.6

h = 1 mm

RF GROUND

Figure 12: Example cross section of two different 50 ohm transmission line

Silicon Labs

Page 24 of 49

6 UART Interface

This is a standard UART interface for communicating with other serial devices.WT41 UART interface provides

a simple mechanism for communicating with other serial devices using the RS232 protocol.

Four signals are used to implement the UART function. When WT41 is connected to another digital device,

UART_RX and UART_TX transfer data between the two devices. The remaining two signals, UART_CTS and

UART_RTS, can be used to implement RS232 hardware flow control where both are active low indicators. All

UART connections are implemented using CMOS technology and have signalling levels of 0V and VDD.

UART configuration parameters, such as data rate and packet format, are set using WT41 software.

Note:

In order to communicate with the UART at its maximum data rate using a standard PC, an accelerated serial

port adapter card is required for the PC.

Table 16: Possible UART Settings

The UART interface is capable of resetting WT41 upon reception of a break signal. A break is identified by a

continuous logic low (0V) on the UART_RX terminal, as shown in Figure 13. If tBRK is longer than the value,

defined by PSKEY_HOST_IO_UART_RESET_TIMEOUT, (0x1a4), a reset will occur. This feature allows a

host to initialise the system to a known state. Also, WT41 can emit a break character that may be used to

wake the host.

Figure 13: Break Signal

Table 17 shows

list of commonly used data rates and their associated values for

PSKEY_UART_BAUD_RATE (0x204). There is no requirement to use these standard values. Any data rate

within the supported range can be set in the PS Key according to the formula in Equation XXX

Silicon Labs

Page 25 of 49

Equation 1: Data Rate

Table 17: Standard Data Rates

Silicon Labs

Page 26 of 49

6.1 UART Bypass

Figure 14: UART Bypass Architecture

6.2 UART Configuration While Reset is Active

The UART interface for WT41 while the chip is being held in reset is tristate. This will allow the user to daisy

chain devices onto the physical UART bus. The constraint on this method is that any devices connected to

this bus must tristate when WT41 reset is de-asserted and the firmware begins to run.

6.3 UART Bypass Mode

Alternatively, for devices that do not tristate the UART bus, the UART bypass mode on BlueCore4-External

can be used. The default state of BlueCore4-External after reset is de-asserted; this is for the host UART bus

to be connected to the BlueCore4-External UART, thereby allowing communication to BlueCore4-External via

the UART. All UART bypass mode connections are implemented using CMOS technology and have signalling

levels of 0V and VDD.

In order to apply the UART bypass mode, a BCCMD command will be issued to BlueCore4-External. Upon

this issue, it will switch the bypass to PIO[7:4] as Figure 14 indicates. Once the bypass mode has been

invoked, WT41 will enter the Deep Sleep state indefinitely.

In order to re-establish communication with WT41, the chip must be reset so that the default configuration

takes effect.

It is important for the host to ensure a clean Bluetooth disconnection of any active links before the bypass

mode is invoked. Therefore, it is not possible to have active Bluetooth links while operating the bypass mode.

The current consumption for a device in UART bypass mode is equal to the values quoted for a device in

standby mode.

Silicon Labs

Page 27 of 49

7 USB Interface

This is a full speed (12Mbits/s) USB interface for communicating with other compatible digital devices. WT41

acts as a USB peripheral, responding to requests from a master host controller such as a PC.

The USB interface is capable of driving a USB cable directly. No external USB transceiver is required. The

device operates as a USB peripheral, responding to requests from a master host controller such as a PC.

Both the OHCI and the UHCI standards are supported. The set of USB endpoints implemented can behave as

specified in the USB section of the Bluetooth v2.1 + EDR specification or alternatively can appear as a set of

endpoints appropriate to USB audio devices such as speakers.

As USB is a master/slave oriented system (in common with other USB peripherals), WT41 only supports USB

Slave operation.

7.1 USB Data Connections

The USB data lines emerge as pins USB_DP and USB_DN. These terminals are connected to the internal

USB I/O buffers of the BlueCore4-External, therefore, have a low output impedance. To match the connection

to the characteristic impedance of the USB cable, resistors must be placed in series with USB_DP/USB_DN

and the cable.

7.2 USB Pull-Up resistor

WT41 features an internal USB pull-up resistor. This pulls the USB_DP pin weakly high when WT41 is ready

to enumerate. It signals to the PC that it is a full speed (12Mbits/s) USB device.

The USB internal pull-up is implemented as a current source, and is compliant with section 7.1.5 of the USB

specification v1.2. The internal pull-up pulls USB_DP high to at least 2.8V when loaded with a 15k 5% pull-

down resistor (in the hub/host) when VDD_PADS = 3.1V. This presents a Thevenin resistance to the host of

at least 900. Alternatively, an external 1.5k pull-up resistor can be placed between a PIO line and D+ on the

USB cable. The firmware must be alerted to which mode is used by setting PSKEY_USB_PIO_PULLUP

appropriately. The default setting uses the internal pull-up resistor.

7.3 USB Power Supply

The USB specification dictates that the minimum output high voltage for USB data lines is 2.8V. To safely

meet the USB specification, the voltage on the VDD supply terminal must be an absolute minimum of 3.1V.

Bluegiga recommends 3.3V for optimal USB signal quality.

7.4 Self-Powered Mode

In self-powered mode, the circuit is powered from its own power supply and not from the VBUS (5V) line of the

USB cable. It draws only a small leakage current (below 0.5mA) from VBUS on the USB cable. This is the

easier mode for which to design, as the design is not limited by the power that can be drawn from the USB

hub or root port. However, it requires that VBUS be connected to WT41 via a resistor network (Rvb1 and

Rvb2), so WT41 can detect when VBUS is powered up. BlueCore4-External will not pull USB_DP high when

VBUS is off.

Self-powered USB designs (powered from a battery or PSU) must ensure that a PIO line is allocated for USB

pullup purposes. A 1.5k 5% pull-up resistor between USB_DP and the selected PIO line should be fitted to the

design. Failure to fit this resistor may result in the design failing to be USB compliant in self-powered mode.

The internal pull-up in BlueCore is only suitable for bus-powered USB devices, e.g., dongles.

Silicon Labs

Page 28 of 49

Figure 15: USB Connections for Self-Powered Mode

The terminal marked USB_ON can be any free PIO pin. The PIO pin selected must be registered by setting

PSKEY_USB_PIO_VBUS to the corresponding pin number.

Figure 16: USB Interface Component Values

7.5 Bus-Powered Mode

In bus-powered mode, the application circuit draws its current from the 5V VBUS supply on the USB cable.

WT41 negotiates with the PC during the USB enumeration stage about how much current it is allowed to

consume. On power-up the device must not draw more than 100 mA but after being configured it can draw up

to 500 mA.

For WT41, the USB power descriptor should be altered to reflect the amount of power required. This is

accomplished by setting PSKEY_USB_MAX_POWER (0x2c6). This is higher than for a Class 2 application

due to the extra current drawn by the Transmit RF PA. By default for WT41 the setting is 300 mA.

When selecting a regulator, be aware that VBUS may go as low as 4.4V. The inrush current (when charging

reservoir and supply decoupling capacitors) is limited by the USB specification. See the USB Specification.

Some applications may require soft start circuitry to limit inrush current if more than 10uF is present between

VBUS and GND. The 5V VBUS line emerging from a PC is often electrically noisy. As well as regulation down

to 3.3V and 1.8V, applications should include careful filtering of the 5V line to attenuate noise that is above the

voltage regulator bandwidth. Excessive noise on WT41 supply pins will result in reduced receiver sensitivity

and a distorted RF transmit signal.

Silicon Labs

Page 29 of 49

Figure 17: USB Connections for Bus-Powered Mode

7.6 USB Suspend Current

All USB devices must permit the USB controller to place them in a USB suspend mode. While in USB

Suspend, bus-powered devices must not draw more than 2.5mA from USB VBUS (self-powered devices may

draw more than 2.5mA from their own supply). This current draw requirement prevents operation of the radio

by bus-powered devices during USB Suspend.

When computing suspend current, the current from VBUS through the bus pull-up and pull-down resistors

must be included. The pull-up resistor at the device is 1.5 k. (nominal). The pull-down resistor at the hub is

14.25k. to 24.80k. The pull-up voltage is nominally 3.3V, which means that holding one of the signal lines high

takes approximately 200uA, leaving only 2.3mA available from a 2.5mA budget. Ensure that external LEDs

and/or amplifiers can be turned off by BlueCore4-External. The entire circuit must be able to enter the

suspend mode.

7.7 USB Detach and Wake-Up Signaling

WT41 can provide out-of-band signaling to a host controller by using the control lines called USB_DETACH

and USB_WAKE_UP. These are outside the USB specification (no wires exist for them inside the USB cable),

but can be useful when embedding WT41 into a circuit where no external USB is visible to the user. Both

control lines are shared with PIO pins and can be assigned to any PIO pin by setting

PSKEY_USB_PIO_DETACH and PSKEY_USB_PIO_WAKEUP to the selected PIO number.

USB_DETACH is an input which, when asserted high, causes WT41 to put USB_DN and USB_DP in high

impedance state and turns off the pull-up resistor on DP. This detaches the device from the bus and is

logically equivalent to unplugging the device. When USB_DETACH is taken low, WT41 will connect back to

USB and await enumeration by the USB host.

USB_WAKE_UP is an active high output (used only when USB_DETACH is active) to wake up the host and

allow USB communication to recommence. It replaces the function of the software USB WAKE_UP message

(which runs over the USB cable) and cannot be sent while BlueCore4-External is effectively disconnected

from the bus.

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Figure 18: USB_Detach and USB_Wake_Up Signals

7.8 USB Driver

A USB Bluetooth device driver is required to provide a software interface between BlueCore4-External and

Bluetooth software running on the host computer. Please, contact support@bluegiga.com for suitable drivers.

7.9 USB v2.0 Compliance and Compatibility

Although WT41 meets the USB specification, CSR cannot guarantee that an application circuit designed

around the module is USB compliant. The choice of application circuit, component choice and PCB layout all

affect USB signal quality and electrical characteristics. The information in this document is intended as a guide

and should be read in association with the USB specification, with particular attention being given to Chapter

7. Independent USB qualification must be sought before an application is deemed USB compliant and can

bear the USB logo. Such qualification can be obtained from a USB plugfest or from an independent USB test

house.

Terminals USB_DP and USB_DN adhere to the USB Specification v2.0 (Chapter 7) electrical requirements.

BlueCore4-External is compatible with USB v2.0 host controllers; under these circumstances the two ends

agree the mutually acceptable rate of 12Mbits/s according to the USB v2.0 specification.

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8 Serial Peripheral Interface (SPI)

The SPI port can be used for system debugging. It can also be used for programming the Flash memory and

setting the PSKEY configurations. WT41 uses 16-bit data and 16-bit address serial peripheral interface, where

transactions may occur when the internal processor is running or is stopped. SPI interface is connected using

the MOSI, MISO, CSB and CLK pins. Please, contact support@bluegiga.com for detailed information about

the instruction cycle.

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9 PCM Codec Interface

PCM is a standard method used to digitize audio (particularly voice) for transmission over digital

communication channels. Through its PCM interface, WT41 has hardware support for continual transmission

and reception of PCM data, thus reducing processor overhead for wireless headset applications. WT41 offers

a bidirectional digital audio interface that routes directly into the baseband layer of the on-chip firmware. It

does not pass through the HCI protocol layer.

Hardware on WT41 allows the data to be sent to and received from a SCO connection. Up to three SCO

connections can be supported by the PCM interface at any one time.

WT41 can operate as the PCM interface master generating an output clock of 128, 256 or 512kHz. When

configured as PCM interface slave, it can operate with an input clock up to 2048kHz. WT41 is compatible with

a variety of clock formats, including Long Frame Sync, Short Frame Sync and GCI timing environments.

It supports 13-bit or 16-bit linear, 8-bit µ-law or A-law companded sample formats at 8ksamples/s and can

receive and transmit on any selection of three of the first four slots following PCM_SYNC. The PCM

configuration options are enabled by setting PSKEY_PCM_CONFIG32.

WT41 interfaces directly to PCM audio devices.

NOTE: Analog audio lines are very sensitive to RF disturbance. Use good layout practices to ensure noise

less audio. Make sure that the return path for the audio signals follows the forward current all the way as close

as possible and use fully differential signals when possible. Do not compromise audio routing.

9.1 PCM Interface Master/Slave

When configured as the master of the PCM interface, WT41 generates PCM_CLK and PCM_SYNC.

Figure 19: PCM Interface Master

When configured as the Slave of the PCM interface, WT41 accepts PCM_CLK rates up to 2048kHz.

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Figure 20: PCM Interface Slave

9.2 Long Frame Sync

Long Frame Sync is the name given to a clocking format that controls the transfer of PCM data words or

samples. In Long Frame Sync, the rising edge of PCM_SYNC indicates the start of the PCM word. When

WT41 is configured as PCM master, generating PCM_SYNC and PCM_CLK, then PCM_SYNC is 8-bits long.

When WT41 is configured as PCM Slave, PCM_SYNC may be from two consecutive falling edges of

PCM_CLK to half the PCM_SYNC rate, i.e., 62.5s long.

Figure 21: Long Frame Sync (Shown with 8-bit Companded Sample)

WT41 samples PCM_IN on the falling edge of PCM_CLK and transmits PCM_OUT on the rising edge.

PCM_OUT may be configured to be high impedance on the falling edge of PCM_CLK in the LSB position or

on the rising edge.

9.3 Short Frame Sync

In Short Frame Sync, the falling edge of PCM_SYNC indicates the start of the PCM word. PCM_SYNC is

always one clock cycle long.

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Figure 22: Short Frame Sync (Shown with 16-bit Sample)

As with Long Frame Sync, WT41 samples PCM_IN on the falling edge of PCM_CLK and transmits PCM_OUT

on the rising edge. PCM_OUT may be configured to be high impedance on the falling edge of PCM_CLK in

the LSB position or on the rising edge.

9.4 Multi-slot Operation

More than one SCO connection over the PCM interface is supported using multiple slots. Up to three SCO

connections can be carried over any of the first four slots.

Figure 23: Multi-slot Operation with Two Slots and 8-bit Companded Samples

9.5 GCI Interface

WT41 is compatible with the GCI, a standard synchronous 2B+D ISDN timing interface. The two 64kbits/s B

channels can be accessed when this mode is configured.

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Figure 24: GCI Interface

The start of frame is indicated by the rising edge of PCM_SYNC and runs at 8kHz. With WT41 in Slave mode,

the frequency of PCM_CLK can be up to 4.096MHz.

9.6 Slots and Sample Formats

WT41 can receive and transmit on any selection of the first four slots following each sync pulse. Slot durations

can be either 8 or 16 clock cycles. Durations of 8 clock cycles may only be used with 8-bit sample formats.

Durations of 16 clocks may be used with 8-bit, 13-bit or 16-bit sample formats.

WT41 supports 13-bit linear, 16-bit linear and 8-bit -law or A-law sample formats. The sample rate is

8ksamples/s. The bit order may be little or big endian. When 16-bit slots are used, the 3 or 8 unused bits in

each slot may be filled with sign extension, padded with zeros or a programmable 3-bit audio attenuation

compatible with some Motorola codecs.

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Figure 25: 16-bit Slot Length and Sample Formats

9.7 Additional Features

WT41 has a mute facility that forces PCM_OUT to be 0. In master mode, PCM_SYNC may also be forced to 0

while keeping PCM_CLK running which some codecs use to control power down.

9.8 PCM_CLK and PCM_SYNC Generation

WT41 has two methods of generating PCM_CLK and PCM_SYNC in master mode. The first is generating

these signals by DDS from BlueCore4-External internal 4MHz clock. Using this mode limits PCM_CLK to 128,

256 or 512kHz and PCM_SYNC to 8kHz. The second is generating PCM_CLK and PCM_SYNC by DDS from

an internal 48MHz clock (which allows a greater range of frequencies to be generated with low jitter but

consumes more power). This second method is selected by setting bit 48M_PCM_CLK_GEN_EN in

PSKEY_PCM_CONFIG32. When in this mode and with long frame sync, the length of PCM_SYNC can be

either 8 or 16 cycles of PCM_CLK, determined by LONG_LENGTH_SYNC_EN in PSKEY_PCM_CONFIG32.

The Equation XXX describes PCM_CLK frequency when being generated using the internal 48MHz clock:

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Equation 2: PCM_CLK Frequency When Being Generated Using the Internal 48MHz Clock

The frequency of PCM_SYNC relative to PCM_CLK can be set using Equation XXX:

Equation 3: PCM_SYNC Frequency Relative to PCM_CLK

CNT_RATE, CNT_LIMIT and SYNC_LIMIT are set using PSKEY_PCM_LOW_JITTER_CONFIG. As an

example,

generate

PCM_CLK

512kHz

with

PCM_SYNC

8kHz,

set

PSKEY_PCM_LOW_JITTER_CONFIG to 0x08080177.

9.9 PCM Configuration

The PCM configuration is set using two PS Keys, PSKEY_PCM_CONFIG32 detailed in Table 18 and

PSKEY_PCM_LOW_JITTER_CONFIG in Table 19. The default for PSKEY_PCM_CONFIG32 is 0x00800000,

i.e., first slot following sync is active, 13-bit linear voice format, long frame sync and interface master

generating 256kHz PCM_CLK from 4MHz internal clock with no tri-state of PCM_OUT.

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Name

Bit position

Description

Set to 0

0 selects Master mode with internal generation of PCM_CLK and

PCM_SYNC. 1 selects Slave mode requiring externally generated

PCM_CLK and PCM_SYNC. This should be set to 1 if

48M_PCM_CLK_GEN_EN (bit 11) is set.

SLAVE MODE EN

0 selects long frame sync (rising edge indicates start of frame), 1

selects short frame sync (falling edge indicates start of frame).

SHORT SYNC EN

Set to 0

0 selects padding of 8 or 13-bit voice sample into a 16- bit slot by

inserting extra LSBs, 1 selects sign extension. When padding is

selected with 3-bit voice sample, the 3 padding bits are the audio gain

setting; with 8-bit samples the 8 padding bits are zeroes.

0 transmits and receives voice samples MSB first, 1 uses LSB first.

SIGN EXTENDED

LSB FIRST EN

0 drives PCM_OUT continuously, 1 tri-states PCM_OUT immediately

after the falling edge of PCM_CLK in the last bit of an active slot,

assuming the next slot is not active.

TX TRISTATE EN

0 tristates PCM_OUT immediately after the falling edge of PCM_CLK

in the last bit of an active slot, assuming the next slot is also not active.

1 tristates PCM_OUT after the rising edge of PCM_CLK.

TX TRISTATE

RISING EDGE EN

0 enables PCM_SYNC output when master, 1 suppresses PCM_SYNC

whilst keeping PCM_CLK running. Some CODECS utilize this to enter

a low power state.

SYNC SUPPRESS

GCI MODE EN

MUTE EN

1 enables GCI mode.

1 forces PCM_OUT to 0.

0 sets PCM_CLK and PCM_SYNC generation via DDS from internal 4

MHz clock, as for BlueCore4-External. 1 sets PCM_CLK and

PCM_SYNC generation via DDS from internal 48 MHz clock.

48M PCM CLK GEN

0 sets PCM_SYNC length to 8 PCM_CLK cycles and 1 sets length to

16 PCM_CLK cycles. Only applies for long frame sync and with

48M_PCM_CLK_GEN_EN set to 1.

LONG LENGTH

SYNC EN

[20:16]

[22:21]

Set to 0b00000.

Selects 128 (0b01), 256 (0b00), 512 (0b10) kHz PCM_CLK frequency

when master and 48M_PCM_CLK_GEN_EN (bit 11) is low.

MASTER CLK RATE

ACTIVE SLOT

[26:23]

[28:27]

Default is 0001. Ignored by firmaware

Selects between 13 (0b00), 16 (0b01), 8 (0b10) bit sample with 16

cycle slot duration 8 (0b11) bit sample 8 cycle slot duration.

SAMPLE_FORMAT

Table 18: PSKEY_PCM_CONFIG32 description

Name

Bit position

Description

CNT LIMIT

CNT RATE

SYNC LIMIT

[12:0]

[23:16]

[31:24]

Sets PCM_CLK counter limit

Sets PCM_CLK count rate.

Sets PCM_SYNC division relative to PCM_CLK.

Table 19: PSKEY_PCM_LOW_JITTER_CONFIG Description

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10 I/O Parallel Ports

Six lines of programmable bidirectional input/outputs (I/O) are provided. All the PIO lines are power from VDD.

PIO lines can be configured through software to have either weak or strong pull-ups or pull-downs. All PIO

lines are configured as inputs with weak pull-downs at reset. Any of the PIO lines can be configured as

interrupt request lines or as wake-up lines from sleep modes.

WT41 has a general purpose analogue interface pin AIO[1]. This is used to access internal circuitry and

control signals. It may be configured to provide additional functionality.

Auxiliary functions available via AIO[1] include an 8-bit ADC and an 8-bit DAC. Typically the ADC is used for

battery voltage measurement. Signals selectable at this pin include the band gap reference voltage and a

variety of clock signals: 48, 24, 16, 8MHz and the XTAL clock frequency. When used with analogue signals,

the voltage range is constrained by the analogue supply voltage internally to the module (1.8V). When

configured to drive out digital level signals (e.g., clocks), the output voltage level is determined by VDD.

10.1PIO Defaults

Bluegiga cannot guarantee that these terminal functions remain the same. Refer to the software release note

for the implementation of these PIO lines, as they are firmware build-specific.

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11 Reset

WT41 may be reset from several sources: RESET pin, power on reset, a UART break character or via

software configured watchdog timer. The RESET pin is an active low reset and is internally filtered using the

internal low frequency clock oscillator. A reset will be performed between 1.5 and 4.0ms following RESETB

being active. It is recommended that RESET be applied for a period greater than 5ms.

The power on reset occurs when the VDD_CORE supply internally to the module falls below typically 1.5V

and is released when VDD_CORE rises above typically 1.6V. At reset the digital I/O pins are set to inputs for

bidirectional pins and outputs are tri-state.

The reset should be held active at power up until all the supply voltages have stabilized to ensure correct

operation of the internal flash memory. Following figure shows an example of a simple power up reset circuit.

Time constant of the RC circuitry is set so that the supply voltage is safely stabilized before the reset

deactivates.

Figure 26: Example of a simple power on reset circuit.

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11.1Pin States on Reset

PIN NAME

PIO[7:2]

PCM_OUT

PCM_IN

PCM_SYNC

PCM_CLK

UART_TX

UART_RX

UART_RTS

UART_CTS

USB+

STATE

Input with weak pull-down

Tri-staed with weak pull-down

Input with weak pull-down

Output tristated with weak pull-up

Input with weak pull-down

Output tristated with weak pull-up

Input with weak pull-down

Output tristated with weak pull-down

Output, driving low

USB-

SPI_CSB

SPI_CLK

SPI_MOSI

SPI_MISO

AIO[1]

Table 20: Pin States on Reset

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12 Certifications

WT41 is compliant to the following specifications.

12.1Bluetooth

WT41 module is Bluetooth qualified and listed as a controller subsystem and it is Bluetooth compliant to the

following profiles of the core spec version 2.1/2.1+EDR.



Baseband

HCI

Link Manager

Radio

12.2 FCC

This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) this device may not cause harmful interference, and

(2) this device must accept any interference received, including interference that may

cause undesired operation.

FCC RF Radiation Exposure Statement:

This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. End

users must follow the specific operating instructions for satisfying RF exposure compliance. This transmitter

meets both portable and mobile limits as demonstrated in the RF Exposure Analysis and should not be used

closer than 22 mm from a human body in portable configuration. This transmitter must not be co-located or

operating in conjunction with any other antenna or transmitter except in accordance with FCC multi-transmitter

product procedures .

OEM Responsibilities to comply with FCC Regulations

The WT41-A/N Module has been certified for integration into products only by OEM integrators under the

following conditions:



The antenna(s) must be installed such that a minimum separation distance of 22 mm is maintained

between the radiator (antenna) and all persons at all times.



The transmitter module must not be co-located or operating in conjunction with any other antenna or

transmitter except in accordance with FCC multi-transmitter product procedures.

As long as the two conditions above are met, further transmitter testing will not be required. However, the

OEM integrator is still responsible for testing their end-product for any additional compliance requirements

required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.).

IMPORTANT NOTE: In the event that these conditions can not be met (for certain configurations or co-

location with another transmitter), then the FCC and Industry Canada authorizations are no longer considered

valid and the FCC ID can not be used on the final product. In these circumstances, the OEM integrator will be

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responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC and

Industry Canada authorization.

End Product Labeling

The WT41-A/N Module is labeled with its own FCC ID. If the IC Certification Number is not visible when the

module is installed inside another device, then the outside of the device into which the module is installed

must also display a label referring to the enclosed module. In that case, the final end product must be labeled

in a visible area with the following:

“Contains Transmitter Module FCC ID: QOQWT41”

“Contains FCC ID: QOQWT41”

The OEM of the WT41-A/N Module must only use the approved antenna(s) listed in table 21, which have been

certified with this module. The OEM integrator has to be aware not to provide information to the end user

regarding how to install or remove this RF module or change RF related parameters in the user manual of the

end product.

12.3 IC (Industry Canada)

IC Statements:

This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the

following two conditions: (1) this device may not cause interference, and (2) this device must accept any

interference, including interference that may cause undesired operation of the device.

Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and

maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio

interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically

radiated power (e.i.r.p.) is not more than that necessary for successful communication.

If detachable antennas are used:

This radio transmitter (identify the device by certification number, or model number ifCategory II) has been

approved by Industry Canada to operate with the antenna types listed below with the maximum permissible

gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list,

having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this

device. See table 21 for the approved antennas for WT41-N

End Product Labeling

The WT41-A/N Module is labeled with its own IC Certification Number. If the IC Certification Number is not

visible when the module is installed inside another device, then the outside of the device into which the

module is installed must also display a label referring to the enclosed module. In that case, the final end

product must be labeled in a visible area with the following:

“Contains Transmitter Module IC: 5123A-BGTWT41”

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“Contains IC: 5123A-BGTWT41”

To comply with Industry Canada RF radiation exposure limits for general population, the antenna(s)

used for this transmitter must be installed such that a minimum separation distance of 20 cm is

maintained between the radiator (antenna) and all persons at all times and must not be co-located or

operating in conjunction with any other antenna or transmitter.

12.3.1 IC

Déclaration de conformité IC :

Ce matériel respecte les standards RSS exempt de licence d’Industrie Canada. Son utilisation est soumise

aux deux conditions suivantes :

(1) l’appareil ne doit causer aucune interférence, et

(2) l’appareil doit accepter toute interférence, quelle qu’elle soit, y compris les interférences

susceptibles d’entraîner un fonctionnement non requis de l’appareil.

Selon la réglementation d’Industrie Canada, ce radio-transmetteur ne peut utiliser qu’un seul type d’antenne

et ne doit pas dépasser la limite de gain autorisée par Industrie Canada pour les transmetteurs. Afin de

réduire les interférences potentielles avec d’autres utilisateurs, le type d’antenne et son gain devront être

définis de telle façon que la puissance isotrope rayonnante équivalente (EIRP) soit juste suffisante pour

permettre une bonne communication.

Lors de l’utilisation d’antennes amovibles :

Ce radio-transmetteur (identifié par un numéro certifié ou un numéro de modèle dans le cas de la catégorie II)

a été approuvé par Industrie Canada pour fonctionner avec les antennes référencées ci-dessous dans la

limite de gain acceptable et l’impédance requise pour chaque type d’antenne cité. Les antennes non

référencées possédant un gain supérieur au gain maximum autorisé pour le type d’antenne auquel elles

appartiennent sont strictement interdites d’utilisation avec ce matériel. Veuillez vous référer au tableau 21

concernant les antennes approuvées pour les WT41-N.

Les responsabilités de l’intégrateur afin de satisfaire aux réglementations de la FCC et d’Industrie

Canada :

Les modules WT41-A/N ont été certifiés pour entrer dans la fabrication de produits exclusivement réalisés par

des intégrateurs dans les conditions suivantes :



L’antenne (ou les antennes) doit être installée de façon à maintenir à tout instant une distance

minimum de 20cm entre la source de radiation (l’antenne) et toute personne physique.

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

Le module transmetteur ne doit pas être installé ou utilisé en concomitance avec une autre antenne

ou un autre transmetteur.

Tant que ces deux conditions sont réunies, il n’est pas nécessaire de procéder à des tests supplémentaires

sur le transmetteur. Cependant, l’intégrateur est responsable des tests effectués sur le produit final afin de se

mettre en conformité avec d’éventuelles exigences complémentaires lorsque le module est installé (exemple :

émissions provenant d’appareils numériques, exigences vis-à-vis de périphériques informatiques, etc.) ;

IMPORTANT : Dans le cas où ces conditions ne peuvent être satisfaites (pour certaines configurations ou

installation avec un autre transmetteur), les autorisations fournies par la FCC et Industrie Canada ne sont plus

valables et les numéros d’identification de la FCC et de certification d’Industrie Canada ne peuvent servir pour

le produit final. Dans ces circonstances, il incombera à l’intégrateur de faire réévaluer le produit final

(comprenant le transmetteur) et d’obtenir une autorisation séparée de la part de la FCC et d’Industrie Canada.

Etiquetage du produit final

Chaque module WT41-A/N possède sa propre identification FCC et son propre numéro de certification IC. Si

l’identification FCC et le numéro de certification IC ne sont pas visibles lorsqu’un module est installé à

l’intérieur d’un autre appareil, alors l’appareil en question devra lui aussi présenter une étiquette faisant

référence au module inclus. Dans ce cas, le produit final doit comporter une étiquette placée de façon visible

affichant les mentions suivantes :

« Contient un module transmetteur certifié FCC QOQWT41 »

« Contient un module transmetteur certifié IC 5123A-BGTWT41 »

« Inclut la certification FCC QOQWT41 »

« Inclut la certification IC 5123A-BGTWT41 »

L’intégrateur du module WT41-A/N ne doit utiliser que les antennes répertoriées dans le tableau 21 certifiées

pour ce module. L’intégrateur est tenu de ne fournir aucune information à l’utilisateur final autorisant ce

dernier à installer ou retirer le module RF, ou bien changer les paramètres RF du module, dans le manuel

d’utilisation du produit final.

Afin de se conformer aux limites de radiation imposées par la FCC et Industry Canada, l’antenne (ou

les antennes) utilisée pour ce transmetteur doit être installée de telle sorte à maintenir une distance

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minimum de 20cm à tout instant entre la source de radiation (l’antenne) et les personnes physiques.

En outre, cette antenne ne devra en aucun cas être installée ou utilisée en concomitance avec une

autre antenne ou un autre transmetteur.

12.4CE

WT41 meets the requirements of the standards below and hence fulfills the requirements of EMC Directive

89/336/EEC as amended by Directives 92/31/EEC and 93/68/EEC within CE marking requirement. The official

DoC is available at www.bluegiga.com

12.5Japan

WT41-E has modular certification with certification number R 209-J00047

12.6Qualified Antenna Types for WT41-N

This device has been designed to operate with the antennas listed below, and having a maximum gain of 2.3

dBi. Antennas not included in this list or having a gain greater than 2.3 dBi are strictly prohibited for use with

this device. The required antenna impedance is 50 ohms.

Qualified Antenna Types for WT41-N

Antenna Type

Dipole

Maximum Gain

2.3 dBi

Monopole chip antenna

3 dBi

Table 21: Qualified Antenna Types for WT41-N

To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that

the equivalent isotropically radiated power (e.i.r.p.) is not more than that permitted for successful

communication. Using an antenna of a different type and/or or higher gain than listed will require additional

testing for FCC, CE and IC. Please, contact support@bluegiga.com for more information.

Any antenna of the same type and the same or less gain can be used without additional application to FCC.

Table 22 lists approved antennas for WT41. Any approved antenna listed in table 22 can be used directly with

WT41 without any additional approval. Any antenna not listed in table 22 can be used with WT41-N as long as

detailed information from that particular antenna is provided to Bluegiga for approval. Specification of each

antenna used with WT41-N will be filed by Bluegiga. Please, contact support@bluegiga.com for more

information.

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Approved antennas for WT41-N

Specification given by the

manufacturer

Antenna

manufacturer

Pulse

Antenna part

number

Performance measured by BGT

Gain

Efficiency

Gain

Efficiency

70...80%

W1030

Linx

Technologies

Inc

ANT-2.4-CW-

CT-SMA

CAR-ATR-187-

001

1.3

0.8

77 %

Litecon

60...70%

Table 22: Approved Antennas For WT41-N

12.7Moisture Sensitivity Level (MSL)

Moisture sensitivity level (MSL) of this product is 3. For the handling instructions please refer to JEDEC J-

STD-020 and JEDEC J-STD-033.

If baking is required, devices may be baked for 12 hours at 125°C +/-5°C for high temperature device

containers.

Silicon Labs

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or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and

"Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to

make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the

included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses

granted hereunder to design or fabricate any integrated circuits. The products are not designed or authorized to be used within any Life Support System without the specific written consent

of Silicon Laboratories. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant

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weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.

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Silicon Laboratories Inc.

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厂商	型号	描述	页数
XPPOWER	WT400	直流 - 直流电源[ DC-DC Power Supplies ]	2 页
XPPOWER	WT401	直流 - 直流电源[ DC-DC Power Supplies ]	2 页
ETC	WT401X	直流到直流转换器\n[ DC to DC Converter ]	2 页
XPPOWER	WT402	直流 - 直流电源[ DC-DC Power Supplies ]	2 页
ETC	WT402X	直流到直流转换器\n[ DC to DC Converter ]	2 页
XPPOWER	WT402XU	[ 暂无描述 ]	2 页
XPPOWER	WT403	直流 - 直流电源[ DC-DC Power Supplies ]	2 页
XPPOWER	WT403X	[ Analog Circuit ]	2 页
XPPOWER	WT403XU	[ Analog Circuit ]	2 页
XPPOWER	WT404	直流 - 直流电源[ DC-DC Power Supplies ]	2 页