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XUN536156.250JS6X

型号:

XUN536156.250JS6X

品牌:

IDT[ INTEGRATED DEVICE TECHNOLOGY ]

页数:

22 页

PDF大小:

497 K

XU Family of Low Phase Noise  
Quartz-based PLL Oscillators  
XU  
Datasheet  
Description  
Features  
Frequency range: 0.016MHz to 1500MHz[1]  
The XU devices are low phase noise quartz-based PLL oscillators  
supporting a large range of frequencies and output interface  
types. These devices are designed to operate at three different  
power supplies and are available in multiple package sizes as well  
as temperature grades.  
Output types: LVDS, LVPECL, HCSL, LVCMOS  
Supply voltage options: 1.8V, 2.5V, or 3.3V  
Phase jitter (1.875MHz to 20MHz): 100fs typical  
Phase jitter (12kHz to 20MHz): 300fs typical  
Package options:  
With a patented one-time program (OTP) allowing for infinite  
memory shelf life, the XU devices can be programmed to generate  
an output frequency from 16kHz to 1500MHz with a resolution as  
low as 1Hz accuracy. The configuration capability of this family of  
devices allows for fast delivery times for both sample and large  
production orders.  
• 5.0 × 3.2 × 1.2 mm  
• 7.0 × 5.0 × 1.3 mm  
Operating temperature: -20°C to +70°C  
• Frequency stability options: ±20, ±25, ±50, or ±100 ppm  
Operating temperature: -40°C to +85°C  
• Frequency stability options: ±25, ±50, or ±100 ppm  
Operating temperature: -40°C to +105°C  
• Frequency stability options: ±50 or ±100 ppm  
[1] There is a dead zone between 1037.5MHz to 1300MHz.  
Contact www.idt.com/support for frequencies above  
1300MHz.  
Pin Assignments  
E/D 1  
NC  
4 VDD  
NC  
E/D / NC 1  
VDD  
OUT2  
OUT  
6
5
4
NC / E/D  
GND  
2
3
GND 2  
3 OUT  
Table 2. 4-pin Package  
Table 1. 6-pin Package  
Pin # Pin Name  
Description  
Pin # Pin Name  
Description  
[a,b]  
[a,b]  
[a,b]  
1
2
3
4
E/D  
GND  
OUT  
Enable/Disable  
Enable/Disable  
No connect  
E/D  
NC  
1
Connect to ground  
Output  
No connect  
NC  
E/D  
2
Enable/Disable  
V
Supply voltage  
DD  
3
4
5
6
GND  
OUT  
Connect to ground  
Output  
[a] Pulled high internally = output enabled.  
[b] Low = output disabled.  
OUT2  
Complementary output  
Supply voltage  
See Ordering Information for more details.  
V
DD  
©2020 Renesas Electronics Corporation  
1
February 11, 2020  
XU Datasheet  
Absolute Maximum Ratings  
Stresses above the ratings listed below can cause permanent damage to the device. The ratings, which are standard values for Renesas  
commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those  
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended  
periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.  
Table 3. Absolute Maximum Ratings  
Item  
Rating  
V
-0.5 to +5.0V  
-0.5V to V + 0.5V  
DD  
E/D  
DD  
OUT  
-0.5V to V + 0.5V  
DD  
Storage Temperature  
-55°C to 125°C  
125°C  
Maximum Junction Temperature  
Core Current  
65mA maximum  
Theta J  
Theta J  
75.9 °C/W  
48.6°C/W  
89.6 °C/W  
54.3 °C/W  
A
B
JU6  
JS6  
ESD Compliance  
Table 4. ESD Compliance  
Human Body Model (HBM)  
1000V  
Mechanical Testing  
Table 5. Mechanical Testing *  
Parameter  
Test Method  
Mechanical Shock  
Half-sine wave with 0.3ms 3000G. X, Y, Z each direction 1 time.  
Frequency: 10 to 55MHz amplitude: 1.5mm.  
Frequency: 55–2000Hz peak value: 20G.  
Mechanical Vibration  
Duration time: 4H for each X,Y,Z axis; total 12hours.  
High Temp Operating Life (HTOL)  
Hermetic Seal  
2000 hours at 125°C (under power).  
Gross leak (air leak test). Fine leak (Helium leak test) He-pressure: 6kgf/cm² 2 hours.  
* MSL level does not apply.  
Solder Reflow Profile  
tP  
10 seconds Max within5°C of  
260°C peak  
260°C  
Ramp up 3°C/s Max  
225°C  
180°C  
Ramp down not to  
exceed 6°C/s  
50 ±10 seconds  
above 225°C  
reflow area  
160°C  
120 ±20 seconds in  
pre-heating area  
25°C  
400 seconds Max from+25°C to 260°C peak  
©2020 Renesas Electronics Corporation  
2
February 11, 2020  
XU Datasheet  
DC Electrical Characteristics  
Note for all DC Electrical Characteristics tables: A pull-up resistor from VDD to E/D enables output when pin 1 is left open.  
Table 6. 3.3V IDD DC Electrical Characteristics  
VDD = 3.3V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.  
Symbol  
Parameter  
Output Type  
Conditions  
Minimum  
Typical  
Maximum  
Units  
0.016MHz to 400MHz.  
400.000+MHz to 1.5GHz.  
0.016MHz to 212.5MHz.  
212.5+MHz to 400MHz.  
400+MHz to 670MHz.  
0.016MHz to 670MHz.  
0.016MHz to 62.5MHz.  
62.5+MHz to 167MHz.  
97  
LVDS  
122  
115  
128  
142  
145  
98  
LVPECL  
I
Current Consumption  
mA  
DD  
HCSL  
LVCMOS  
108  
Table 7. 2.5V IDD DC Electrical Characteristics  
VDD = 2.5V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.  
Symbol  
Parameter  
Output Type  
Conditions  
Minimum  
Typical  
Maximum  
Units  
0.016MHz to 400MHz.  
400.000+MHz to 1.35GHz.  
0.016MHz to 156.25MHz.  
156.25+MHz to 400MHz.  
400+MHz to 670MHz.  
0.016MHz to 400MHz.  
400.000+MHz to 670MHz.  
0.016MHz to 62.5MHz.  
62.5+MHz to 125MHz.  
125+MHz to 167MHz.  
90  
103  
102  
112  
118  
102  
112  
80  
LVDS  
LVPECL  
HCSL  
I
Current Consumption  
mA  
DD  
LVCMOS  
85  
92  
©2020 Renesas Electronics Corporation  
3
February 11, 2020  
XU Datasheet  
Table 8. 1.8V IDD DC Electrical Characteristics  
VDD = 3.3V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.  
Symbol  
Parameter  
Output Type  
Conditions  
Minimum  
Typical  
Maximum  
Units  
0.016MHz to 400MHz.  
400.000+MHz to 1.0GHz.  
0.016MHz to 250MHz.  
250.000+MHz to 670MHz.  
0.016MHz to 400MHz.  
400.000+MHz to 670MHz.  
0.016MHz to 125MHz.  
65  
72  
75  
97  
68  
77  
58  
LVDS  
LVPECL  
I
Current Consumption  
mA  
DD  
HCSL  
LVCMOS  
Table 9. LVDS DC Electrical Characteristics  
VDD = 3.3V, 2.5V, 1.8V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard  
frequencies.  
Symbol  
Parameter  
Conditions  
Minimum  
Typical  
Maximum  
Units  
V
Differential Output Voltage  
Output Offset Voltage  
0.25  
1
0.4  
0.5  
OD  
V
1.17  
1.375  
OS  
IH  
V
V
Enable/Disable Input High Voltage  
Enable/Disable Input Low Voltage  
70%V  
DD  
V
30%V  
DD  
IL  
Table 10. LVPECL DC Electrical Characteristics  
VDD = 3.3V, 2.5V, 1.8V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard  
frequencies.  
Symbol  
Parameter  
Conditions  
Minimum  
Typical  
Maximum  
Units  
V
V
V
V
V
V
= 3.3V ±5%.  
= 2.5V ±5%.  
= 1.8V ±5%.  
= 3.3V ±5%.  
= 2.5V ±5%.  
= 1.8V ±5%.  
1.85  
1.1  
0.5  
1.1  
0.35  
0
2.3  
1.45  
0.8  
DD  
DD  
DD  
DD  
DD  
DD  
V
Output High Voltage  
OH  
1.65  
0.85  
0.25  
V
V
Output Low Voltage  
OL  
V
Enable/Disable Input High Voltage  
Enable/Disable Input Low Voltage  
70%V  
DD  
IH  
V
30%V  
DD  
IL  
©2020 Renesas Electronics Corporation  
4
February 11, 2020  
XU Datasheet  
Table 11. HCSL DC Electrical Characteristics  
VDD = 3.3V, 2.5V, 1.8V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard  
frequencies.  
Symbol  
Parameter  
Conditions  
Minimum  
Typical  
Maximum  
Units  
V
V
V
= 3.3V ±5%.  
= 2.5V ±5%.  
= 1.8V ±5%.  
0.6  
0.55  
0.45  
0
1.1  
0.95  
0.7  
DD  
DD  
DD  
V
Output High Voltage  
OH  
V
V
Output Low Voltage  
0.2  
OL  
V
Enable/Disable Input High Voltage  
Enable/Disable Input Low Voltage  
70%V  
DD  
IH  
V
30%V  
DD  
IL  
Table 12. LVCMOS DC Electrical Characteristics  
VDD = 3.3V, 2.5V, 1.8V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard  
frequencies.  
Symbol  
Parameter  
Differential Output Voltage  
Output Offset Voltage  
Conditions  
Minimum  
Typical  
Maximum  
10%VDD  
30%VDD  
Units  
VOH  
90%VDD  
V
OL  
V
V
Enable/Disable Input High Voltage  
Enable/Disable Input Low Voltage  
70%VDD  
IH  
V
IL  
©2020 Renesas Electronics Corporation  
5
February 11, 2020  
XU Datasheet  
AC Electrical Characteristics  
Table 13. 3.3V AC Electrical Characteristics  
VDD = 3.3V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.  
Symbol  
Parameter  
Test Condition  
Minimum  
Typical  
Maximum Units  
LVDS.  
0.016  
0.016  
0.016  
±20  
1500  
F
Output Frequency Range  
LVPECL, HCSL.  
LVCMOS.  
670  
167  
MHz  
Temperature = -20°C to +70°C.  
Temperature = -40°C to +85°C.  
Temperature = -40°C to +105°C.  
±100  
±100  
±100  
±3  
ppm  
ppm  
ppm  
Frequency Stability  
±25  
±50  
Aging (1st year)  
Aging (10 years)  
T = 25°C.  
A
T = 25°C.  
±10  
A
LVDS.  
Differential.  
- 2.0V.  
100  
50  
LVPECL.  
HCSL.  
V
DD  
Output Load  
To GND.  
To GND.  
50  
LVCMOS.  
15  
pF  
Output valid time after V meets minimum  
specified level.  
DD  
T
Start-up Time  
Output Rise Time  
10  
ms  
ST  
LVDS.  
275  
275  
380  
400  
330  
3
LVPECL.  
HCSL.  
20% to 80% Vpk-pk.  
ps  
ns  
ps  
ns  
t
R
LVCMOS.  
LVDS.  
10% to 90% V  
DD.  
380  
400  
330  
3
LVPECL.  
HCSL.  
80% to 20% Vpk-pk.  
t
Output Fall Time  
F
LVCMOS.  
LVDS.  
90% to 10% V  
DD.  
45  
45  
40  
45  
45  
40  
55  
F
F
< 312.5MHz.  
> 312.5MHz.  
55  
OUT  
OUT  
LVPECL.  
HCSL.  
60  
O
Output Clock Duty Cycle  
%
DC  
55  
F
F
< 62.5MHz.  
> 62.5MHz.  
55  
OUT  
OUT  
LVCMOS.  
60  
T
Output Enable/ Disable Time  
100  
400  
400  
400  
400  
ns  
OE  
LVDS.  
300  
300  
300  
300  
LVPECL.  
HCSL.  
Phase Jitter  
(12kHz–20MHz)  
f
fsec  
JITTER  
LVCMOS.  
F
6
= 100MHz.  
OUT  
©2020 Renesas Electronics Corporation  
February 11, 2020  
XU Datasheet  
Table 14. 2.5V AC Electrical Characteristics  
VDD = 2.5V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.  
Symbol  
Parameter  
Test Condition  
Minimum  
Typical  
Maximum Units  
LVDS.  
0.016  
0.75  
0.016  
0.016  
±20  
1350  
LVPECL.  
HCSL.  
670  
MHz  
670  
F
Output Frequency Range  
LVCMOS.  
167  
Temperature = -20°C to +70°C.  
Temperature = -40°C to +85°C.  
Temperature = -40°C to +105°C.  
±100  
±100  
±100  
±3  
ppm  
ppm  
ppm  
Frequency Stability  
±25  
±50  
Aging (1st year)  
Aging (10 years)  
T = 25°C.  
A
T = 25°C.  
±10  
A
LVDS.  
Differential.  
- 2.0V.  
100  
50  
LVPECL.  
HCSL.  
V
DD  
Output Load  
To GND.  
To GND.  
50  
LVCMOS.  
15  
pF  
Output valid time after V meets minimum  
specified level.  
DD  
T
Start-up Time  
Output Rise Time  
10  
ms  
ST  
LVDS.  
300  
250  
400  
630  
315  
3
LVPECL.  
HCSL.  
20% to 80% Vpk-pk.  
ps  
ns  
ps  
ns  
t
R
LVCMOS.  
LVDS.  
10% to 90% V  
DD.  
300  
360  
400  
630  
315  
3
LVPECL.  
HCSL.  
80% to 20% Vpk-pk.  
t
Output Fall Time  
F
LVCMOS.  
LVDS.  
90% to 10% V  
DD.  
45  
45  
40  
45  
45  
40  
55  
F
F
< 156.25MHz.  
< 156.25MHz.  
55  
OUT  
OUT  
LVPECL.  
HCSL.  
60  
O
Output Clock Duty Cycle  
%
DC  
55  
F
F
< 62.5MHz.  
> 62.5MHz.  
55  
OUT  
OUT  
LVCMOS.  
60  
T
Output Enable/ Disable Time  
100  
500  
500  
500  
500  
ns  
OE  
LVDS.  
400  
350  
350  
350  
LVPECL.  
HCSL.  
Phase Jitter  
(12kHz–20MHz)  
f
fsec  
JITTER  
LVCMOS.  
F
7
= 100MHz.  
OUT  
©2020 Renesas Electronics Corporation  
February 11, 2020  
XU Datasheet  
Table 15. 1.8V AC Electrical Characteristics  
VDD = 1.8V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.  
Symbol  
Parameter  
Test Condition  
Minimum  
Typical  
Maximum Units  
LVDS.  
0.016  
0.016  
0.016  
±20  
1000  
F
Output Frequency Range  
LVPECL, HCSL.  
LVCMOS.  
670  
125  
MHz  
Temperature = -20°C to +70°C.  
Temperature = -40°C to +85°C.  
Temperature = -40°C to +105°C.  
±100  
±100  
±100  
±3  
ppm  
ppm  
ppm  
Frequency Stability  
±25  
±50  
Aging (1st year)  
Aging (10 years)  
T = 25°C.  
A
T = 25°C.  
±10  
A
LVDS.  
Differential.  
To GND.  
100  
50  
Output Load  
LVPECL, HCSL.  
LVCMOS.  
To GND.  
10  
pF  
Output valid time after V meets minimum  
specified level.  
DD  
T
Start-up Time  
10  
ms  
ST  
LVDS.  
250  
250  
315  
350  
320  
LVPECL.  
HCSL.  
20% to 80% Vpk-pk.  
ps  
ns  
ps  
ns  
t
Output Rise Time  
Output Fall Time  
R
LVCMOS.  
LVDS.  
10% to 90% V  
5
DD.  
250  
250  
315  
350  
320  
LVPECL.  
HCSL.  
80% to 20% Vpk-pk.  
t
F
LVCMOS.  
90% to 10% V  
5
DD.  
F
F
F
F
< 156.25MHz.  
< 156.25MHz.  
< 312.5MHz.  
> 312.5MHz.  
45  
40  
45  
40  
40  
45  
40  
55  
60  
OUT  
OUT  
OUT  
OUT  
LVDS.  
55  
LVPECL.  
HCSL.  
O
Output Clock Duty Cycle  
60  
%
DC  
60  
F
F
< 62.5MHz.  
> 62.5MHz.  
55  
OUT  
OUT  
LVCMOS.  
60  
T
Output Enable/ Disable Time  
100  
1200  
1200  
1200  
1200  
ns  
OE  
LVDS.  
800  
750  
100  
800  
LVPECL.  
HCSL.  
Phase Jitter  
(12kHz–20MHz)  
f
fsec  
JITTER  
LVCMOS.  
F
8
= 100MHz.  
OUT  
©2020 Renesas Electronics Corporation  
February 11, 2020  
XU Datasheet  
Notes for all AC Electrical Characteristics tables:  
1 A pull-up resistor from VDD to E/D enables output when pin 1 is left open.  
2 Installation should include a 0.01μF bypass capacitor placed between VDD and GND to minimize power supply line noise.  
3 Stability is inclusive of 25°C tolerance, operating temperature range, input voltage change, load change, aging, shock and vibration.  
4 Standard LVCMOS frequencies include 10MHz, 12MHz, 12.288MHz, 16MHz, 20MHz, 24MHz, 24.576MHz, 25MHz, 33.333MHz, 40MHz, 48MHz,  
50MHz, 100MHz, 125MHz and 156.25MHz.  
5 Standard differential frequencies include 100MHz, 106.25MHz, 125MHz, 150MHz, 155.52MHz, 156.25MHz, 200MHz, 212.5MHz, 250MHz,  
300MHz, 312.5MHz and 400MHz.  
I2C Bus Characteristics  
Table 16. I2C Bus DC Characteristics  
Symbol  
Parameter  
Input High Level  
Input Low Level  
Conditions  
Minimum  
0.7 × V  
Typical  
Maximum  
Units  
V
V
V
IH  
DD33  
V
0.3 × V  
DD33  
IL  
Table 17. I2C Bus AC Characteristics  
Symbol  
Parameter  
Conditions  
Minimum  
Typical  
Maximum  
Units  
F
Serial Clock Frequency (SCL)  
Bus Free Time between STOP and START  
Setup Time, START  
100  
400  
kHz  
μs  
μs  
μs  
μs  
μs  
ns  
ns  
μs  
μs  
μs  
SCLK  
t
1.3  
0.6  
0.6  
100  
0
BUF  
t
t
SU:START  
HD:START  
Hold Time, START  
t
Setup Time, Data Input (SDA)  
SU:DATA  
HD:DATA  
1
t
Hold Time, Data Input (SDA)  
t
Rise Time, Data and Clock (SDA, SCL)  
Fall Time, Data and Clock (SDA, SCL)  
High Time, Clock (SCL)  
300  
300  
R
t
F
t
0.6  
1.3  
0.6  
HIGH  
t
Low Time, Clock (SCL)  
LOW  
t
Setup Time, STOP  
SU:STOP  
1 A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIH(MIN) of the SCL signal) to bridge the undefined  
region of the falling edge of SCL.  
©2020 Renesas Electronics Corporation  
9
February 11, 2020  
XU Datasheet  
Output Waveforms  
Figure 1. LVDS Output Waveforms  
Output Levels/Rise Time/Fall Time Measurements  
TF  
TR  
OUTPUT 2  
20% to 80%  
VOS  
VOD  
OUTPUT 1  
OUTPUT 2  
Oscillator Symmetry  
VOH  
OUTPUT 1  
VOL  
½ Period  
Period  
Figure 2. LVPECL Output Waveforms  
Rise Time/Fall Time Measurements  
TF  
TR  
VOH  
OUTPUT 2  
20% to 80%  
OUTPUT 1  
OUTPUT 2  
VOL  
Oscillator Symmetry  
VOH  
OUTPUT 1  
VOL  
½ Period  
Period  
©2020 Renesas Electronics Corporation  
10  
February 11, 2020  
XU Datasheet  
Figure 3. HCSL Output Waveforms  
Rise Time/Fall Time Measurements  
TF  
TR  
VOH  
OUTPUT 2  
20% to 80%  
OUTPUT 1  
OUTPUT 2  
VOL  
Oscillator Symmetry  
VOH  
OUTPUT 1  
VOL  
½ Period  
Period  
Figure 4. LVCMOS Output Waveforms  
Rise Time/Fall Time Measurements  
10% to 90%  
20% to 80%  
0V to VDD  
80% to 20%  
Fall Time  
10% to 90%  
Rise Time  
20% to 80%  
Rise Time  
90% to 10%  
Fall Time  
Oscillator Symmetry  
On Time  
½ Period  
Off Time  
½ Period  
50% VDD  
Period  
©2020 Renesas Electronics Corporation  
11  
February 11, 2020  
XU Datasheet  
Package Outline Drawings  
The package outline drawings are appended at the end of this document and are accessible from the links below. The package  
information is the most current data available.  
www.idt.com/document/psc/js6-package-outline-50-x-32-mm-body-11-mm-thick  
www.idt.com/document/psc/ju6-package-outline-70-x-50-mm-body-13-mm-thick  
www.idt.com/document/psc/js4-package-outline-50-x-32-mm-body-11-mm-thick  
www.idt.com/document/psc/ju4-package-outline-70-x-50-mm-body-13-mm-thick  
Ordering Information  
XU  
L
5
3
5
125.000000  
I
Family and ASIC  
Output Type  
Package  
Voltage  
Precision  
Frequency  
Temperature Range  
I: Industrial range40to +85°C  
K: Extended industrial range40to +105°C  
X: Extended commercial range – 20 to +70 °C  
1: 1.8 VDC ±5%  
2: 2.5 VDC ±5%  
3: 3.3 VDC ±5%  
5: 5.0 x 3.2 mm  
7: 7.0 x 5.0 mm  
125.000000 Listed in MHz to 6 digits  
H: HCMOS Enable/DisablePin1  
J: HCMOS Enable/DisablePin2  
L: LVDS Enable/DisablePin1  
M: LVDS Enable/DisablePin 2  
P: LVPECL Enable/DisablePin 1  
Q: LVPECL Enable/DisablePin2  
N: HCSL Enable/DisablePin 1  
O: HCSL Enable/DisablePin2  
000.016000MHzto 999.999999MHz  
A00.000000 to A99.999999 1000MHz to 1099.999MHz  
B00.000000 to B99.999999 1100MHz to 1199.999MHz  
C00.000000 to C99.999999 1200MHz to 1299.999MHz  
D00.000000 to D99.999999 1300MHz to 1399.999 MHz  
E00.000000 to E99.999999 1400MHz to 1499.999MHz  
F00.000000 1500MHz  
X: XHCMOS Comp HCMOS Enable/DisablePin1  
Y: XHCMOS Comp HCMOS Enable/DisablePin 2  
0: ±100 ppm**  
5: ±50 ppm **  
6: ±25 ppm  
XU: 400fs jitter  
8: ±20 ppm *  
* ±20ppm for X (‐20°C to +70°C) only.  
** ±100ppm and ±50ppm for K (‐40°C to +105°C) only.  
©2020 Renesas Electronics Corporation  
12  
February 11, 2020  
XU Datasheet  
Revision History  
Revision Date  
Description of Change  
February 11, 2020  
June 28, 2019  
Added I2C Bus Characteristics tables.  
Added footnote to frequency range bullet under front page Features.  
Updated Package Outline Drawings section.  
June 25, 2018  
November 22, 2017  
Updated Theta JA and JB in Absolute Maximum Ratings table.  
Added MSL statement under Mechanical Testing table.  
Updated ordering information.  
October 19, 2017  
Updated document title.  
Updated Features bullets.  
Updated Absolute Maximum Ratings and ESD Compliance tables.  
Added -40°C to +105°C rating to all electrical tables.  
Removed phase noise charts.  
Updated Ordering Information table.  
May 12, 2017  
Reformatted embedded tables.  
Removed “Jitter Performance” tables and moved the “Phase Jitter (12kHz–20MHz)” parameter to its  
respective AC Electrical Characteristics table.  
Updated all Output Waveform drawings.  
December 1, 2016  
Initial release.  
©2020 Renesas Electronics Corporation  
13  
February 11, 2020  
IMPORTANT NOTICE AND DISCLAIMER  
RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL  
SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING  
REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND  
OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED,  
INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A  
PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible  
for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3)  
ensuring your application meets applicable standards, and any other safety, security, or other requirements. These  
resources are subject to change without notice. Renesas grants you permission to use these resources only for  
development of an application that uses Renesas products. Other reproduction or use of these resources is strictly  
prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property.  
Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims,  
damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject  
to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources  
expands or otherwise alters any applicable warranties or warranty disclaimers for these products.  
(Rev.1.0 Mar 2020)  
Corporate Headquarters  
Contact Information  
TOYOSU FORESIA, 3-2-24 Toyosu,  
Koto-ku, Tokyo 135-0061, Japan  
www.renesas.com  
For further information on a product, technology, the most  
up-to-date version of a document, or your nearest sales  
office, please visit:  
www.renesas.com/contact/  
Trademarks  
Renesas and the Renesas logo are trademarks of Renesas  
Electronics Corporation. All trademarks and registered  
trademarks are the property of their respective owners.  
© 2020 Renesas Electronics Corporation. All rights reserved.  
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