IXD1209/12
BASIC OPERATION
The Error Amplifier of the IXD1209/12 series monitors output voltage divided by internal resistors R1 & R2 and
compares it with the internal Reference Voltage (see Block Diagram above). The output signal from error amplifier
drives gate of the P-channel MOSFET, which is connected to the VOUT pin and operates as a series voltage
regulator.
The Current Limit and Short Protection circuits monitor level of the output current. The CE pin allows shutdown
internal circuitry to minimize power consumption.
Low ESR Capacitors
An internal phase compensation circuit guarantees stable IXD1209/12 operation even if output capacitors with low
ESR are used. However, connect the output capacitor CL as close to the VOUT and the VSS pins as possible to
prevent effectiveness of the phase compensation from degrade. The CL capacitance value should be at least 1µF.
In case the capacitor depends on the bias and temperature, make sure that actual capacitance is maintained at
operating voltage and temperature range. In addition, an input capacitor CIN ≥ 0.1µF between the VIN and VSS pins
should be used to ensure a stable input power.
Current Limiter, Short-Circuit Protection
The IXD1209/12 series include a combination of a fixed current limiter circuit & a foldback circuit, which aid the
operations of the current limiter and circuit protection. When the load current reaches the current limit level, the
fixed current limiter circuit activates and output voltage drops. Because of this drop, the foldback circuit activates
too, and output voltage drops further decreasing output current. When the output pin is shorted, a current of about
50 mA flows.
CE Pin
The CE pin allows shutdown internal circuitry to minimize power consumption. In shutdown mode, output at the
VOUT pin is pulled down to the VSS level via R1 & R2. The operational logic of the CE pin is selectable (please, refer
to the CE PIN FUNCTION Table above).
Note that the standard IXD1209/12B type CE input is an Active High/No Pull Down and operations will become
unstable, if the CE pin is open. CE pin should be used with either VIN or VSS voltage. If this IC is used with some
intermediate voltage at CE pin, supply current may increase due through current in the IC's internal circuitry.
TYPICAL APPLICATION CIRCUIT
The output capacitor CL ≥ 1 µF should be connected between the output pin (VOUT) and the VSS pin for stable regulator’s operation.
Ceramic capacitors with low ESR are recommended.
LAYOUT AND USE CONSIDERATIONS
1. Mount external component as close to the IC as possible and use thick, short connecting traces to
reduce the circuit impedance.
2. The IC may malfunction if absolute maximum ratings are exceeded.
3. If power source of this regulator is a high impedance device with impedance of 10 Ω or more, an input
capacitor CIN ≥ 1µF should be used to prevent oscillations.
4. In case of high output current, increasing the input capacitor value can stabilize operations.
5. Oscillations may occur also, if the input capacitor value is not enough to reduce the input impedance
and the output capacitor CL is large. In such case, operations can be stabilized by either increasing the
input capacitor or reducing the output capacitor.
6. During start-up, IC provides constant current until VOUT = VOUT (T)
.
7. Please ensure that output current IOUT is less than PD / (VIN - VOUT), where PD is a rated power
dissipation value of the package shown at ABSOLUTE MAXIMUM RATING table to not exceed it.
© 2014 IXYS Corp.
Characteristics subject to change without notice
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Doc. No. IXD1209/12_DS, Rev. N0
