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LY69L25616AML-55SLT

型号：

LY69L25616AML-55SLT

品牌：

LYONTEK[ Lyontek Inc. ]

页数：

14 页

PDF大小：

562 K

下载PDF手册
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
REVISION HISTORY  
Revision  
Rev. 1.0  
Description  
Initial Issue  
Issue Date  
Mar.20.2020  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
0
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
FEATURES  
GENERAL DESCRIPTION  
The LY69L25616A is a 4,194,304-bit low power  
CMOS static random access memory organized as  
262,144 words by 16 bits. It is fabricated using very  
high performance, high reliability CMOS technology.  
Its standby current is stable within the range of  
operating temperature.  
Fast access time : 45/55ns  
Low power consumption:  
Operating current : 12mA (TYP.)  
Standby current : 2.5A (TYP.)  
Single 2.7V ~ 3.6V power supply  
ECC : 1-bit error correction per byte  
All inputs and outputs TTL compatible  
Fully static operation  
Tri-state output  
Data byte control : LB# (DQ0 ~ DQ7)  
UB# (DQ8 ~ DQ15)  
Data retention voltage : 1.5V (MIN.)  
Green package available  
Package : 48-ball 6mm*8mm TFBGA  
44-pin 400mil TSOP II  
The LY69L25616A embeds error-correcting code  
(ECC) which can correct single-bit error per byte. It  
is well designed for low power application, and  
particularly well suited for battery back-up  
nonvolatile memory application.  
The LY69L25616A operates from a single power  
supply of 2.7V ~ 3.6V and all inputs and outputs are  
fully TTL compatible  
PRODUCT FAMILY  
Power Dissipation  
Speed  
Product  
Family  
LY69L25616A  
Operating  
Temperature  
0 ~ 70℃  
V
CC Range  
Standby(ISB1,TYP.) Operating(ICC,TYP.)  
2.7 ~ 3.6V  
2.7 ~ 3.6V  
45/55ns  
45/55ns  
2.5µA  
2.5µA  
12mA  
12mA  
-40 ~ 85℃  
LY69L25616A(I)  
FUNCTIONAL BLOCK DIAGRAM  
PIN DESCRIPTION  
SYMBOL  
DESCRIPTION  
Address Inputs  
A0 - A17  
DQ0 – DQ15 Data Inputs/Outputs  
CE#  
WE#  
OE#  
LB#  
UB#  
VCC  
Chip Enable Input  
Write Enable Input  
Output Enable Input  
Lower Byte Control  
Upper Byte Control  
Power Supply  
VSS  
Ground  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
1
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
PIN CONFIGURATION  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
2
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
ABSOLUTE MAXIMUN RATINGS*  
PARAMETER  
SYMBOL  
VT1  
RATING  
-0.5 to 4.6  
-0.5 to VCC+0.5  
0 to 70(C grade)  
-40 to 85(I grade)  
-65 to 150  
1
UNIT  
V
Voltage on VCC relative to VSS  
Voltage on any other pin relative to VSS  
VT2  
V
℃
Operating Temperature  
TA  
℃
W
Storage Temperature  
Power Dissipation  
DC Output Current  
TSTG  
PD  
IOUT  
50  
mA  
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress  
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this  
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.  
TRUTH TABLE  
I/O OPERATION  
MODE  
Standby  
CE# OE# WE# LB# UB#  
SUPPLY CURRENT  
DQ0-DQ7  
DQ8-DQ15  
H
X
X
X
X
X
X
H
X
H
High – Z  
High – Z  
High – Z  
High – Z  
ISB1  
L
L
L
L
L
L
L
L
H
H
L
L
L
X
X
X
H
H
H
H
H
L
L
X
L
H
L
L
H
L
X
L
H
L
L
H
L
High – Z  
High – Z  
DOUT  
High – Z  
DOUT  
DIN  
High – Z  
DIN  
High – Z  
High – Z  
High – Z  
DOUT  
DOUT  
High – Z  
DIN  
Output Disable  
Read  
ICC,ICC1  
ICC,ICC1  
Write  
L
L
ICC,ICC1  
L
DIN  
Note: H = VIH, L = VIL, X = Don't care.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
3
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
DC ELECTRICAL CHARACTERISTICS  
SYMBOL  
TEST CONDITION  
MIN.  
2.7  
2.2  
TYP. *4  
3.0  
MAX.  
3.6  
VCC+0.3  
0.6  
UNIT  
PARAMETER  
Supply Voltage  
Input High Voltage  
Input Low Voltage  
VCC  
V
V
V
*1  
VIH  
VIL  
-
-
*2  
- 0.2  
Input Leakage Current  
ILI  
- 1  
-
1
A
µ
≧
≧
≧
VSS  
VCC  
VCC  
VIN  
Output Leakage  
Current  
≧
VOUT  
VSS,  
ILO  
- 1  
-
1
A
µ
Output Disabled  
Output High Voltage  
Output Low Voltage  
VOH  
VOL  
IOH = -1mA  
IOL = 2mA  
2.2  
-
2.7  
-
-
V
V
0.4  
Cycle time = Min.  
12  
3
20  
5
ICC  
≦
-
-
mA  
CE# 0.2V, II/O = 0mA  
Other pins at 0.2V or VCC-0.2V  
Cycle time = 1 s  
µ
CE# = 0.2V , II/O = 0mA  
Average Operating  
Power supply Current  
ICC1  
mA  
Other pins at 0.2V or VCC - 0.2V  
SL*5  
℃
℃
-
-
-
-
2.5  
2.5  
2.5  
2.5  
5
5
15  
20  
A
µ
A
µ
25  
40  
≧
SLI*5  
CE# VCC - 0.2V  
Standby Power  
Supply Current  
ISB1  
Others at 0.2V or  
CC - 0.2V  
SL  
SLI  
A
µ
A
µ
V
Notes:  
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.  
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.  
3. Over/Undershoot specifications are characterized, not 100% tested.  
4. Typical values are included for reference only and are not guaranteed or tested.  
℃
Typical values are measured at VCC = VCC(TYP.) and TA = 25  
5. This parameter is measured at VCC = 3.0V  
CAPACITANCE (TA = 25℃, f = 1.0MHz)  
PARAMETER  
Input Capacitance  
Input/Output Capacitance  
SYMBOL  
CIN  
MIN.  
-
-
MAX  
6
8
UNIT  
pF  
pF  
CI/O  
Note : These parameters are guaranteed by device characterization, but not production tested.  
AC TEST CONDITIONS  
Input Pulse Levels  
0.2V to VCC - 0.2V  
Input Rise and Fall Times  
Input and Output Timing Reference Levels  
Output Load  
3ns  
1.5V  
CL = 30pF + 1TTL, IOH/IOL = -1mA/2mA  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
4
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
AC ELECTRICAL CHARACTERISTICS  
(1) READ CYCLE  
PARAMETER  
SYM.  
tRC  
UNIT  
LY69L25616A-45  
LY69L25616A-55  
MIN.  
MAX.  
MIN.  
MAX.  
Read Cycle Time  
Address Access Time  
Chip Enable Access Time  
Output Enable Access Time  
Chip Enable to Output in Low-Z  
Output Enable to Output in Low-Z  
Chip Disable to Output in High-Z  
Output Disable to Output in High-Z  
Output Hold from Address Change  
LB#, UB# Access Time  
45  
-
-
-
55  
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tAA  
45  
45  
25  
-
55  
55  
30  
-
tACE  
tOE  
tCLZ  
tOLZ  
tCHZ  
-
-
*
*
*
10  
5
-
-
10  
-
10  
5
-
-
10  
-
-
-
15  
15  
-
45  
20  
-
20  
20  
-
55  
25  
-
tOHZ  
tOH  
tBA  
*
LB#, UB# to High-Z Output  
LB#, UB# to Low-Z Output  
tBHZ  
tBLZ  
*
*
-
10  
-
10  
(2) WRITE CYCLE  
PARAMETER  
SYM.  
tWC  
tAW  
tCW  
tAS  
UNIT  
LY69L25616A-45  
LY69L25616A-55  
MIN.  
45  
40  
40  
0
MAX.  
MIN.  
55  
50  
50  
0
MAX.  
Write Cycle Time  
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Valid to End of Write  
Chip Enable to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Data to Write Time Overlap  
Data Hold from End of Write Time  
Output Active from End of Write  
Write to Output in High-Z  
LB#, UB# Valid to End of Write  
-
-
tWP  
tWR  
tDW  
tDH  
tOW  
35  
0
-
-
45  
0
-
-
20  
0
-
-
25  
0
-
-
*
5
-
5
-
tWHZ  
*
-
15  
-
45  
20  
-
tBW  
35  
-
*These parameters are guaranteed by device characterization, but not production tested.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
5
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
TIMING WAVEFORMS  
READ CYCLE 1 (Address Controlled) (1,2)  
tRC  
Address  
Dout  
tAA  
tOH  
Previous Data Valid  
Data Valid  
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)  
tRC  
Address  
tAA  
CE#  
tACE  
LB#,UB#  
tBA  
OE#  
tOE  
tOH  
tOLZ  
tBLZ  
tCLZ  
tOHZ  
tBHZ  
tCHZ  
High-Z  
Dout  
High-Z  
Data Valid  
Notes :  
1.WE# is high for read cycle.  
2.Device is continuously selected OE# = low, CE# = low, LB# or UB# = low.  
3.Address must be valid prior to or coincident with CE# = low, LB# or UB# = low transition; otherwise tAA is the limiting parameter.  
4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.  
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tBHZ is less than tBLZ, tOHZ is less than tOLZ.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
6
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
WRITE CYCLE 1 (WE# Controlled) (1,2,4,5)  
WRITE CYCLE 2 (CE# Controlled) (1,4,5)  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
7
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
WRITE CYCLE 3 (LB#,UB# Controlled)  
(1,4,5)  
Notes :  
1.A write occurs during the overlap of a low CE#, low WE#, LB# or UB# = low.  
2.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be  
placed on the bus.  
3.During this period, I/O pins are in the output state, and input signals must not be applied.  
4.If the CE#, LB#, UB# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance  
state.  
5.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
8
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
DATA RETENTION CHARACTERISTICS  
PARAMETER  
SYMBOL  
TEST CONDITION  
MIN. TYP. MAX. UNIT  
VCC for Data Retention  
VDR  
1.5  
-
3.6  
5
5
15  
20  
V
≧
CE#  
VCC - 0.2V  
℃
℃
-
-
-
-
2
2
2
2
A
25  
40  
SL  
SLI  
µ
µ
µ
µ
VCC = 1.5V  
A
A
A
Data Retention Current  
IDR  
≧
CE#  
VCC - 0.2V  
SL  
SLI  
Other pins at 0.2V or VCC-0.2V  
Chip Disable to Data  
Retention Time  
Recovery Time  
See Data Retention  
Waveforms (below)  
tCDR  
tR  
0
-
-
-
-
ns  
ns  
tRC*  
tRC*  
= Read Cycle Time  
DATA RETENTION WAVEFORM  
Low Vcc Data Retention Waveform (1) (CE# controlled)  
Low Vcc Data Retention Waveform (2) (LB#, UB# controlled)  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
9
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
PACKAGE OUTLINE DIMENSION  
44-pin 400mil TSOP II Package Outline Dimension  
DIMENSIONS IN MILLMETERS  
SYMBOLS  
DIMENSIONS IN MILS  
MIN.  
-
NOM.  
-
MAX.  
1.20  
0.15  
1.05  
0.45  
0.21  
18.618  
12.014  
10.363  
-
MIN.  
NOM.  
-
MAX.  
A
A1  
A2  
b
-
47.2  
5.9  
41.3  
17.7  
8.3  
733  
473  
408  
-
0.05  
0.95  
0.30  
0.12  
18.212  
11.506  
9.957  
-
0.10  
1.00  
-
2.0  
37.4  
11.8  
4.7  
717  
453  
392  
-
3.9  
39.4  
-
c
-
-
D
18.415  
11.760  
10.160  
0.800  
0.50  
0.805  
-
725  
463  
400  
31.5  
19.7  
31.7  
-
E
E1  
e
L
0.40  
-
0.60  
-
15.7  
-
23.6  
-
ZD  
y
-
0o  
0.076  
6o  
-
0o  
3
6o  
3o  
3o  
Θ
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
10  
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
48-ball 6mm × 8mm TFBGA Package Outline Dimension  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
11  
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
ORDERING INFORMATION  
Package Type Access Time  
Power Type  
Temperature  
Packing  
Type  
Lyontek Item No.  
Range(℃)  
(Speed/ns)  
44-pin(400mil)  
45  
Special Ultra  
Low Power  
Tray  
LY69L25616AML-45SL  
LY69L25616AML-45SLT  
LY69L25616AML-45SLI  
LY69L25616AML-45SLIT  
LY69L25616AML-55SL  
LY69L25616AML-55SLT  
LY69L25616AML-55SLI  
LY69L25616AML-55SLIT  
℃
℃
~70  
0
TSOP II  
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
55  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
48-ball  
45  
55  
Special Ultra  
Low Power  
Tray  
LY69L25616AGL-45SL  
LY69L25616AGL-45SLT  
LY69L25616AGL-45SLI  
LY69L25616AGL-45SLIT  
LY69L25616AGL-55SL  
LY69L25616AGL-55SLT  
LY69L25616AGL-55SLI  
LY69L25616AGL-55SLIT  
℃
℃
~70  
0
(6mm x 8mm)  
TFBGA  
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Tray  
Special Ultra  
Low Power  
℃
℃
~70  
0
Tape Reel  
Tray  
℃
-40 ~85  
℃
Tape Reel  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
12  
LY69L25616A  
256K X 16 BIT LOW POWER CMOS SRAM  
With Error-Correcting Code (ECC)  
.
Rev. 1.0  
THIS PAGE IS LEFT BLANK INTENTIONALLY.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
13  
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