®
LY61L102416A
1024K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 1.2
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
MIN.
-
-
MAX
8
10
UNIT
pF
pF
CIN
CI/O
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
speed
10/12ns
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
0.2V to Vcc-0.2V
3ns
Vcc/2
CL = 30pF + 1TTL,
IOH/IOL = -8mA/4mA
Output Load
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
LY61L102416A-10
LY61L102416A-12
SYM.
tRC
UNIT
MIN.
MAX.
MIN.
MAX.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
10
-
-
-
10
10
4.5
-
12
-
-
-
12
12
5
-
Address Access Time
tAA
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
LB#, UB# Access Time
tACE
tOE
tCLZ
tOLZ
tCHZ
-
-
*
*
2
0
-
3
0
-
-
2
-
-
-
*
4
5
5
-
5
5
-
tOHZ
tOH
tBA
*
-
4
2
-
-
-
4.5
4
LB#, UB# to High-Z Output
LB#, UB# to Low-Z Output
tBHZ
*
-
tBLZ
*
0
-
0
(2) WRITE CYCLE
PARAMETER
LY61L102416A-10
LY61L102416A-12
SYM.
UNIT
MIN.
10
8
MAX.
MIN.
12
10
10
0
MAX.
Write Cycle Time
tWC
tAW
tCW
tAS
tWP
tWR
tDW
tDH
-
-
-
-
-
-
-
-
-
4
-
-
-
-
-
-
-
-
-
-
5
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
8
0
8
0
Write Pulse Width
10
0
7
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
LB#, UB# Valid to End of Write
6
0
2
-
0
2
-
tOW
tWHZ
tBW
*
*
8
10
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
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