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IXD2135B34CDR-G

型号：

IXD2135B34CDR-G

品牌：

IXYS[ IXYS CORPORATION ]

页数：

26 页

PDF大小：

1716 K

下载PDF手册
IXD2135/36  
Synchronous 1A Step-Up DC/DC Converter  
transistor capable of providing up to 1.0 A inductor  
peak current.  
FEATURES  
o
o
Operating Input Voltage Range: 0.65 V ~ 6.5 V  
Output Voltage Range: 1.8 V~5.0V with (0.1V  
The IXD2135/36 are able to start operation at 0.9 V  
input voltage to generate 3.3 V output voltage with a  
33 Ω load resistor, which is suitable for mobile  
equipment powered from a single Alkaline or Nickel  
metal hydride battery.  
increments, accuracy ±2.0%)  
o
o
o
Oscillation Frequency: 1.2 MHz ± 15%  
Built-in Switching 0.2 Ω NMOSFET  
Build-in Synchronous Rectification 0.2 Ω  
PMOSFET  
The load disconnect function cuts the current  
conduction path from input to output at shutdown  
mode.  
o
o
o
Operating Mode: PWM or PWM/PFM Auto  
Selection  
Protection: Over-Current Limit Latch, Thermal  
Shutdown  
The output voltage is selectable in 0.1 V increments  
within 1.8 ~ 5.0 V (± 2.0% accuracy).  
Functions: Under-Voltage Lockout, Soft Start,  
Load Disconnect, Load Capacitor Auto  
Discharge,  
The Under-voltage Lockout (UVLO) function prevents  
battery damage due deep discharge.  
The UVLO threshold voltage is 0.85 V (B/K versions)  
or 1.6V A/C versions), and are selectable in the  
range from 0.9 V to 3.0 V.  
o
o
Operating Ambient Temperature: -40 - +850C  
Package: USP-10B (10-pin 2.6 x 2.9 x 0.6 mm)  
o
EU RoHS Compliant, Pb Free  
The IXD2135/36 requires only inductor and three  
ceramic capacitors connected externally for normal  
operations.  
APPLICATION  
o
o
o
Mobile phones  
Cameras, VCRs  
Maximum oscillation frequency is set at 1.2 MHz in  
PWM mode and maximum duty cycle is set at 93%  
making it suitable for use with large load current. The  
IXD2135/36 are able switch automatically between  
PWM and PFM modes to support both large and  
small load currents.  
Various portable equipment powered from 1  
– 3 cell alkaline or 1 cell Li-ion batteries  
DESCRIPTION  
The IXD2135/36 are synchronous step-up DC/DC  
converters with build-in a 0.2 Ω N-channel switching  
transistor and a 0.2 Ω synchronous P-channel  
The IXD2135/36 use small 10-pin 2.6 x 2.9 x 0.6 mm  
USP-10B package.  
TYPICAL APPLICATION CIRCUIT  
TYPICAL PERFORMANCE CHARACTERISTIC  
Efficiency vs. Output Current  
IXD2135C32CDR-G (VOUT=3.2V)  
L = 4.7 μH (VLF3014ST-4R7M1R1), CL = 22 μF (LMK316ABJ226ML), C = 10 μF (JMK212ABJ106KG),  
IN  
CDD = 0.47 μF (TMK107BJ474KA) fOSC=1.2MHz  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
1
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
ABSOLUTE MAXIMUM RATINGS  
PARAMETER  
SYMBOL  
RATINGS  
– 0.3 ~ 7.0  
– 0.3 ~ VOUT + 0.3  
±2000  
UNITS  
VOUT Voltage  
VOUT  
VLx  
ILx  
V
V
Lx Pin Voltage  
Lx Pin Current  
mA  
V
FO Pin Voltage  
VFO  
IFO  
– 0.3 ~ 7.0  
10  
FO Pin Current  
mA  
V
CDF Pin Voltage (IXD2135 only)  
VIN Pin Voltage  
VCDF  
VIN  
– 0.3 ~ 7.0  
– 0.3 ~ 7.0  
– 0.3 ~ 7.0  
150  
V
EN Pin Voltage  
VEN  
PD  
Power Dissipation  
USP-10B  
mW  
0C  
0C  
Operating Temperature Range  
Storage Temperature Range  
TOPR  
TSTG  
– 40 ~ + 85  
– 55 ~ +125  
ELECTRICAL OPERATING CHARACTERISTICS  
0
IXD2135A/C  
Ta = 25 C  
PARAMETER  
Input Voltage  
SYMBOL  
VIN  
CONDITIONS  
MIN.  
TYP.  
E1  
MAX.  
5. 5  
UNIT  
V
CIRCUIT  
VIN = VUVLO_R(E)  
,
Output Voltage  
VOUT  
V
V
RL in respect with Table F1  
1)  
IXD2135A/C  
IXD2135/B  
VST1  
VMODE = 0, VOUT ≤ 3.3 V IOUT = 100 mA  
VMODE = 0, VOUT > 3.3 V IOUT = 50 mA  
RL = 1 kΩ, VMODE = 0 V  
-
VUVLO_R  
0.91)  
-
Operating  
Start Voltage  
Operating Hold Voltage  
Supply Current  
VHLD  
IQ  
0.7  
-
V
E2  
µA  
IXD2135A/C  
1.1  
1.5  
0.2  
0.2  
1.0  
0.1  
1.20  
93.0  
4.0  
6.0  
VIN Pin  
Current  
IVIN  
VIN = VOUT(E) – 0.2 V, VEN = 3,3 V  
µA  
µA  
IXD2135/B  
IXD2135A  
IXD2135/B  
IXD2135/C  
3.5  
Standby  
Current  
ISTB  
VIN = VOUT(E), VEN = 0 V  
4.5  
6.0  
Lx Leakage Current  
Oscillation Frequency  
Maximum Duty Cycle  
ILxL  
fOSC  
DMAX  
VIN = VLX = VOUT(E)  
2.0  
µA  
MHz  
%
VIN = VPULL = (VOUT(E) + VUVLO_R(E))/2  
1.02  
86.5  
1.38  
98.0  
VIN = VPULL = (VOUT(E) + VUVLO_R(E))/2  
VIN = VOUT(E) + 0.5 V,  
RL in respect with Table F1  
Minimum Duty Cycle  
PFM Switching Current  
Efficiency 2)  
DMIN  
IPFM  
0
%
mA  
%
VMODE = 0 V, RL in respect with Table F1  
250  
93  
350  
EFFI  
IOUT = 100 mA, VMODE = 0 V, VFO - open  
Lx Switch P-channel ON  
Resistance  
RLXP  
RLXN  
IOUT = 200 mA3)  
0.20  
0.351)  
0.351)  
Ω
Ω
Lx Switch N-channel ON  
0.201)  
Resistance4)  
Maximum Current Limit  
Integral Latch Time12)  
ILIM  
tLAT  
E3  
A
VIN = VOUT(E)/2  
0.5  
2.6  
2.0  
4.0  
8.5  
ms  
Soft Start Time13)  
tSS  
5.0  
ms  
0C  
VIN = VPULL = (VOUT(E) + VUVLO_R(E))/2,  
VOUT = VOUT(E) x 0.95  
Thermal Shutdown  
Temperature  
TSD  
150  
Thermal Hystetresis  
CL Discharge Resistance7)  
THYS  
RDCH  
20  
200  
200  
150  
0
0C  
VIN = VOUT = 2.0 V5)  
VEN = 3.3 V, VFO = 0.5 V, VOUT(E) < 3.3 V  
VEN = 3.3 V, VFO = 0.5 V, VOUT(E) ≥ 3.3 V  
VFO = 5.5 V  
100  
100  
100  
400  
250  
200  
1
Ω
FO ON Resistance6)  
RFO  
IFOL  
Ω
FO Leakage Current  
µA  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
2
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
EN HIGH Voltage8)  
EN LOW Voltage9)  
MODE HIGH Voltage10)  
MODE LOW Voltage11)  
EN HIGH Current  
VENH  
VIN = VPULL = (VOUT(E)+ VUVLO_R(E))/2  
VIN = VPULL = (VOUT(E)+ VUVLO_R(E))/2  
RL in respect with Table F1  
RL in respect with Table F1  
VIN = VEN = 5.5 V  
0.75  
0
5.5  
0.2  
V
V
VENL  
VMODEH  
VMODEL  
IENH  
0.75  
0
5.5  
V
0.2  
V
0.1  
µA  
µA  
µA  
µA  
V
EN LOW Current  
IENL  
VIN = 5.5 V, VEN = 0 V  
-0.1  
0.2  
MODE HIGH Current  
MODE LOW Current  
IMODEH  
IMODE L  
VUVLO_R  
VIN = VEN = VMODE = 5.5 V  
VIN = VEN = 5.5 V, VMODE= 0 V  
RL = 1 kΩ  
0.1  
-0.1  
1.552  
0.799  
0.1  
0.2  
IXD2135A/C  
1.600  
0.850  
0.14  
0.14  
1.5  
1.648  
0.901  
0.2  
UVLO Release  
Voltage14)  
IXD2135/B  
IXD2135A/C  
IXD2135/B  
V
VUVLO_H  
V
UVLO  
Hysteresis15)  
0.05  
1.4  
0.2  
V
VOUT Drop Protection16, 17)  
UVLO Detect Delay18)  
VLVP  
t D F  
1.6  
V
0.5  
1.0  
1.5  
ms  
NOTE:  
External Components： CIN = 10 μF(ceramic), L = 2.2 μH (VLCF4020 TDK), CDD = 0.47 μF (ceramic), CL= 22 μF (ceramic), CDF = 1000 pF  
(ceramic)  
Test Conditions  
For the Circuit No.1, unless otherwise stated, VIN = (VOUT (E) + VUVLO_R (E))/2, VEN = VMODE = VFO = 3.3 V  
For the Circuit No.2, unless otherwise stated, VIN = VEN = VOUT (E) + 0.5 V, VMODE = 0 V (GND connected), CDF: OPEN  
For the Circuit No.3, unless otherwise stated, VOUT = VEN = VMODE = 0 V (GND connected), CDF: OPEN  
For the Circuit No.4, unless otherwise stated, VOUT = VEN = VMODE = 0 V (GND connected), CDF: OPEN  
For the Circuit No.5, unless otherwise stated, VIN = VPULL = 1.5 V, VOUT = VEN = VMODE = VFO = VOUT (E) - 0.1 V,  
For the Circuit No.6, unless otherwise stated, VOUT = VOUT (E) + 0.5 V, VEN = VMODE = 0 V (GND connected), CDF: OPEN  
For the Circuit No.7, unless otherwise stated, VIN = VOUT (E) + 0.5 V, VEN = VMODE = 0 V (GND connected), CDF: OPEN  
For the Circuit No.8, unless otherwise stated, VIN = VLX = VOUT (E) + 0.5 V, VEN = VMODE = 3.3 V, CDF: OPEN  
For the Circuit No.9, unless otherwise stated, V = 1.1 V, VOUT = 1.6 V, VEN = 3.3 V, VMODE = VFB(CDF) = 0 V (GND connected)  
IN  
VOUT (E) = Output Voltage Setting, VUVLO_R (E) = UVLO Voltage Setting, VUVLO_F = VUVLO_R – VUVLO_H  
1) Design target value  
2) Efficiency = [{(output voltage) X (output current)} ÷ {(input voltage) X (input current)}] X 100  
3) LX SW P-channel ON resistance = (VLx - VOUT pin test voltage)/200 mA  
4) See testing method of LX SW N-channel ON resistance at test circuit description.  
5) CL Discharge resistance = VOUT / VOUT pin measurement current.  
6) FO ON resistance = VFO / FO pin measurement current.  
7) IXD2135A/B version only  
8) Voltage at EN pin to start oscillation  
9) Voltage at EN pin to stop oscillation  
10) Voltage to start PWM mode  
11) Voltage to start PFM mode  
12) Time to stop LX oscillation from moment FO = HIGH  
13) Time to FO = LOW after VEN =3.3 V  
14) Voltage to start oscillation, while VIN transits from 0.2 V to 3.3 V  
15) The Voltage is a difference between VUVLO_R and the voltage to stop oscillation at Lx pin while V =VUVLO_R → 0.2 V. RL = 1 kΩ  
IN  
16) Voltage to stop oscillation, while VOUT = 1.7 1.3 V  
17) IXD2135B version only  
18) Time to stop oscillation after VIN = VPULL = (VOUT(E) + VUVLO_R(E))/2 – 0.65 V  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
3
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
ELECTRICAL OPERATING CHARACTERISTICS (Continued)  
IXD2136E/N  
Ta = 25 0C  
PARAMETER  
Input Voltage  
SYMBOL  
VIN  
CONDITIONS  
MIN.  
TYP.  
E1  
MAX.  
5. 5  
UNIT  
CIRCUIT  
V
V
V
Output Voltage  
VOUT  
RL in respect with Table F1  
RL = 1 kΩ, VMODE = 0  
-
0.85  
0.91)  
Operating Start Voltage  
VST1  
VMODE = 0, VOUT > 3.3 V IOUT = 50mA  
VOUT ≤ 3.3 V IOUT = 100 mA  
Operating Hold Voltage  
Supply Current  
VHLD  
IQ  
RL = 1 kΩ, VMODE = 0 V  
0.65  
-
-
V
36  
52  
µA  
µA  
VIN Pin Current  
IVIN  
VIN = VOUT(E) – 0.2 V, VEN = 3,3 V  
VIN = VOUT(E), VEN = 0 V  
0.65  
0.1  
0.9  
0.1  
1.20  
93.0  
2.15  
2.0  
5.0  
2.0  
1.38  
98.0  
IXD2136E  
IXD2136N  
Standby  
Current  
ISTB  
µA  
Lx Leakage Current  
Oscillation Frequency  
Maximum Duty Cycle  
ILxL  
fOSC  
VIN = VLX = VOUT(E)  
µA  
MHz  
%
VIN = VPULL = (VOUT(E) + VUVLO_R(E))/2  
1.02  
86.5  
DMAX  
VIN = VPULL = (VOUT(E) + VUVLO_R(E))/2  
VIN = VOUT(E) + 0.5 V,  
RL in respect with Table F1  
Minimum Duty Cycle  
DMIN  
0
%
PFM Switching Current  
Efficiency 2)  
IPFM  
VMODE = 0 V, RL in respect with Table F1  
IOUT = 100 mA, VMODE = 0 V, VFO - open  
250  
93  
350  
mA  
%
EFFI  
Lx Switch P-channel ON  
Resistance  
RLXP  
IOUT = 200 mA3)  
0.20  
0.351)  
0.351)  
Ω
Lx Switch N-channel ON  
RLXN  
ILIM  
tSS  
0.201)  
E3  
Ω
A
Resistance4)  
Maximum Current Limit  
Soft Start Time12)  
VIN = VPULL = (VOUT(E) + VUVLO_R(E))/2,  
2.6  
5.0  
8.5  
ms  
VOUT = VOUT(E) x 0.95  
Thermal Shutdown  
Temperature  
TSD  
150  
0C  
Thermal Hystetresis  
CL Discharge Resistance7)  
THYS  
RDCH  
20  
200  
200  
150  
0
0C  
VIN = VOUT = 2.0 V5)  
VEN = 3.3 V, VFO = 0.5 V, VOUT(E) < 3.3 V  
VEN = 3.3 V, VFO = 0.5 V, VOUT(E) ≥ 3.3 V  
VFO = 5.5 V  
100  
100  
100  
400  
250  
200  
1
Ω
FO ON Resistance6)  
RFO  
Ω
FO Leakage Current  
EN HIGH Voltage8)  
EN LOW Voltage9)  
MODE HIGH Voltage10)  
MODE LOW Voltage11)  
EN HIGH Current  
IFOL  
VENH  
µA  
V
VIN = VPULL = (VOUT(E) + VUVLO_R(E))/2  
VIN = VPULL = (VOUT(E) + VUVLO_R(E))/2  
RL in respect with Table F1  
RL in respect with Table F1  
VIN = VEN = 5.5 V  
0.75  
0
5.5  
0.2  
5.5  
0.2  
0.1  
0.2  
0.1  
0.2  
VENL  
V
VMODEH  
VMODEL  
IENH  
0.75  
0
V
V
µA  
µA  
µA  
µA  
EN LOW Current  
IENL  
VIN = 5.5 V, VEN = 0 V  
-0.1  
-0.1  
MODE HIGH Current  
MODE LOW Current  
IMODEH  
IMODEL  
VIN = VEN = VMODE = 5.5 V  
VIN = VEN = 5.5 V, VMODE= 0 V  
NOTE:  
External Components： CIN = 10 μF(ceramic), L = 2.2 μH (VLCF4020 TDK), CDD = 0.47 μF (ceramic), CL= 22 μF (ceramic)  
Test Conditions  
For the Circuit No.1, unless otherwise stated, Circuit No.1 VIN = 1.6 V, VEN = VMODE = 3.3 V  
For the Circuit No.2, unless otherwise stated, Circuit No.2 VIN = VEN = VOUT (E) + 0.5 V, VMODE = 0 V (GND connected)  
For the Circuit No.3, unless otherwise stated, VOUT = VEN = VMODE = 0 V (GND connected)  
For the Circuit No.4, unless otherwise stated, VOUT = VEN = VMODE = 0 V (GND connected)  
For the Circuit No.5, unless otherwise stated, VIN = VPULL = 1.5 V, VOUT = VEN = VMODE = VFO = VOUT (E) - 0.1 V  
For the Circuit No.6, unless otherwise stated, VOUT = VOUT (E) + 0.5 V, VEN = VMODE = 0 V (GND connected)  
For the Circuit No.7, unless otherwise stated, VIN = VOUT (E) + 0.5 V, VEN = VMODE = 0 V  
For the Circuit No.8, unless otherwise stated, VIN = VLX = VOUT (E) + 0.5 V, VEN = VMODE = 3.3 V  
For the Circuit No.9, unless otherwise stated, VIN = 1.1 V, VOUT = 1.6 V, VEN = 3.3 V,VMODE = 0 V (GND connected)  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
4
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
VOUT (E) = Output Voltage Setting,  
1) Design target value  
2) Efficiency = [{(output voltage) X (output current)} ÷ {(input voltage) X (input current)}] X 100  
3) LX SW P-channel ON resistance = (VLx - VOUT pin test voltage)/200 mA  
4) See testing method of LX SW N-channel ON resistance at test circuit description.  
5) CL Discharge resistance = VOUT / VOUT pin measurement current.  
6) FO ON resistance = VFO / FO pin measurement current.  
7) IXD2136E version only  
8) Voltage at EN pin to start oscillation  
9) Voltage at EN pin to stop oscillation  
10) Voltage to start PWM mode  
11) Voltage to start PFM mode  
12) Time to FO = LOW after VEN =3.3 V  
IXD2135/36 VOLTAGE CHART  
Table F1  
Symbol  
E1  
Output Voltage  
Error Margin  
V
E2  
Supply  
Current  
µA  
E3  
VOUT(E)  
V
1.8 ≤ VOUT(E) < 2.1  
2.1 ≤ VOUT(E) < 3.1  
3.1 ≤ VOUT(E) < 4.3  
4.3 ≤ VOUT(E) < 5  
RL  
Ω
150  
220  
330  
470  
PARAMETER  
Maximum Current Limit  
V
Output Voltage  
1.8*  
1.9*  
2.0*  
2.1*  
2.2*  
2.3*  
2.4*  
2.5*  
2.6*  
2.7*  
2.8  
A
MIN  
MAX  
1.836  
1.938  
2.040  
2.142  
2.244  
2.346  
2.448  
2.550  
2.652  
2.754  
2.856  
2.958  
3.060  
3.162  
3.264  
3.366  
3.468  
3.570  
3.672  
3.774  
3.876  
3.978  
4.080  
4.182  
4.284  
4.386  
4.488  
4.590  
4.692  
4.794  
4.896  
4.998  
5.100  
TYP  
MAX  
50  
50  
50  
50  
50  
50  
50  
50  
50  
50  
50  
50  
50  
51  
51  
52  
52  
52  
53  
53  
54  
54  
54  
55  
55  
56  
56  
56  
57  
57  
58  
58  
58  
MIN  
TYP  
0.98  
1.03  
1.09  
1.14  
1.18  
1.23  
1.27  
1.31  
1.34  
1.37  
1.40  
1.42  
1.45  
1.47  
1.49  
1.50  
1.52  
1.53  
1.54  
1.55  
1.56  
1.57  
1.57  
1.58  
1.58  
1.58  
1.58  
1.59  
1.59  
1.59  
1.59  
1.59  
1.59  
MAX  
1.85  
1.85  
1.85  
1.85  
1.85  
1.85  
1.85  
1.85  
1.85  
1.85  
1.85  
1.85  
1.85  
1.85  
1.87  
1.89  
1.91  
1.92  
1.94  
1.95  
1.96  
1.97  
1.97  
1.99  
1.99  
1.99  
1.99  
2.00  
2.00  
2.00  
2.00  
2.00  
2.00  
1.764  
1.862  
1.960  
2.058  
2.156  
2.254  
2.352  
2.450  
2.548  
2.646  
2.744  
2.842  
2.940  
3.038  
3.136  
3.234  
3.332  
3.430  
3.528  
3.626  
3.724  
3.822  
3.920  
4.018  
4.116  
4.214  
4.312  
4.410  
4.508  
4.606  
4.704  
4.802  
4.900  
35  
36  
36  
36  
36  
36  
36  
36  
36  
36  
37  
37  
37  
37  
37  
37  
37  
37  
37  
38  
38  
38  
38  
38  
38  
38  
38  
39  
39  
39  
39  
39  
39  
2.9  
3.0  
3.1  
3.2  
3.3  
3.4  
3.5  
3.6  
3.7  
3.8  
3.9  
4.0  
4.1  
4.2  
4.3  
4.4  
1.15  
1.17  
1.18  
1.19  
1.21  
1.22  
1.22  
1.23  
1.24  
1.25  
1.25  
1.26  
1.26  
1.26  
1.26  
1.26  
1.26  
1.26  
1.26  
1.26  
1.26  
4.5  
4.6  
4.7  
4.8  
4.9  
5.0  
* IXD2135A/C series are excluded.  
When output voltage is lower than 2.9V, maximum current limit may decrease.  
Please refer to the typical performance characteristics, graph #10 “Maximum Current Limit vs. Ambient Temperature”  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
5
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
PIN CONFIGURATION  
IXD2135  
PIN ASSIGNMENT  
IXD2136A/B  
IXD2136  
PIN NUMBER  
PIN NAME  
FUNCTIONS  
IXD2135 IXD2136  
1
2
3
4
5
6
7
1
2
3
4
5
6
VIN  
LX  
Power Input  
Switching Node  
CDD  
MODE  
FO  
EN  
CDF  
NC  
AGND  
PGND  
VOUT  
Internal Power Supply Bypass Capacitor  
Mode Selection (Logic HIGH – PWM mode, logic LOW – PWM/PFM automatic mode control)  
UVLO Flag Output  
Enable (Logic HIGH – Operation mode, logic LOW – Standby mode)  
UVLO Detect Delay Capacitor Connection  
No Connection  
Analog Ground  
Power Ground  
Output Voltage  
7
8
9
8
9
10  
10  
Note:  
The dissipation pad for the USP-10B package should be solder-plated in recommended mount pattern and metal masking to enhance mounting  
strength and heat release. If the pad needs to be connected to other pins, it should be connected to the AGND (No.8) or PGND (No.9) pin.  
GND pins (pins 8 and 9) should be connected together.  
BLOCK DIAGRAMS  
IXD2135A and B Series  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
6
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
IXD2136E Series  
* Diodes inside the circuit are an esd protection diode and a parasitic diode.  
IXD2135C/K and IXD2136N versions does not have CL discharge functions.  
BASIC OPERATION  
The IXD2135/36 consists of a reference voltage source, ramp wave circuit, error amplifier, PWM comparator, phase  
compensation circuit, N-channel driver transistor, P-channel synchronous rectification transistor, and current limiter  
circuit.  
IC’s error amplifier compares the internal reference voltage with the feedback voltage from the VOUT pin divided by  
internal resistive divider RFB1 / RFB2. Phase compensated signal from error amplifier’s output applies to the inverting  
PWM comparator’s input, which non-inverting input is connected to the output of the ramp wave generator.  
Resulting PWM modulated signal from comparator determines turn-on time. It applies to the buffer, which drives  
gate of the NMOSFET. This process performs continuously to ensure stable output voltage by changing duty cycle  
of PWM pulses in respect to error signal.  
The current feedback circuit monitors the N-channel driver transistor’s turn-on current for each switching cycle and  
modulates the error amplifier’s output signal to provide feedback. This guarantees stability of IC operation, even  
when low ESR ceramic capacitors used as load capacitors.  
Reference Voltage Source  
The reference voltage source provides the reference voltage to ensure stable output voltage of the DC/DC  
converter.  
Oscillator  
The oscillator determines switching frequency, which is fixed at 1.2 MHz. Clock pulses generated in this circuit are  
used to produce ramp waveforms needed for PWM operation, and to synchronize all internal circuits.  
Ramp Wave Generator  
The Ramp Wave Generator produces saw tooth pulses needed for PWM operation  
Error Amplifier  
The error amplifier compares reference voltage with the voltage from the VOUT pin divided by internal resistive  
divider RFB1 / RFB2... When a feedback voltage is lower than the reference voltage, output voltage increases,  
resulting in longer ON time of the switching MOSFET.  
The gain and frequency characteristics of the error amplifier are set internally to deliver an optimized signal to the  
PWM comparator.  
Maximum Current Limit  
The current limiter circuit monitors the maximum current flowing through the N-channel driver transistor connected  
to the Lx pin, and combines functions of the current limit and latch.  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
7
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
When the current is greater than a specified level (peak inductor current), the Maximum Current Limit starts to  
operate and turns off the N-channel transistor. When the transistor is off, the Limiter circuit is off too. The transistor  
turns on at the next pulse, however, if an over-current state exists; the Maximum Current Limit turns it immediately  
off. When the over-current state ends, the IC resumes normal operation (see zone t1 at the picture below).  
The IXD2135 series waits until over-current state ends repeating the above steps. If an over-current state continues  
for several milliseconds, the IC latches the N-channel and P-channel transistors in off state, and goes into operation  
suspension mode. To resume normal IC operation either VIN or CE pins should be toggled to restart IC through soft  
start (see zone t2 at the picture below).  
The latching state does not mean a complete shutdown, but a state in which pulse output is suspended; therefore,  
the internal circuitry remains in operation.  
Counting of the time before latch may be interrupted because of the noise, which may result in longer time or failing  
latch. Please locate an output capacitor as close to IC pins as possible.  
Please note that the current flowing into the N-channel transistor is different from output current IOUT and represents  
inductor current.  
The IXD2136 series does not have latch function, so it repeats attempts to restart until the over current state ends.  
Thermal Shutdown  
The thermal shutdown function monitors chip temperature. When the chip’s temperature reaches 1500C, the  
thermal shutdown circuit starts operating turning N-channel transistor off. When the temperature drops to 1300C,  
the IC performs the soft start to initiate normal operation.  
MODE  
The IXD2135/36 operates in PWM mode if a MODE pin is in HIGH logic state and automatically switches between  
PFM/PWM modes at LOW logic state.  
Shut-Down, Load Disconnection Function  
The IC enters shutdown mode at LOW logic state of the EN pin. In this mode, the N-channel and P-channel  
transistors are OFF. A parasitic diode of the P-channel synchronous switch is monitored also, thus, the current  
conduction path between input and output is disconnected.  
Flag Out  
The FO pin becomes high impedance during over-current, over-temperature, soft-start, and shut-down conditions.  
In normal state, the FO pin is low impedance. The FO pin is N-channel open drain output.  
CL Discharge  
The IXD2135A/B and IXD236E series discharge the output capacitor CL when IC is in shutdown mode to avoid  
malfunction of the load.  
Discharging time determines by resistance R of the discharging N-channel transistor and the output capacitor CL  
value. Because resistance of the discharging N-channel transistor depends on both input and output voltage, actual  
discharging time may vary from calculated one. We recommend check actual performance at operating conditions.  
Discharging time = −  
∗
, where  
V - Output voltage after discharge  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
8
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
VOUT - Output voltage  
CL - Output capacitance  
R - Discharge resistance  
Output Voltage Discharge Characteristics  
The IXD2135C and IXD2136N series do not have CL discharge function. If the MODE pin is set low to select auto  
PWM/PFM mode, the output of IXD2135C and IXD2136N series can be connected to another power supply.  
However, when the output of IXD2135A/B or IXD2136E series is connected to another power supply, the IC might  
be damaged.  
CDD, VDDMAX  
VDDMAX circuit compares the input voltage and the output voltage to select the highest one as the power supply for  
the IC. This voltage appears at the CDD pin. A CDD capacitor should be connected to this pin for stable IC  
operations.  
UVLO  
The IXD2135 has a UVLO function. If the input voltage falls below VUVLO_F, the IC stops oscillating. When the input  
voltage rises above VUVLO_R, IC restarts from soft-start.  
UVLO Detect Delay Time  
The IXD2135 allows program delay time between UVLO event and IC operations stop by external capacitor  
connected to the CDF pin. This prevents the IC from stopping operations due temporary drop in the input voltage  
caused by a load transient and other conditions. If the input voltage falls below the UVLO detection voltage and  
then returns to the UVLO release voltage or higher within delay time, the IC will continue operating. If the input  
voltage does not return to the UVLO release voltage or higher within delay time, the IC will stop oscillating after  
delay time elapsing.  
The delay time depends on the CDF capacitance: each 1000 pF increases delay time by 1 ms. Capacitors less than  
1000 pF not recommended.  
Output Voltage-Drop Protection  
The IXD2135B has a built-in output voltage-drop protection function. If VOUT falls below the drop protection  
threshold VLVP due to an overload or other condition, the function will latch the N- and P-channel transistors in the  
off state. To resume normal IC operation either VIN or CE pins should be toggled to restart IC through soft start.  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
9
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TYPICAL APPLICATION CIRCUIT  
IXD2135  
IXD2136  
EXTERNAL COMPONENTS  
L = 2.2 μH～4.7 μH (Recommended types VLCF4020 or LTF5022-LC series)  
CL≥ 20μF (Recommended types JMK212BJ106KG×2, LMK212BJ106KG×2, or LMK316BJ226ML series. If other  
types of capacitors used, they should be ceramic capacitors with B (JIS standard) or X7R, X5R (EIA standard)  
ceramic)  
CIN = 10 μF (Recommended types JMK212BJ106KG or LMK212BJ106KG. If other types of capacitors used, they  
should be ceramic capacitors with B (JIS standard) or X7R, X5R (EIA standard) ceramic)  
CDD = 0.47 μF (Ceramic capacitor)  
CDF = 1000 pF  
* CDF and CDD rated voltage should be above VDD voltage.  
Note:  
1) Recommended inductance is in the range from 2.2 μH to 4.7 μH. However, if the input voltage VIN is lower  
than 1.5V, use 2.2 μH inductor.  
2) Recommended CL capacitor should be ceramic type with capacitance of 20 μF or higher. If tantalum or low  
ESR electrolytic capacitors used, ripple voltage will be higher due to the larger ESR (Equivalent Series  
Resistance) of those types of capacitors. Please also note that the IC’s operation may become unstable  
with such capacitors so that we recommend to test on the board before usage. If electrolytic capacitor used  
as CL, a ceramic capacitor should be connected in parallel  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
10  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
LAYOUT AND USE CONSIDERATIONS  
1. Please, do not exceed the value of stated absolute maximum ratings.  
2. The DC/DC converter IC's performance is greatly influenced by not only the ICs' characteristics, but also by  
those of the external components. Care must be taken when selecting external components.  
3. Make sure that the PCB ground traces are as thick as possible, as variations in ground potential caused by  
high ground currents at the time of switching may result in instability of the IC.  
4. Please, mount each external component as close to the IC as possible and use thick, short connecting traces  
to reduce the circuit impedance.  
5. If the device provides high step-up ratio at heavy load current, the Current Limit function may not work. In this  
case, inductor current is limited by the maximum duty cycle. For the IXD2135, over current latch function does  
not work, when the inductor current is controlled with maximum duty cycle,  
6. If other power supply is connected to IC output as shown in the circuit diagram below, the IXD2135C or  
IXD2136N series should be used. MODE pin should be logic LOW to select PWM/PFM auto mode. If the  
MODE pin is set HIGH to maintain fixed PWM control mode, the backflow current may occur. If the output of  
IXD2135A/B or IXD2136E series with CL discharge function is connected to other power supply, the IC will be  
damaged.  
7. The Maximum Current Limiter monitors only the N-channel transistor current. It does not limit the current of the  
P-channel synchronous transistor. When high current flows through P-channel synchronous transistor in case  
of heavy load, the IC may be damaged  
8. Counting of the time before IXD2135 latches in over-current condition may be interrupted because of the  
electrical noise, which may result in longer time or failing latch. Please locate an output capacitor as close to IC  
pins as possible.  
9. The MODE and EN pins are not pulled-down internally. Please make sure that these pins are not left open.  
10. When used at small step-up ratios, the device may skip pulses in PWM control mode.  
11. In the PWM/PFM auto selection mode, transition from PFM to PWM mode or vice versa, may result in the  
output voltage fluctuations. (Please refer to the picture below)  
VIN = 4.2 V, VOUT = 5.0 V, MODE - Auto PWM/PFM  
VOUT: 50 mV/div, ILx : 200 mA/div, Time: 20 μs/div  
L = 4.7 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2) CIN  
10 μF (LMK212BJ106KG), CDD = 0.47 μF (EMK107BJ474KA-T)  
=
12. At large step-up ratios and small load current, the output voltage may change when PWM/PFM auto mode is  
changed to PWM control mode by the MODE pin. (Please refer to the picture below)  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
11  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
VIN = 0.9 V, VOUT = 5.0 V, MODE: PWM/PFM → PWM, IOUT = 3  
mA  
VOUT: 100 mV/div, ILx : 500 mA/div, VLx: 10 V/div, VMODE: 5 V/div,  
Time: 200 μs/div  
L = 2.2 μH (VLCF4020), CL = 20 μF (LMK212BJ106KG*2) C  
=
IN  
10 μF (LMK212BJ106KG), CDD = 0.47 μF (EMK107BJ474KA-T)  
13. If after the soft-start period, VIN > VOUTSET (the input voltage is higher than the output voltage), the IXD2135C  
and IXD2136N series have the P-channel synchronous transistor turned on when MODE pin is tied logic HIGH.  
If the MODE pin is logic LOW, the current flows into the parasitic diode of the P-channel synchronous transistor  
that results in generating excessive heat in the IC. Please test on the board before usage considering heat  
dissipation. The IXD2135A/B and IXD2136E, series have at such conditions the P-channel synchronous  
transistor on disregard to MODE pin logic state.  
14. During start-up, if the set output voltage is lower than 2 V, the PWM/PFM auto mode should be selected. In  
case of the fixed PWM control mode, the output voltage may be smaller than the set voltage. When the set  
output voltage is higher than 2 V, the IC can start in the both modes either PWM/PFM auto or fixed PWM  
control.  
15. The IC is liable to malfunction in case of temporary transitional voltage drop or voltage rising events, if rating is  
exceeded.  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
12  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TEST CIRCUITS  
Circuit  
Circuit   
Circuit   
Circuit   
Circuit   
Circuit   
Circuit   
Circuit   
Circuit   
External Components  
CDD = 0.47 μF (ceramic)  
Circuit  
CL = 22 μF, (ceramic)  
Circuit   
CDF = 1000 pF  
RFO = 10 kΩ  
RPULL = 51 Ω  
Circuit   
RPULL = 0.5 Ω  
D – XBS304S17 (Torex)  
CIN = 10 μF (ceramic)  
L = 2.2 μH, VCLF4020-2R2, TDK  
CL = 22 μF, (ceramic)  
CDF = 1000 pF  
RFO = 10 kΩ  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
13  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
Measurement method for ON resistance of the Lx switch  
Using the layout of circuit No.9 above, set the LX pin voltage to 50 mV by adjusting the VPULL voltage whilst the N-channel transistor turns on.  
Then, measure the voltage difference between both ends of RPULL. N-channel switch ON Resistance is equal RLXN = 0.025 / (V1 – 0.05), where  
V1 is a voltage across RPULL. Use an oscilloscope to measure LX pin and V1 voltages.  
At the IXD2135 series, if CDF pin is grounded, start measurement with VIN < VUVLO_R  
TYPICAL PERFORMANCE CHARACTERISTICS  
(1) Efficiency vs. Output Current  
Topr = 25 0C  
IXD2135C32CDR-G (VOUT = 3.2 V)  
IXD2135C32CDR-G (VOUT = 3.2 V)  
L = 4.7 μH (VLF3014ST-4R7M1R1), CL = 22μF (LMK316ABJ226ML) C = 10 μF  
(LMK212ABJ106KG), CDD = 0.47 μF (TMK107BJ474KA) fOSC=1.2 MHz  
L = 2.2 μH (LTF5022-2R2-LC), CL = 22μF (LMK316ABJ226ML) CIN = 10 μF  
(LMK212ABJ106KG), CDD = 0.47 μF (TMK107BJ474KA) fOSC=1.2 MHz  
IN  
IXD2135C50CDR-G (VOUT = 5.0 V)  
L = 4.7 μH (VLF3014ST-4R7M1R1), CL = 22μF (LMK316ABJ226ML) C = 10 μF  
IN  
(LMK212ABJ106KG), CDD = 0.47 μF (TMK107BJ474KA) fOSC=1.2 MHz  
(2) Output Voltage vs. Output Current  
IXD2135C32CDR-G (VOUT = 3.2 V)  
IXD2135C32CDR-G (VOUT = 3.2 V)  
L = 4.7 μH (VLF3014ST-4R7M1R1), CL = 22μF (LMK316ABJ226ML) C = 10 μF  
L = 2.2 μH (LTF5022-2R2-LC), CL = 22μF (LMK316ABJ226ML) C = 10 μF  
IN  
IN  
(LMK212ABJ106KG), CDD = 0.47 μF (TMK107BJ474KA) fOSC=1.2 MHz  
(LMK212ABJ106KG), CDD = 0.47 μF (TMK107BJ474KA) fOSC  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
14  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
0
(2) Output Voltage vs. Output Current  
Topr = 25 C  
IXD2135C32CDR-G (VOUT = 3.2 V)  
L = 4.7 μH (VLF3014ST-4R7M1R1), CL = 22μF (LMK316ABJ226ML) CIN = 10 μF  
(LMK212ABJ106KG), CDD = 0.47 μF (TMK107BJ474KA) fOSC=1.2 MHz  
(3) Ripple Voltage vs. Output Current  
IXD2135C32CDR-G (VOUT = 3.2 V)  
IXD2135C32CDR-G (VOUT = 3.2 V)  
L = 4.7 μH (VLF3014ST-4R7M1R1), CL = 22μF (LMK316ABJ226ML) CIN = 10 μF  
(LMK212ABJ106KG), CDD = 0.47 μF (TMK107BJ474KA) fOSC=1.2 MHz  
L = 2.2 μH (LTF5022-2R2-LC), CL = 22μF (LMK316ABJ226ML) C = 10 μF  
IN  
(LMK212ABJ106KG), CDD = 0.47 μF (TMK107BJ474KA) fOSC  
IXD2135C32CDR-G (VOUT = 3.2 V)  
L = 4.7 μH (VLF3014ST-4R7M1R1), CL = 22μF (LMK316ABJ226ML) CIN = 10 μF  
(LMK212ABJ106KG), CDD = 0.47 μF (TMK107BJ474KA) fOSC=1.2 MHz  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
15  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
(4) Output Voltage vs. Ambient Temperature  
Topr = 25 0C  
IXD2136x18C  
IXD2136x33C  
L = 2.2 μH (VLCF4020), CL = 20 μF (LMK212BJ106KG*2), CIN = 10 μF (LMK212BJ106KG),  
CDD = 0.47 μF (EMK107BJ474KA), FO = OPEN  
L = 4.7 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2), C = 10 μF (LMK212BJ106KG),  
IN  
CDD = 0.47 μF (EMK107BJ474KA), FO=OPEN  
(5) Supply Current vs. Ambient Temperature  
IXD2135A  
(6) Standby Current vs. Ambient Temperature  
IXD2135A  
IXD2135C  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
16  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
(7) Oscillation frequency vs. Ambient Temperature  
(8) Maximum Duty Cycle vs. Ambient Temperature  
IXD2135/36  
IXD2135/36  
(9) Lx SW N-channel ON Resistance vs. Output Voltage  
(10) Lx SW P-channel ON Resistance vs. Ambient Temperature  
IXD2135/36  
IXD2135/36  
VOUT = 3. 3 V  
(11) Lx Leakage Current vs. Ambient Temperature  
(12) Soft Start Time vs. Ambient Temperature  
IXD2135/36  
IXD2135/36  
VIN =VLx, VOUT = VEN = 0 V  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
17  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
(13) PFM Switching Current vs. Input Voltage  
(14) MODE HIGH/LOW Transition Voltage vs. Ambient Temperature  
IXD2135A50C  
VOUT = 5 V, fOSC = 1.2 MHz  
IXD2135/36  
L = 4.7 μH (LTF5022-LC), CL = 22 μF (ceramic), CIN = 10μF (ceramic), CDD = 0.47 μF  
(15) EN HIGH Voltage vs. Output Voltage  
(16) EN LOW Voltage vs. Output Voltage  
IXD2135/36  
IXD2135/36  
(17) Operation Start Voltage vs. Ambient Temperature  
IXD2136  
IXD2136E33C  
MODE: PWM/PFM, RL = 1 kΩ, fOSC = 1.2 MHz  
MODE: PWM/PFM, RL = 33 Ω, fOSC = 1.2 MHz  
L = 2.2 μH (VLCF4020), CL = 22 μF (ceramic), CIN = 10 μF (ceramic), CDD = 0.47 μF  
L = 2.2 μH (VLCF4020), CL = 22 μF (ceramic), CIN = 10 μF (ceramic), CDD = 0.47 μF  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
18  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
(18) Operation Hold Voltage vs. Ambient Temperature  
(19) No Load Input Current vs. Input Voltage  
IXD2136  
IXD2135C30C  
MODE: PWM/PFM, RL = 1 kΩ, fOSC = 1.2 MHz  
MODE: PWM/PFM, RL: OPEN, fOSC = 1.2 MHz  
L = 2.2 μH (VLCF4020), CL = 22 μF (ceramic), C = 10 μF (ceramic), CDD = 0.47 μF  
L = 4.7 μH (VLCF4020), CL = 22 μF (ceramic), C = 10 μF (ceramic), CDD = 0.47 μF, Ta=25℃  
IN  
IN  
(20) Current Limit vs. Ambient Temperature  
(21) Latch Time vs. Ambient Temperature  
IXD2135xxx/IXD2136xxx  
IXD2135xxxC  
L = 2.2 μH (VLCF4020), CL= 20 μF (LMK212BJ106KG*2), C = 10 μF (LMK212BJ106KG),  
MODE: PWM, fOSC = 1.2 MHz  
IN  
CDD = 0.47 μF (EMK107BJ474KA), fOSC = 1.2 MHz  
L = 4.7 μH (LTF5022-LC), CL = 20 μF (ceramic), C = 10 μF (ceramic), CDD = 0.47 μF  
IN  
(22) UVLO Release Voltage vs. Ambient Temperature  
IXD2135A  
IXD2135B  
MODE: PWM, fOSC = 1.2 MHz  
MODE: PWM, fOSC = 1.2 MHz  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
19  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
(23) UVLO Detecet Voltage vs. Ambient Temperature  
IXD2135A  
IXD2135B  
MODE: PWM,  
MODE: PWM,  
(24) UVLO Hysteresis vs. Ambient Temperature  
(25) UVLO Detect Delay Time vs. Ambient Temperature  
IXD135B/K  
IXD135A/C  
Mode:PWM  
Mode:PWM, CDF = 1000 pF  
(26) Quiescent Current vs. UVLO Voltage  
(27) Output Voltage Drop Protection Threshold vs. Ambient Temperature  
IXD135C  
IXD135K  
Mode:PWM  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
20  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
(28) FO ON Resistance vs. Ambient Temperature  
(29) CL Discharge Resistance vs. Ambient Temperature  
IXD2135/36  
IXD2135B  
VIN = VOUT = VEN, VFO = 0.5 V  
VIN = VOUT, VEN = 0 V  
(30) Soft Start  
IXD2135A33C  
IXD2135A50C  
VOUT = 3.3 V, VIN = 1.8 V, RL = 33 Ω, ,MODE: PWM/PFM  
VOUT = 5.0 V, VIN = 5.5 V, RL = 50 Ω  
VOUT: 1 V/div, ILx: 200 mA/div, VEN: 5 V/div, VFO: 5 V/div Time: 2ms/div  
VOUT: 2 V/div, ILx: 500 mA/div, VEN: 5 V/div, Time: 100 us/div  
L = 4.7 μH (LTF5022-LC), CL = 20μF (LMK212BJ106KG*2), C = 10 μF (LMK212BJ106KG),  
L = 4.7 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2), C = 10 μF (LMK212BJ106KG),  
IN  
IN  
CDD = 0.47 μF (EMK107BJ474KA)  
CDD = 0.47 μF(EMK107BJ474KA)  
IXD2135B20C  
VOUT = 2.0 V, VIN = 0.9 V, RL = 20 Ω, MODE:PWM/PFM  
VOUT: 1 V/div, IL x: 200 mA/div, VIN: 1 V/div, Time: 2ms/div  
L = 2.2 μH (VLS252012), CL = 22 μF (LMK212BJ226MG), CIN = 10 μF (LMK212BJ106KG),  
CDD = 0.47 μF (EMK107BJ474KA  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
21  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
(31) Load Transient Response  
IXD2136E18C (PWM/PFM)  
IXD2136E18C (PWM/PFM)  
VOUT = 1.8 V, VIN = 0.9 V, IOUT = 1 mA → 50 mA  
VOUT = 1.8 V, VIN = 0.9 V, IOUT = 50 mA → 1 mA  
VOUT: 100 mV/div, ILx: 200 mA/div, IOUT: 50 mA/div, Time: 50 μs/div  
VOUT: 100 mV/div, ILx: 200 mA/div, IOUT: 50 mA/div, Time: 50 μs/div  
L = 2.2 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2), C = 10 μF (LMK212BJ106KG),  
L = 2.2 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2), C = 10 μF (LMK212BJ106KG),  
IN  
IN  
CDD = 0.47 μF (EMK107BJ474KA  
CDD = 0.47 μF (EMK107BJ474KA  
IXD2136E33C (PWM/PFM)  
IXD2136E33C (PWM/PFM)  
VOUT = 3.3 V, VIN = 1.8 V, IOUT = 1 mA → 200 mA  
VOUT = 3.3 V, VIN = 1.8 V, IOUT = 200 mA →1 mA  
VOUT: 100 mV/div, ILx: 200mA/div, IOUT: 200mA/div, Time:50μs/div  
VOUT: 100 mV/div, ILx: 200mA/div, IOUT: 200mA/div, Time:50μs/div  
L = 4.7 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2), C = 10 μF (LMK212BJ106KG),  
L = 4.7 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2), C = 10 μF (LMK212BJ106KG),  
IN  
IN  
CDD = 0.47 μF (EMK107BJ474KA  
CDD = 0.47 μF (EMK107BJ474KA  
IXD2136E33C (PWM)  
IXD2136E33C (PWM)  
VOUT = 3.3 V, VIN = 1.8 V, IOUT = 1 mA → 200 mA  
VOUT = 3.3 V, VIN = 1.8 V, IOUT = 200 mA →1 mA  
VOUT: 100 mV/div, ILx: 200mA/div, IOUT: 200mA/div, Time:50μs/div  
VOUT: 100 mV/div, ILx: 200mA/div, IOUT: 200mA/div, Time:50μs/div  
L = 4.7 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2), C = 10 μF (LMK212BJ106KG),  
L = 4.7 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2), C = 10 μF (LMK212BJ106KG),  
IN  
IN  
CDD = 0.47 μF (EMK107BJ474KA  
CDD = 0.47 μF (EMK107BJ474KA  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
22  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
(31) Load Transient Response (Continued)  
IXD2136E50C(PWM/PFM)  
VOUT = 5.0 V, VIN = 3.7 V, IOUT= 1mA → 250 mA  
IXD2136E50C(PWM/PFM)  
VOUT = 5.0 V, VIN = 3.7 V, IOUT = 250 mA →1 mA  
VOUT: 100 mV/div, ILx: 200 mA/div, IOUT: 250 mA/div, Time: 50 μs/div  
L = 4.7 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2), CIN = 10 μF (LMK212BJ106KG),  
CDD = 0.47 μF (EMK107BJ474KA  
VOUT: 100 mV/div, ILx: 200 mA/div, IOUT: 250 mA/div, Time: 50 μs/div  
L = 4.7 μH (LTF5022-LC), CL = 20 μF (LMK212BJ106KG*2), CIN = 10 μF (LMK212BJ106KG),  
CDD = 0.47 μF (EMK107BJ474KA  
ORDERING INFORMATION  
IXD2135①②③④⑤⑥- ⑦ - with UVLO integral latch protection  
IXD2136①②③④⑤⑥- ⑦ -  
DESCRIPTION  
DESIGNATOR  
DESCRIPTION  
SYMBOL  
UVLO  
0.85 V  
UVLO Detect  
Delay  
Latch  
Protection  
CL Auto  
Discharge1)  
1.6 V  
Yes  
No  
A
B
C
K
E
N
No  
Yes  
No  
Yes  
Yes  
Yes  
Yes  
No  
Yes  
Yes  
Yes  
Yes  
No  
Yes  
Yes  
No  
IXD2135  
IXD2136  
Yes  
No  
Yes  
No  
No  
No  
Yes  
No  
No  
No  
No  
No  
  
Output Voltage IXD2135A/C  
Output Voltage IXD2135B/36  
28 ~ 50  
18 ~ 50  
Output Voltage, i.e. VOUT = 5.0 V - = 5, = 0  
Output Voltage, i.e. VOUT = 1.8 V - = 1, = 8  
Maximum Oscillation  
Frequency  
C
1.2 MHz  
Packages  
(Order Limit)  
-*  
DR-G  
USP -10B (3,000/Reel)2)  
(*) The “-G” suffix denotes halogen and antimony free, as well as being fully RoHS compliant.  
1) IC with CL auto discharge function does not allow VOUT pin be connected to the other power source such as another supply (AC adaptor).  
2) The IXD2135/36 reels are shipped in a moisture-proof packing.  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
23  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
PACKAGE DRAWING AND DIMENSIONS  
Units: mm  
USP-10B  
USP-10B Reference Pattern Layout  
USP-10B Reference Metal Mask Design  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
24  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
MARKING  
USP-10B  
① represents product series  
MARK  
5
6
PRODUCT SERIES  
IXD2135xxxxx-G  
IXD2136xxxxx-G  
② represents type of IC  
DESCRIPTION  
UVLO  
UVLO  
MARK  
PRODUCT SERIES  
LATCH  
CL AUTO  
DISCHARGE  
THRESHOLD  
DETECT  
DELAY  
Yes  
Yes  
Yes  
PROTECTION  
0.85 V  
No  
1.6 V  
Yes  
No  
Yes  
No  
A
B
C
K
E
N
Yes  
Yes  
Yes  
Yes  
No  
Yes  
Yes  
Yes  
No  
Yes  
No  
IXD2135A  
IXD2135B  
IXD2135C  
IXD2135K  
IXD2136E  
IXD2136N  
Yes  
No  
Yes  
No  
Yes  
No  
No  
No  
No  
No  
No  
③④ represent output voltage and oscillation frequency  
MARK  
OUTPUT VOLTAGE, V  
PRODUCT SERIES  
1
3
8
3
1.8  
3.3  
IXD2135x18xxx-G, IXD2136x18xxx-G  
IXD2135x33xxx-G, IXD2136x33xxx-G  
 represent production lot number 01～09, 0A～0Z, 11～9Z, A1～A9, AA～Z9, ZA～ZZ in order.  
(G, I, J, O, Q, W excluded)  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
25  
Doc. No. IXD2135_DS, Rev. N0  
IXD2135/36  
Warranty and Use  
IXYS CORP. MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY  
PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIGHTS OF THIRD  
PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH  
USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.  
IXYS Corp. products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended  
to support or sustain life, or for any other application in which the failure of the IXYS Corp. product could create a situation where personal injury or death may occur.  
IXYS Corp. reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets labeled "Advance  
Information" or "Preliminary" and other products described herein may not be in production or offered for sale.  
IXYS Corp. advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate typical semiconductor  
applications and may not be complete.  
IXYS Corp.  
1590 Buckeye Dr.  
Milpitas, CA 95035-7418  
Phone: 408. 457.9000  
Fax: 408. 496.0222  
http://www.ixys.com  
Document No:IXD2135_DS  
Revision:  
N0  
7/1/2013  
Issue date:  
© 2013 IXYS Corp.  
Characteristics subject to change without notice  
26  
Doc. No. IXD2135_DS, Rev. N0  
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