IXD2135/36
EN HIGH Voltage8)
EN LOW Voltage9)
MODE HIGH Voltage10)
MODE LOW Voltage11)
EN HIGH Current
VENH
VIN = VPULL = (VOUT(E)+ VUVLO_R(E))/2
VIN = VPULL = (VOUT(E)+ VUVLO_R(E))/2
RL in respect with Table F1
RL in respect with Table F1
VIN = VEN = 5.5 V
0.75
0
5.5
0.2
V
V
VENL
VMODEH
VMODEL
IENH
0.75
0
5.5
V
0.2
V
0.1
µA
µA
µA
µA
V
EN LOW Current
IENL
VIN = 5.5 V, VEN = 0 V
-0.1
0.2
MODE HIGH Current
MODE LOW Current
IMODEH
IMODE L
VUVLO_R
VIN = VEN = VMODE = 5.5 V
VIN = VEN = 5.5 V, VMODE= 0 V
RL = 1 kΩ
0.1
-0.1
1.552
0.799
0.1
0.2
IXD2135A/C
1.600
0.850
0.14
0.14
1.5
1.648
0.901
0.2
UVLO Release
Voltage14)
IXD2135/B
IXD2135A/C
IXD2135/B
V
VUVLO_H
V
UVLO
Hysteresis15)
0.05
1.4
0.2
V
VOUT Drop Protection16, 17)
UVLO Detect Delay18)
VLVP
t D F
1.6
V
0.5
1.0
1.5
ms
NOTE:
External Components: CIN = 10 μF(ceramic), L = 2.2 μH (VLCF4020 TDK), CDD = 0.47 μF (ceramic), CL= 22 μF (ceramic), CDF = 1000 pF
(ceramic)
Test Conditions
For the Circuit No.1, unless otherwise stated, VIN = (VOUT (E) + VUVLO_R (E))/2, VEN = VMODE = VFO = 3.3 V
For the Circuit No.2, unless otherwise stated, VIN = VEN = VOUT (E) + 0.5 V, VMODE = 0 V (GND connected), CDF: OPEN
For the Circuit No.3, unless otherwise stated, VOUT = VEN = VMODE = 0 V (GND connected), CDF: OPEN
For the Circuit No.4, unless otherwise stated, VOUT = VEN = VMODE = 0 V (GND connected), CDF: OPEN
For the Circuit No.5, unless otherwise stated, VIN = VPULL = 1.5 V, VOUT = VEN = VMODE = VFO = VOUT (E) - 0.1 V,
For the Circuit No.6, unless otherwise stated, VOUT = VOUT (E) + 0.5 V, VEN = VMODE = 0 V (GND connected), CDF: OPEN
For the Circuit No.7, unless otherwise stated, VIN = VOUT (E) + 0.5 V, VEN = VMODE = 0 V (GND connected), CDF: OPEN
For the Circuit No.8, unless otherwise stated, VIN = VLX = VOUT (E) + 0.5 V, VEN = VMODE = 3.3 V, CDF: OPEN
For the Circuit No.9, unless otherwise stated, V = 1.1 V, VOUT = 1.6 V, VEN = 3.3 V, VMODE = VFB(CDF) = 0 V (GND connected)
IN
VOUT (E) = Output Voltage Setting, VUVLO_R (E) = UVLO Voltage Setting, VUVLO_F = VUVLO_R – VUVLO_H
1) Design target value
2) Efficiency = [{(output voltage) X (output current)} ÷ {(input voltage) X (input current)}] X 100
3) LX SW P-channel ON resistance = (VLx - VOUT pin test voltage)/200 mA
4) See testing method of LX SW N-channel ON resistance at test circuit description.
5) CL Discharge resistance = VOUT / VOUT pin measurement current.
6) FO ON resistance = VFO / FO pin measurement current.
7) IXD2135A/B version only
8) Voltage at EN pin to start oscillation
9) Voltage at EN pin to stop oscillation
10) Voltage to start PWM mode
11) Voltage to start PFM mode
12) Time to stop LX oscillation from moment FO = HIGH
13) Time to FO = LOW after VEN =3.3 V
14) Voltage to start oscillation, while VIN transits from 0.2 V to 3.3 V
15) The Voltage is a difference between VUVLO_R and the voltage to stop oscillation at Lx pin while V =VUVLO_R → 0.2 V. RL = 1 kΩ
IN
16) Voltage to stop oscillation, while VOUT = 1.7 1.3 V
17) IXD2135B version only
18) Time to stop oscillation after VIN = VPULL = (VOUT(E) + VUVLO_R(E))/2 – 0.65 V
© 2013 IXYS Corp.
Characteristics subject to change without notice
3
Doc. No. IXD2135_DS, Rev. N0