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XTR117AIDRBRG4

型号:

XTR117AIDRBRG4

品牌:

TI[ TEXAS INSTRUMENTS ]

页数:

18 页

PDF大小:

914 K

XTR117  
SBOS344C SEPTEMBER 2005 REVISED MAY 2012  
4-20mA Current-Loop Transmitter  
FD EATURES  
DESCRIPTION  
The XTR117 is a precision current output converter designed  
to transmit analog 4-20mA signals over an industry-standard  
current loop. It provides accurate current scaling and output  
current limit functions.  
LOW QUIESCENT CURRENT: 130μA  
5V REGULATOR FOR EXTERNAL CIRCUITS  
D
D
D
D
D
LOW SPAN ERROR: 0.05%  
LOW NONLINEARITY ERROR: 0.003%  
WIDE-LOOP SUPPLY RANGE: 7.5V to 40V  
MSOP-8 AND DFN-8 PACKAGES  
The on-chip voltage regulator (5V) can be used to power  
external circuitry. A current return pin (IRET) senses any  
current used in external circuitry to assure an accurate  
control of the output current.  
AD PPLICATIONS  
The XTR117 is a fundamental building block of smart  
sensors using 4-20mA current transmission. The XTR117 is  
specified for operation over the extended industrial  
temperature range, 40°C to +125°C.  
TWO-WIRE, 4-20mA CURRENT LOOP  
TRANSMITTER  
D
D
D
D
D
SMART TRANSMITTER  
INDUSTRIAL PROCESS CONTROL  
TEST SYSTEMS  
CURRENT AMPLIFIER  
VOLTAGE-TO-CURRENT AMPLIFIER  
RELATED 4-20mA PRODUCTS  
XTR115  
XTR116  
5V regulator output and 2.5V reference output  
5V regulator output and 4.096V reference output  
:
NOTE For 4-20mA complete bridge and RTO conditioner solutions,  
see the XTR product family website at www.ti.com.  
XTR117  
IO  
VREG  
V+  
+5V  
Regulator  
8
7
B
Q1  
6
RIN  
IIN  
VLOOP  
2
A1  
E
VIN  
5
RL  
RLIM  
IRET  
IO = 100 VIN  
RIN  
3
R1  
2.475k  
R2  
25  
Ω
Ω
4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date. Products  
conform to specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all parameters.  
Copyright © 20052006, Texas Instruments Incorporated  
www.ti.com  
XTR117  
www.ti.com  
SBOS344C SEPTEMBER 2005 REVISED MAY 2012  
ABSOLUTE MAXIMUM RATINGS(1)  
ELECTROSTATIC DISCHARGE SENSITIVITY  
Power Supply, V+ (referenced to IO pin) . . . . . . . . . . . . . . . . . +50V  
Input Voltage, (referenced to IRET pin) . . . . . . . . . . . . . . . . . 0V to V+  
Output Current Limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous  
VREG, Short-Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous  
Operating Temperature Range . . . . . . . . . . . . . . . 55°C to +125°C  
Storage Temperature Range . . . . . . . . . . . . . . . . . 55°C to +150°C  
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +165°C  
ESD Rating (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . 2000V  
(Charged Device Model) . . . . . . . . . . . . . . . . . 1000V  
This integrated circuit can be damaged by ESD. Texas  
Instruments recommends that all integrated circuits be  
handledwith appropriate precautions. Failure to observe  
proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to  
complete device failure. Precision integrated circuits may be more  
susceptible to damage because very small parametric changes could  
cause the device not to meet its published specifications.  
(1)  
Stresses above these ratings may cause permanent damage.  
Exposure to absolute maximum conditions for extended periods  
may degrade device reliability. These are stress ratings only, and  
functional operation of the device at these or any other conditions  
beyond those specified is not implied.  
PACKAGE/ORDERING INFORMATION(1)  
PRODUCT  
PACKAGE-LEAD  
PACKAGE DESIGNATOR  
PACKAGE MARKING  
XTR117  
MSOP-8  
DGK  
DRB  
BOZ  
BOY  
XTR117  
DFN-8  
(1)  
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site  
at www.ti.com.  
PIN ASSIGNMENTS  
Top View  
XTR117  
XTR117  
NC(1)  
IIN  
VREG  
NC(1)  
IIN  
VREG  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
Exposed  
Thermal  
Die Pad  
on  
V+  
V+  
IRET  
IO  
B (Base)  
E (Emitter)  
IRET  
IO  
B (Base)  
E (Emitter)  
Underside(2)  
MSOP8  
DFN8  
NOTES: (1) NC = No connection. Leave unconnected on PCB.  
(2) Connect thermal die pad to IRET or leave unconnected on PCB.  
2
XTR117  
www.ti.com  
SBOS344C SEPTEMBER 2005 REVISED MAY 2012  
ELECTRICAL CHARACTERISTICS: V+ = +24V  
Boldface limits apply over the temperature range, TA = 40°C to +125°C.  
All specifications at TA = +25°C, V+ = 24V, RIN = 20kΩ, and TIP29C external transistor, unless otherwise noted.  
XTR117  
TYP  
MIN  
MAX  
PARAMETER  
CONDITION  
UNITS  
OUTPUT  
Output Current Equation  
Output Current, Linear Range  
Over-Scale Limit  
IO  
IO = I x 100  
IN  
0.20  
25  
mA  
mA  
mA  
ILIM  
IMIN  
32  
0.13  
Under-Scale Limit  
IREG = 0  
0.20  
SPAN  
Span (Current Gain)  
Error(1)  
vs Temperature  
Nonlinearity  
S
100  
0.05  
3
A/A  
%
ppm/°C  
%
IO = 200μA to 25mA  
TA = 40°C to +125°C  
IO = 200μA to 25mA  
0.4  
20  
0.02  
0.003  
INPUT  
Offset Voltage (Op Amp)  
vs Temperature  
vs Supply Voltage, V+  
Bias Current  
vs Temperature  
Noise: 0.1Hz to 10Hz  
VOS  
IIN = 40μA  
TA = 40°C to +125°C  
V+ = 7.5V to 40V  
100  
0.7  
+0.1  
35  
150  
0.6  
500  
6
+2  
μV  
μV/°C  
μV/V  
nA  
pA/°C  
μVPP  
IB  
TA = 40°C to +125°C  
en  
DYNAMIC RESPONSE  
Small-Signal Bandwidth  
Slew Rate  
CLOOP = 0, RL = 0  
380  
3.2  
kHz  
mA/μs  
(2)  
VREG  
Voltage  
5
V
V
Voltage Accuracy  
vs Temperature  
vs Supply Voltage, V+  
vs Output Current  
Short-Circuit Current  
IREG = 0  
TA = 40°C to +125°C  
V+ = 7.5V to 40V  
0.05  
0.1  
1
0.1  
mV/°C  
mV/V  
See Typical Characteristics  
12  
mA  
POWER SUPPLY  
Specified Voltage Range  
Operating Voltage Range  
Quiescent Current  
V+  
IQ  
+24  
V
V
μA  
μA  
+7.5  
+40  
200  
250  
130  
Over Temperature  
TA = 40°C to +125°C  
TEMPERATURE RANGE  
Specified Range  
Operating Range  
Storage Range  
Thermal Resistance  
MSOP  
40  
55  
55  
+125  
+125  
+150  
°C  
°C  
°C  
q
JA  
150  
53  
°C/W  
°C/W  
DFN  
(1)  
Does not include initial error or temperature coefficient of RIN  
Voltage measured with respect to IRET pin.  
.
(2)  
3
XTR117  
www.ti.com  
SBOS344C SEPTEMBER 2005 REVISED MAY 2012  
TYPICAL CHARACTERISTICS: V+ = +2.7V to +5.5V  
At TA = +25°C, V+ = 24V, RIN = 20kΩ, and TIP29C external transistor, unless otherwise noted.  
QUIESCENT CURRENT vs TEMPERATURE  
CURRENT GAIN vs FREQUENCY  
45  
40  
180  
170  
160  
150  
140  
130  
120  
110  
100  
90  
V+ = 36V  
COUT = 0  
30  
20  
10  
Ω
RL = 0  
V+ = 24V  
COUT = 10nF  
Ω
RL = 250  
V+ = 7.5V  
80  
10k  
100k  
Frequency (Hz)  
1M  
25  
75  
50  
0
25  
50  
75  
100  
125  
_
Temperature ( C)  
VREG VOLTAGE vs VREG CURRENT  
OVERSCALE CURRENT vs TEMPERATURE  
5.5  
5.0  
4.5  
34  
33  
32  
31  
30  
29  
28  
_
+125 C  
With External Transistor  
_
55 C  
V+ = 36V  
V+ = 7.5V  
V+ = 24V  
_
55 C  
_
+25 C  
_
+25 C  
Sinking  
Current  
Sourcing  
Current  
_
+125 C  
1
0
1
2
3
4
25  
75  
50  
0
25  
50  
75  
100  
125  
IREG Current (mA)  
_
Temperature ( C)  
OFFSET VOLTAGE DISTRIBUTION  
SPAN ERROR vs TEMPERATURE  
50  
40  
30  
20  
10  
0
10  
20  
30  
40  
50  
25  
75  
50  
0
25  
50  
75  
100  
125  
_
μ
Temperature ( C)  
Offset Voltage ( V)  
4
XTR117  
www.ti.com  
SBOS344C SEPTEMBER 2005 REVISED MAY 2012  
EXTERNAL TRANSISTOR  
APPLICATIONS INFORMATION  
The external transistor, Q1, conducts the majority of the  
full-scale output current. Power dissipation in this  
transistor can approach 0.8W with high loop voltage  
(40V) and 20mA output current. The XTR117 is  
designed to use an external transistor to avoid on-chip,  
thermal-induced errors. Heat produced by Q1 will still  
cause ambient temperature changes that can influence  
the XTR117 performance. To minimize these effects,  
locate Q1 away from sensitive analog circuitry, including  
XTR117. Mount Q1 so that heat is conducted to the  
outside of the transducer housing.  
BASIC OPERATION  
The XTR117 is a precision current output converter  
designed to transmit analog 4-20mA signals over an  
industry-standard current loop. Figure 1 shows basic  
circuit connections with representative simplified input  
circuitry. The XTR117 is a two-wire current transmitter.  
Its input current (pin 2) controls the output current. A  
portion of the output current flows into the V+ power  
supply, pin 7. The remaining current flows in Q1.  
External input circuitry connected to the XTR117 can be  
powered from VREG. Current drawn from these  
terminals must be returned to IRET, pin 3. The IRET pin is  
a local ground for input circuitry driving the XTR117.  
The XTR117 is designed to use virtually any NPN  
transistor with sufficient voltage, current and power  
rating. Case style and thermal mounting considerations  
often influence the choice for any given application.  
Several possible choices are listed in Figure 1. A  
MOSFET transistor will not improve the accuracy of the  
XTR117 and is not recommended.  
The XTR117 is a current-input device with a gain of 100.  
A current flowing into pin 2 produces IO = 100 x IIN. The  
input voltage at the IIN pin is zero (referred to the IRET  
pin). A voltage input is converted to an input current with  
an external input resistor, R , as shown in Figure 1.  
IN  
Typical full-scale input voltages range from 1V and  
upward. Full-scale inputs greater than 0.5V are  
recommend to minimize the effects of offset voltage and  
drift of A1.  
For improved precision use an external  
voltage reference.  
Possible choices for Q1 (see text):  
DEVICE  
VOLTAGE  
TYPE  
PACKAGE  
REF3140  
REF3130  
REF3125  
4.096V  
3.0V  
2.5V  
MJE3440  
TIP41C  
MJD3340  
SOT32  
TO220  
DPAK  
Use REF32xx for lower drift.  
(VREF  
IREG  
XTR117  
IO  
)
VREG  
8
5V  
V+  
+5V  
Regulator  
7
B
6
Q1  
RIN  
VLOOP  
IIN  
Ω
20k  
VIN  
IIN  
2
Input  
Circuitry  
COUT  
10nF  
A1  
E
5
RL  
RLIM  
IRET  
3
R1  
2.475k  
R2  
25  
from IREG and IREF  
All return current  
Ω
Ω
IO  
4
I = 100 (IIN  
)
Figure 1. Basic Circuit Connections  
5
 
XTR117  
www.ti.com  
SBOS344C SEPTEMBER 2005 REVISED MAY 2012  
MINIMUM OUTPUT CURRENT  
MAXIMUM OUTPUT CURRENT  
The quiescent current of the XTR117 (typically 130μA)  
is the lower limit of its output current. Zero input current  
(IIN = 0) will produce an IO equal to the quiescent current.  
Output current will not begin to increase until  
IIN > IQ/100. Current drawn from VREG will be added to  
this minimum output current. Up to 3.8mA is available  
to power external circuitry while still allowing the output  
current to go below 4mA.  
The XTR117 provides accurate, linear output up to  
25mA. Internal circuitry limits the output current to  
approximately 32mA to protect the transmitter and loop  
power/measurement circuitry.  
It is possible to extend the output current range of the  
XTR117 by connecting an external resistor from pin 3  
to pin 5, to change the current limit value. Since all  
output current must flow through internal resistors, it is  
possible to cause internal damage with excessive  
current. Output currents greater than 45mA may cause  
permanent damage.  
OFFSETTING THE INPUT  
A low-scale output of 4mA is produced by creating a  
40μA input current. This input current can be created  
with the proper value resistor from an external  
REVERSE-VOLTAGE PROTECTION  
reference voltage (V  
) as shown in Figure 2. V  
REF  
REG  
The XTR117 low compliance voltage rating (minimum  
operating voltage) of 7.5V permits the use of various  
voltage protection methods without compromising  
operating range. Figure 3 shows a diode bridge circuit  
which allows normal operation even when the voltage  
connection lines are reversed. The bridge causes a two  
diode drop (approximately 1.4V) loss in loop supply  
voltage. This voltage drop results in a compliance  
voltage of approximately 9V—satisfactory for most  
applications. A diode can be inserted in series with the  
loop supply voltage and the V+ pin to protect against  
reverse output connection lines with only a 0.7V loss in  
loop supply voltage.  
can be used as shown in Figure 2 but will not have the  
temperature stability of a high quality reference such as  
the REF3125.  
XTR117  
VREG  
8
VREF (2.5V) or  
...................  
R
Ω
62.5kIN  
40 A  
μ
IIN  
2
A1  
0 to 160 A  
μ
IRET  
3
R1  
2.475k  
Ω
Figure 2. Creating Low-Scale Offset  
XTR117  
VREG  
V+  
7
+5V  
Regulator  
8
Maximum VPS must be less  
than minimum voltage rating  
of the zener diode.  
B
6
Q1  
RIN  
IIN  
2
A1  
(1)  
μ
0.01  
F
D1  
IN4148  
E
5
VIN  
RLIM  
VLOOP  
RL  
IRET  
3
IO = 100 VIN  
RIN  
R1  
2.475k  
R2  
25  
The diode bridge causes a  
1.4V loss in loop supply voltage.  
See ReverseVoltage Protection.  
Ω
Ω
4
NOTE: (1) Some examples of zener diodes include: P6KE51 or 1N4755A. Use lower  
voltage zener diodes with loop powersupply voltages < 30V for increased protection. See  
Overvoltage Surge Protection.  
Figure 3. Reverse Voltage Operation and Over-Voltage Surge Protection  
6
 
XTR117  
www.ti.com  
SBOS344C SEPTEMBER 2005 REVISED MAY 2012  
protection diode is used, a series diode or diode bridge  
should be used for protection against reversed  
connections.  
OVER-VOLTAGE SURGE PROTECTION  
Remote connections to current transmitters can  
sometimes be subjected to voltage surges. It is prudent  
to limit the maximum surge voltage applied to the  
XTR117 to as low as practical. Various zener diode and  
surge clamping diodes are specially designed for this  
purpose. Select a clamp diode with as low a voltage  
rating as possible for best protection. Absolute  
maximum power-supply rating on the XTR117 is  
specified at +50V. Keep overvoltages and transients  
below +50V to ensure reliable operation when the  
supply returns to normal (7.5V to 40V).  
RADIO FREQUENCY INTERFERENCE  
The long wire lengths of current loops invite radio  
frequency (RF) interference. RF interference can be  
rectified by the input circuitry of the XTR117 or  
preceding circuitry. This effect generally appears as an  
unstable output current that varies with the position of  
loop supply or input wiring. Interference may also enter  
at the input terminals. For integrated transmitter  
assemblies with short connections to the sensor, the  
interference more likely comes from the current loop  
connections.  
Most surge protection zener diodes have a diode  
characteristic in the forward direction that will conduct  
excessive current, possibly damaging receiving-side  
circuitry if the loop connections are reversed. If a surge  
XTR117  
VREG  
8
RIN  
IIN  
2
VO  
D/A  
IRET  
3
XTR117  
VREG  
8
IIN  
2
IO  
D/A  
Digital  
Control  
Optical  
Isolation  
IRET  
3
VREG XTR117  
8
RFILTER  
RIN  
IIN  
2
PWM  
Out  
Digital  
Control  
μ
C
Optical  
Isolation  
CFILTER  
IRET  
3
Figure 4. Digital Control Methods  
7
XTR117  
www.ti.com  
SBOS344C SEPTEMBER 2005 REVISED MAY 2012  
VS  
2.5V  
Nonlinear  
Bridge  
Transducer  
Ref  
Linearization  
Circuit  
P
XTR117  
PGA309  
IO  
VREG  
+5V  
Regulator  
V+  
7
psi  
0
50  
Lin DAC  
8
Analog Sensor Linearization  
B
6
Q1  
ROS  
RIN  
Ω
125k  
Ω
25k  
IIN  
Fault  
Monitor  
Linear  
VOUT  
VLOO P  
Over/Under  
Scale Limiter  
AutoZero  
PGA  
(1)  
2
A1  
E
5
Analog Signal Conditioning  
+125_C  
40_C  
RL  
RLIM  
IRET  
3
Digital  
Temperature  
Compensation  
Int Temp  
T
IO = 100VIN  
RIN  
R2  
25Ω  
R1  
2.475k  
Temp  
ADC  
Control Register  
Interface Circuitry  
Ω
Ext Temp  
Ext Temp  
4
EEPROM  
(SOT235)  
Digital Calibration  
NOTE: (1) PGA309 VOUT: 0.5V to 4.5V.  
Figure 5. Complete 4-20mA Pressure Transducer Solution with PGA309 and XTR117  
DFN PACKAGE  
LAYOUT GUIDELINES  
The XTR117 is offered in a DFN-8 package (also known  
as SON). The DFN is a QFN package with lead contacts  
on only two sides of the bottom of the package. This  
leadless package maximizes board space and  
enhances thermal and electrical characteristics through  
an exposed pad.  
The exposed leadframe die pad on the DFN package  
should be soldered to a thermal pad on the PCB. A  
mechanical drawing showing an example layout is  
attached at the end of this data sheet. Refinements to  
this layout may be required based on assembly process  
requirements. Mechanical drawings located at the end  
of this data sheet list the physical dimensions for the  
package and pad. The five holes in the landing pattern  
are optional, and are intended for use with thermal vias  
that connect the leadframe die pad to the heatsink area  
on the PCB.  
DFN packages are physically small, have a smaller  
routing area, improved thermal performance, and  
improved electrical parasitics. Additionally, the absence  
of external leads eliminates bent-lead issues.  
The DFN package can be easily mounted using  
standard printed circuit board (PCB) assembly  
techniques. See Application Note, QFN/SON PCB  
Attachment (SLUA271) and Application Report, Quad  
Flatpack No-Lead Logic Packages (SCBA017), both  
available for download at www.ti.com.  
Soldering the exposed pad significantly improves  
board-level reliability during temperature cycling, key  
push, package shear, and similar board-level tests.  
Even with applications that have low power dissipation,  
the exposed pad must be soldered to the PCB to  
provide structural integrity and long-term stability.  
The exposed leadframe die pad on the bottom of  
the package should be connected to IRET or left  
unconnected.  
8
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Jun-2014  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
COMBOSENSOR  
XTR117AIDGKR  
ACTIVE  
0
8
TBD  
Call TI  
Call TI  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
SON  
DGK  
DGK  
DGK  
DGK  
DRB  
DRB  
DRB  
2500  
2500  
250  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU |  
CU NIPDAUAG  
Level-3-260C-168 HR  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
BOZ  
BOZ  
BOZ  
BOZ  
BOY  
BOY  
BOY  
XTR117AIDGKRG4  
XTR117AIDGKT  
XTR117AIDGKTG4  
XTR117AIDRBR  
XTR117AIDRBT  
XTR117AIDRBTG4  
8
8
8
8
8
8
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU |  
CU NIPDAUAG  
250  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
3000  
250  
Green (RoHS  
& no Sb/Br)  
SON  
Green (RoHS  
& no Sb/Br)  
SON  
250  
Green (RoHS  
& no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Jun-2014  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish  
value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
24-Jul-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
XTR117AIDGKR  
XTR117AIDGKT  
XTR117AIDRBR  
XTR117AIDRBT  
VSSOP  
VSSOP  
SON  
DGK  
DGK  
DRB  
DRB  
8
8
8
8
2500  
250  
330.0  
180.0  
330.0  
180.0  
12.4  
12.4  
12.4  
12.4  
5.3  
5.3  
3.3  
3.3  
3.4  
3.4  
3.3  
3.3  
1.4  
1.4  
1.1  
1.1  
8.0  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
12.0  
Q1  
Q1  
Q2  
Q2  
3000  
250  
SON  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
24-Jul-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
XTR117AIDGKR  
XTR117AIDGKT  
XTR117AIDRBR  
XTR117AIDRBT  
VSSOP  
VSSOP  
SON  
DGK  
DGK  
DRB  
DRB  
8
8
8
8
2500  
250  
367.0  
210.0  
367.0  
210.0  
367.0  
185.0  
367.0  
185.0  
35.0  
35.0  
35.0  
35.0  
3000  
250  
SON  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest  
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supplied at the time of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily  
performed.  
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or  
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information  
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Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration  
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Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service  
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to  
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requirements. Nonetheless, such components are subject to these terms.  
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Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in  
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regulatory requirements in connection with such use.  
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of  
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.  
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Applications  
Audio  
www.ti.com/audio  
amplifier.ti.com  
dataconverter.ti.com  
www.dlp.com  
Automotive and Transportation www.ti.com/automotive  
Communications and Telecom www.ti.com/communications  
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DSP  
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Copyright © 2014, Texas Instruments Incorporated  
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