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7P016FLB2700I15

型号：

7P016FLB2700I15

品牌：

WEDC[ WHITE ELECTRONIC DESIGNS CORPORATION ]

页数：

14 页

PDF大小：

197 K

下载PDF手册
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
2 MEGABYTE through 40 MEGABYTE (AMD based)  
FEATURES  
ARCHITECTURE OVERVIEW  
ꢀ
ꢀ
ꢀ
Low cost High Density Linear Flash Card  
WEDC’s FLB series is designed to support from two to  
twenty (see Block diagram) 8Mb or 16MB components,  
providing a wide range of density options. Cards are based  
on theAm29F080 (8Mb) orAm29F016 (16Mb) devices for  
5V only applications. Devices codes for the Am29F080  
and Am29F016 are D5H and ADH respectively. Systems  
should be able to recognize both codes. Cards utilizing  
the 8Mb components provide densities ranging from  
2MB to 20MB in 2MB increments, cards utilizing 16Mb  
components provide densities ranging from 4MB to 40MB  
in 4MB increments.  
Supports 5V only systems  
Based on AMD Flash Components  
• low standby power without entering reset mode  
• allows standard access from standby mode  
Fast Read Performance  
ꢀ
• 150ns Maximum Access Time  
x8/ x16 Data Interface  
ꢀ
ꢀ
High Performance Random Writes  
• 10µs Typical Word Write Time  
Automated Write and Erase Algorithms  
• AMD Command Set  
In support of the PC Card 95 standard for word wide  
access devices are paired. Therefore, the Flash array is  
structured in 64K word blocks. Write, read and block erase  
operations can be performed as either a word or byte wide  
operation . By multiplexingA0, CE1# and CE2#, 8-bit hosts  
can access all data on data lines DQ0 - DQ7. The FLB  
series cards conform with the PC Card Standard (formerly  
PCMCIA) and supported JEIDA, providing electrical and  
physical compatibility. The PC Card form factor offers an  
industry standard pinout and mechanical outline, allowing  
density upgrades without system design changes.  
ꢀ
ꢀ
ꢀ
ꢀ
100,000 Erase Cycles per Block  
64K word symmetrical Block Architecture  
PC Card Standard Type I Form Factor  
GENERAL DESCRIPTION  
WEDC’s PCMCIA Flash memory cards offer high density  
linear Flash solid state storage solutions for code and data  
storage, high performance disk emulation and execute  
in place (XIP) applications in mobile PC and dedicated  
(embedded) equipment.  
WEDC’s standard cards are shipped with WEDC’s  
silkscreen design. Cards are also available with blank  
housings (no silkscreen). The blank housings are available  
in both a recessed (for label) and flat housing. Please  
contact WEDC sales representative for further information  
on Custom artwork.  
Packaged in PCMCIA type I housing, each card contains  
a connector, an array of Flash memories packaged in  
TSOP packages and card control logic. The card control  
logic provides the system interface and controls the  
internal Flash memories. Combined with file management  
software, such as Flash Translation Layer (FTL), WEDC  
Flash cards provide removable high-performance disk  
emulation.  
The WEDC FLAseries is based onAMD Flash memories.  
The FLB series offers byte wide and word wide operation,  
low power modes and Card Information Structure (CIS)  
for easy identification of card characteristics.  
Note: Standard options include attribute memory. Cards without attribute memory are  
available. Cards are also available with or without a hardware write protect switch.  
Auguat 2000  
Rev. 3  
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
BLOCK DIAGRAM  
Manuf ID Device ID  
Device type  
Am28F080  
Am28F016  
01  
D5  
AD  
H
H
H
H
01  
CSn  
Device Pair (N/2 - 1)  
Device (N-1)  
Device (N-2)  
Array  
Address  
Bus  
ADDRESS  
ADDRESS BUS  
A1-A25  
BUFFER  
Control  
Address  
Bus  
M Res  
WE#  
OE#  
WL#  
RL#  
WH#  
Control Logic  
PCMCIA Interface  
CE2#  
CE1#  
RH#  
Qn  
CSn  
Device Pair 1  
REG#  
A0  
WP  
Q2  
Q0  
Device 3  
Device 1  
Device 2  
Device 0  
CS1  
CS0  
At/Reg enable  
Ctrl  
CS0  
Device Pair 0  
Vcc  
RH#  
WL# RL#  
WH#  
DATA  
BUS  
DATA  
BUS  
Vcc  
0000h  
attrib. mem  
CIS  
Q8-Q15  
Q0-Q7  
EEPROM 2kB  
control  
Q0-Q7  
Vcc  
I/O buffer  
DATA  
BUS  
DATA  
BUS  
D8-D15  
D0-D7  
Auguat 2000  
Rev. 3  
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
PINOUT  
Pin  
1
2
3
4
5
6
7
8
Signal name  
GND  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
CE1#  
A10  
OE#  
A11  
I/O  
Function  
Ground  
Data bit 3  
Data bit 4  
Data bit 5  
Active  
Pin  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
Signal name  
GND  
CD1#  
DQ11  
DQ12  
DQ13  
DQ14  
DQ15  
CE2#  
VS1  
I/O  
Function  
Ground  
Card Detect 1  
Data bit 11  
Data bit 12  
Data bit 13  
Data bit 14  
Data bit 15  
Card Enable 2  
Voltage Sense 1  
Reserved  
Active  
I/O  
I/O  
I/O  
I/O  
I/O  
I
I
I
I
I
I
I
I
I
O
O
I/O  
I/O  
I/O  
I/O  
I
LOW  
Data bit 6  
Data bit 7  
Card enable 1  
Address bit 10  
Output enable  
Address bit 11  
Address bit 9  
Address bit 8  
Address bit 13  
Address bit 14  
Write Enable  
Ready/Busy  
Supply Voltage  
Prog. Voltage  
Address bit 16  
Address bit 15  
Address bit 12  
Address bit 7  
Address bit 6  
Address bit 5  
Address bit 4  
Address bit 3  
Address bit 2  
Address bit 1  
Address bit 0  
Data bit 0  
LOW  
LOW  
I
O
LOW  
N.C.  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
RFU  
RFU  
A17  
A18  
A19  
A20  
A21  
VCC  
VPP2  
A22  
A23  
A24  
A25  
A9  
A8  
Reserved  
I
I
I
I
I
Address bit 17  
Address bit 18  
Address bit 19  
Address bit 20  
Address bit 21  
Supply Voltage  
Prog. Voltage  
Address bit 22  
Address bit 23  
Address bit 24  
Address bit 25  
Voltage Sense 2  
Card Reset  
Extended Bus cycle  
Reserved  
Attrib Mem Select  
Bat. Volt. Detect 2  
Bat. Volt. Detect 1  
Data bit 8  
A13  
A14  
WE#  
RDY/BSY#  
VCC  
VPP1  
A16  
A15  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
DQ0  
DQ1  
DQ2  
WP  
LOW  
LOW  
2MB(2)  
4MB(2.3)  
N.C.  
NC  
I
I
I
I
I
I
I
I
I
I
I
I
I
O
I
8MB(3)  
16MB(3)  
32MB(3)  
64MB(3)  
N.C.  
VS2  
RST  
HIGH  
LOW(2)  
Wait#  
RFU  
REG#  
BVD2  
BVD1  
DQ8  
O
I
O
O
I/O  
I/O  
O
I
I
(2)  
(2)  
I/O  
I/O  
I/O  
O
Data bit 1  
Data bit 2  
Write Potect  
Ground  
DQ9  
Data bit 9  
Data bit 10  
Card Detect 2  
Ground  
DQ10  
CD2#  
GND  
HIGH  
O
LOW  
GND  
Notes:  
MECHANICAL  
1. RDY/BSY is an open drain output, external pull-up resistor  
is required.  
.063  
3.370  
2. Wait#, BVD1 and BVD2 are driven high for compatibility.  
3. Shows density for which specified address bit is MSB.  
Higher order address bits are no connects (ie 4MB A21 is  
MSB A22 - A25 are NC).  
.039  
2.126  
.039  
.400  
.130  
MAX.  
Auguat 2000  
Rev. 3  
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
CARD SIGNAL DESCRIPTION  
Symbol  
A0 - A25  
Type  
INPUT  
Name and Function  
ADDRESS INPUTS: A0 through A25 enable direct addressing of up to 64MB of memory on the card. Signal A0 is not used  
in word access mode. The memory will wrap at the card density boundary (see PINOUT, note 3). The system should not try  
to access memory beyond the card density. A25 is the most significant bit. A24 – A25 are not connected.  
DQ0 - DQ15 INPUT/OUTPUT  
DATA INPUT/OUTPUT: DQ0 THROUGH DQ15 constitute the bi-directional databus. DQ0 – DQ7 constitute the lower  
(even) byte and DQ8 – DQ15 the upper (odd) byte. DQ15 is the MSB.  
CE1#, CE2#  
INPUT  
CARD ENABLE 1 AND 2: CE1# enables even byte accesses, CE2# enables odd byte accesses. Multiplexing A0, CE1#  
and CE2# allows 8-bit hosts to access all data on DQ0 - DQ7.  
OE#  
WE#  
RDY/BSY#  
CD1#, CD2#  
INPUT  
INPUT  
N.C.  
OUTPUT ENABLE: Active low signal gating read data from the memory card.  
WRITE ENABLE: Active low signal gating write data to the memory card.  
READY/BUSY OUTPUT: Indicates status of internally timed erase or program algorithms. This signal is not connected.  
CARD DETECT 1 and 2: Provide card insertion detection. These signals are internally connected to ground on the card.  
The host shall monitor these signals to detect card insertion (pulled-up on host side).  
OUTPUT  
WP  
OUTPUT  
WRITE PROTECT: Write protect reflects the status of the Write Protect switch on the memory card. WP set to high = write  
protected, providing internal hardware write lockout to the Flash array.  
If card does not include optional write protect switch, this signal will be pulled low internally indicating write protect = “off”.  
VPP1  
VPP2  
N.C.  
N.C.  
PROGRAM/ERASE POWER SUPPLY: Provides programming voltages 12.0V for lower byte (D0 – D7) memory  
components. This signal is not connected.  
PROGRAM/ERASE POWER SUPPLY: Provides programming voltages 12.0V for upper byte (D8 – D15) memory  
components. This signal is not connected.  
VCC  
GND  
CARD POWER SUPPLY: (5.0V).  
CARD GROUND  
REG#  
INPUT  
ATTRIBUTE MEMORY SELECT: Active low signal, enables access to Attribute Memory Plane, occupied by Card  
Information Structure and Card Registers.  
RST  
WAIT#  
BVD1, BVD2  
VS1, VS2  
RFU  
N.C.  
RESET: Active high signal for placing cards in Power-on default state. This signal is not connected.  
WAIT: This signal is pulled high internally for compatibility. No wait states are generated.  
BATTERY VOLTAGE DETECT: These signals are pulled high to maintain SRAM card compatibility.  
VOLTAGE SENSE: Notifies the host socket of the card’s VCC requirements. VS1 and VS2 are open to indicate a 5V card.  
RESERVED FOR FUTURE USE  
OUTPUT  
OUTPUT  
OUTPUT  
N.C.  
NO INTERNAL CONNECTION TO CARD: pin may be driven or left floating  
Auguat 2000  
Rev. 3  
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
CARD SIGNAL DESCRIPTION  
Symbol  
Type  
Name and Function  
A0 - A25  
INPUT  
ADDRESS INPUTS: A0 through A25 enable direct addressing of up to 64MB of memory on the card. Signal A0 is not used in word  
access mode. A25 is the most significant bit  
DQ0  
- DQ15  
INPUT/  
OUTPUT  
DATA INPUT/OUTPUT: DQ0 THROUGH DQ15 constitute the bi-directional databus. DQ15 is the MSB.  
CE1#,  
CE2#  
INPUT  
CARD ENABLE 1 AND 2: CE1# enables even byte accesses, CE2# enables odd byte accesses. Multiplexing A0, CE1# and CE2#  
allows 8-bit hosts to access all data on DQ0 - DQ7.  
OE#  
WE#  
INPUT  
INPUT  
OUTPUT ENABLE: Active low signal gating read data from the memory card.  
WRITE ENABLE: Active low signal gating write data to the memory card.  
RDY/BSY# OUTPUT  
READY/BUSY OUTPUT: Indicates status of internally timed erase or program algorithms. A high output indicates that the card is  
ready to accept accesses. A low output indicates that one or more devices in the memory card are busy with internally timed erase or  
write activities.  
CD1#,  
CD2#  
OUTPUT  
OUTPUT  
CARD DETECT 1 and 2: Provide card insertion detection. These signals are connected to ground internally on the memory card.  
The host socket interface circuitry shall supply 10K-ohm or larger pull-up resistors on these signal pins.  
WP  
WRITE PROTECT: Write protect reflects the status of the Write Protect switch on the memory card. WP set to high = write protected,  
providing internal hardware write lockout to the Flash array. If card does not include optional write protect switch, this signal will be  
pulled low internally indicating write protect = “off”.  
VPP1,  
VPP2  
N.C.  
PROGRAM/ERASE POWER SUPPLY: Not connected for 5V only card.  
VCC  
GND  
CARD POWER SUPPLY: 5.0V for all internal circuitry.  
GROUND: for all internal circuitry.  
REG#  
INPUT  
INPUT  
ATTRIBUTE MEMORY SELECT: provides access to Flash memory card registers and Card Information Structure in the Attribute  
Memory Plane.  
RST  
RESET: Active high signal for placing card in Power-on default state. Reset can be used as a Power-Down signal for the memory  
array.  
WAIT#  
OUTPUT  
OUTPUT  
WAIT: This signal is pulled high internally for compatibility. No wait states are generated.  
BVD1,  
BVD2  
BATTERY VOLTAGE DETECT: These signals are pulled high to maintain SRAM card compatibility.  
VS1, VS2 OUTPUT  
VOLTAGE SENSE: Notifies the host socket of the card’s VCC requirements. VS1 and VS2 are open to indicate a 5V card has been  
inserted.  
RFU  
N.C.  
RESERVED FOR FUTURE USE  
NO INTERNAL CONNECTION TO CARD: pin may be driven or left floating  
Auguat 2000  
Rev. 3  
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
ABSOLUTE MAXIMUM RATINGS (2)  
Notes:  
Operating Temperature TA (ambient)  
Commercial  
1. During transitions, inputs may undershoot to -2.0V or overshoot to VCC +2.0V for  
periods less than 20ns.  
0°C to +60°C  
Industrial  
-40°C to +85°C**  
2. Stress greater than those listed under “Absolute Maximum ratings” may cause  
permanent damage to the device. This is a stress rating only and functional operation  
at these or any other conditions greater than those indicated in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect reliability.  
Storage Temperature  
Commercial  
-30°C to +80°C  
Industrial  
Voltage on any pin relative to VSS  
VCC supply Voltage relative to VSS  
** Advanced information  
-40°C to +85°C**  
-0.5V to VCC+0.5V (1)  
-0.5V to +7.0V  
DC CHARACTERISTICS (1)  
Symbol Parameter  
Density  
Notes  
Typ(4)  
Max  
Units  
Test Conditions  
ICCR  
VCC Read Current  
All  
75  
mA  
VCC = VCC max  
tcycle = 150ns, CMOS levels  
ICCW  
ICCE  
ICCS  
(CMOS)  
VCC Program Current  
VCC Erase Current  
VCC Standby Current  
All  
All  
1MB  
(4MB)  
150  
150  
230  
mA  
mA  
mA  
2,3  
80  
VCC = VCC max  
Control Signals = VCC  
CMOS levels  
CMOS Test Conditions: VCC = 5V 5ꢀ, VIL = VSS 0.2V, VIH = VCC 0.2V  
Notes:  
1. All currents are RMS values unless otherwise specified. ICCR, ICCW and ICCE are based on Word wide operations.  
2. Control Signals: CE1#, CE2#, OE#, WE#, REG#.  
3. ICCD and ICCS are specified for lowest density card for each component type (2MB for 8Mb components and 4MB for 16Mb components) This represents a single pair of devices. For  
higher densities multiply the number of device pairs by the specified current in the table. For example a 40MB card will use 10 device pairs of 16Mb components. The maximum ICCD  
will be 10 x 40µA = 400µA. The maximum ICCS will be 10 x 230µA = 2.3mA.  
4. Typical: VCC = 5V, T = +25°C.  
Symbol  
Parameter  
Notes  
Min  
Max  
Units  
Test Conditions  
ILI  
Input Leakage Current  
1
20  
µA  
VCC = VCCMAX  
VIN =VCC or VSS  
ILO  
Output Leakage Current  
1
20  
µA  
VCC = VCCMAX  
VOUT =VCC or VSS  
VIL  
VIH  
VOL  
VOH  
VLKO  
Input Low Voltage  
Input High Voltage  
Output Low Voltage  
Output High Voltage  
VCC Erase/Program Lock Voltage  
1
1
1
1
1
0
0.8  
VCC+0.5  
0.4  
V
V
V
V
V
0.7VCC  
IOL = 3.2mA  
IOH = -2.0mA  
VCC-0.4  
2.0  
VCC  
Notes:  
1. Values are the same for byte and word wide modes for all card densities.  
2. Exceptions: Leakage currents on CE1#, CE2#, OE#, REG# and WE# will be < 500 µA when VIN = GND due to internal pull-up resistors.  
Leakage currents on RST will be <150µA when VIN=VCC due to internal pull-down resistor.  
Auguat 2000  
Rev. 3  
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
AC CHARACTERISTICS – READ TIMING PARAMETERS  
150ns  
SYMBOL (PCMCIA)  
Parameter  
Unit  
Min  
Max  
tC(R)  
tA(A)  
Read Cycle Time  
Address Access Time  
150  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
150  
150  
75  
20  
0
20  
20  
0
tA(CE)  
tA(OE)  
tSU(A)  
tSU(CE)  
tH(A)  
tH(CE)  
tV(A)  
tDIS(CE)  
tDIS(OE)  
tEN(CE)  
tEN(OE)  
Card Enable Access Time  
Output Enable Access Time  
Address Setup Time  
Card Enable Setup Time  
Address Hold Time  
Card Enable Hold Time  
Output Hold from Address Change  
Output Disable Time from CE#  
Output Disable Time from OE#  
Output Enable Time from CE#  
Output Enable Time from OE#  
75  
75  
5
5
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.  
READ TIMING DIAGRAM  
tc(R)  
th(A)  
ta(A)  
A[25::0], REG#  
CE1#, CE2#  
tv(A)  
ta(CE)  
tsu(CE)  
NOTE 1  
NOTE 1  
th(CE)  
ta(OE)  
tsu(A)  
tdis(CE)  
OE#  
tdis(OE)  
ten(OE)  
D[15::0]  
DATA VALID  
Note: Signal may be high or low in this area.  
Auguat 2000  
Rev. 3  
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
AC CHARACTERISTICS – WRITE TIMING PARAMETERS  
150ns  
SYMBOL (PCMCIA)  
Parameter  
Unit  
Min  
150  
80  
Max  
tCW  
tW(WE)  
tSU(A)  
Write Cycle Time  
Write Pulse Width  
Address Setup Time  
Address Setup Time for WE#  
Card Enable Setup Time for WE#  
Data Setup Time for WE#  
Data Hold Time  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
20  
tSU(A-WEH)  
tSU(CE-WEH)  
tSU(D-WEH)  
tH(D)  
tREC(WE)  
tDIS(WE)  
tDIS(OE)  
tEN(WE)  
tEN(OE)  
100  
100  
50  
20  
20  
Write Recover Time  
Output Disable Time from WE#  
Output Disable Time from OE#  
Output Enable Time from WE#  
Output Enable Time from OE#  
Output Enable Setup from WE#  
Output Enable Hold from WE#  
Card Enable Setup Time from OE#  
Card Enable Hold Time  
75  
75  
5
5
10  
10  
0
tSU(OE-WE)  
tH(OE-WE)  
tSU(CE)  
tH(CE)  
20  
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.  
WRITE TIMING DIAGRAM  
tC(W)  
A[25::0], REG#  
CE1#, CE2#  
tSU(A-WEH)  
tSU(CE-WEH)  
tSU(CE)  
tREC(WE)  
tH(CE)  
NOTE 1  
NOTE 1  
OE#  
WE#  
tH(OE-WE)  
tH(D)  
tSU(A)  
tW(WE)  
tSU(OE-WE)  
tSU(D-WEH)  
NOTE 2  
D[15::0](DIN)  
DATA INPUT  
Notes:  
tDIS(WE)  
tDIS(OE)  
1. Signal may be high or low in this area.  
2. When the data I/O pins are in the output  
state, no signals shall be applied to the data  
pins (D15 - D0) by the host system.  
tEN(OE)  
tEN(WE)  
NOTE 2  
D[15::0](DOUT)  
Auguat 2000  
Rev. 3  
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
DATA WRITE AND ERASE PERFORMANCE (1,3)  
VCC = 5V 5ꢀ, 0°C ꢁ TA ꢁ + 60°C  
SYM  
Parameter  
Notes  
Min  
Typ(1)  
Max  
Units  
Test Conditions  
tWHQV1  
tEHQV1  
Word/Byte Program time  
2,4  
8µs  
3ms  
tWHQV2  
tEHQV2  
Block Program Time  
Block Erase Time  
2
2
0.5  
1.1  
2.1  
10  
sec  
sec  
Word Program Mode  
Notes:  
1. Typical: Nominal voltages and TA = 25°C.  
2. Excludes system overhead.  
3. Valid for all speed options.  
4. To maximize system performance RDY/BSY# signal should be polled.  
Auguat 2000  
Rev. 3  
9
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
PRODUCT MARKING  
EDI  
WED 7P016FLB2600C15 C995 9915  
Company Name  
Part Number  
Lot Code/Trace Number  
Date Code  
Note:  
Some products are currently marked with our pre-merger company name/acronym (EDI). During our  
transition period, some products will also be marked with our new company name/acronym (WED).  
Starting October 2000 all PCMCIA products will be marked only with the WED prefix.  
PART NUMBERING  
7 P 016 FLC26 00 C 15  
CARD TECHNOLOGY  
FLASH  
SRAM  
7
8
PC CARD  
P
R
Standard PCMCIA  
Ruggedized PCMCIA  
CARD CAPACITY  
016 16MB  
CARD FAMILY AND VERSION  
- See Card Family and Version Info.  
for details (next page)  
PACKAGING OPTION  
00 Standard, type I  
TEMPERATURE RANGE  
C = Commercial 0°C to +70°C  
I = Industrial -40°C to +85°C  
CARD ACCESS TIME  
15 150ns  
25 250ns  
Auguat 2000  
Rev. 3  
10  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
CARD FAMILY AND VERSION INFORMATION  
FLB 21-24  
Based on Am29F016 for 5V only applications  
FLB21 No Attribute Memory, no Write Protect  
FLB22 With Attribute Memory, no Write Protect  
FLB23 No Attribute Memory, with Write Protect  
FLB24 With Attribute Memory, with Write Protect  
Example P/N 7P XXX FLB 22 SS T ZZ  
FLB 25-28  
Based on Am29F080 for 5V only applications  
FLB25 No Attribute Memory, no Write Protect  
FLB26 With Attribute Memory, no Write Protect  
FLB27 No Attribute Memory, with Write Protect  
FLB28 With Attribute Memory, with Write Protect  
Example P/N 7P XXX FLB 26 SS T ZZ  
Auguat 2000  
Rev. 3  
11  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
ORDERING INFORMATION  
EDI 7P XXX FLF YY SS T ZZ  
XXX:  
002 (1) 2MB  
004 4MB  
006 (1) 6MB  
008 8MB  
010 (1) 10MB  
012 12MB  
014 (1) 14MB  
016 16MB  
018 (1) 18MB  
020 20MB  
024 (2) 24MB  
028 (2) 28MB  
032 (2) 32MB  
036 (2) 36MB  
040 (2) 40MB  
1. available only for FLB26  
2. available only for FLB22  
FLBYY: Card Version (See Card Family and Version Information)  
SS:  
00  
01  
02  
WEDC Silkscreen  
Blank Housing, Type I  
Blank Housing, Type I Recessed  
T:  
C
I**  
Commercial  
Industrial  
ZZ:  
15  
150ns  
Notes: Options without attribute memory and with hardware write protect switch are available.  
** Denotes advanced information.  
Auguat 2000  
Rev. 3  
12  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
CIS INFORMATION FOR FLB SERIES CARDS  
Address Value  
Description  
CISTPL_DEVICE  
TPL_LINK  
FLASH = 150ns (device  
writable)  
Address Value  
40H 45H  
42H 44H  
Description  
Address  
Value  
44H  
45H  
53H  
49H  
47H  
4EH  
53H  
20H  
49H  
4EH  
43H  
4FH  
52H  
50H  
4FH  
52H  
41H  
54H  
45H  
44H  
20H  
00H  
31H  
39H  
39H  
37H  
00H  
FFH  
Description  
00H  
02H  
04H  
01H  
03H  
53H  
E
D
I
7
P
0
x
x
F
L
B
2
x
-
-
-
92H  
94H  
96H  
98H  
9AH  
9CH  
9EH  
A0H  
A2H  
A4H  
A6H  
A8H  
AAH  
ACH  
AEH  
B0H  
B2H  
B4H  
B6H  
B8H  
BAH  
BCH  
BEH  
C0H  
C2H  
C4H  
C6H  
C8H  
D
E
S
I
G
N
S
44H  
46H  
48H  
4AH  
4CH  
4EH  
50H  
52H  
54H  
56H  
58H  
5AH  
5CH  
5EH  
60H  
62H  
64H  
66H  
68H  
6AH  
6CH  
6EH  
70H  
72H  
74H  
76H  
78H  
7AH  
7CH  
7EH  
80H  
82H  
84H  
86H  
88H  
8AH  
8CH  
8EH  
90H  
49H  
37H  
50H  
30H  
(1)  
06H  
0EH  
1EH  
2EH  
3EH  
4EH  
5EH  
6EH  
7EH  
8EH  
9EH  
FFH  
18H  
02H  
01H  
ADH  
17H  
03H  
42H  
01H  
FFH  
1EH  
06H  
02H  
11H  
01H  
01H  
01H  
01H  
CARD SIZE: 4MB  
8MB  
12MB  
16MB  
20MB  
24MB  
28MB  
32MB  
36MB  
40MB  
(1)  
SPACE  
I
N
C
O
R
P
O
R
A
T
E
46H  
4CH  
42H  
32H  
(2)  
2DH  
2DH  
2DH  
31H  
35H  
20H  
00H  
43H  
4FH  
50H  
59H  
52H  
49H  
47H  
48H  
54H  
20H  
45H  
4CH  
45E  
43H  
54H  
52H  
4FH  
4EH  
49H  
43H  
20H  
08H  
0AH  
0CH  
0EH  
10H  
12H  
14H  
16H  
18H  
1AH  
1CH  
1EH  
20H  
22H  
24H  
26H  
28H  
2AH  
END OF DEVICE  
CISTPL_JEDEC_C  
TPL_LINK  
1
5
AMD - ID  
29F016B - ID  
CISTPL_DEVICE_A  
TPL_LINK  
EEPROM - 200ns  
Device Size = 2KBytes  
END OF TUPLE  
CISTPL_DEVICEGEO  
TPL_LINK  
DGTPL_BUS  
DGTPL_EBS  
DGTPL_RBS  
DGTPL_WBS  
DGTPL_PART  
FLASH DEVICE  
NON-INTERLEAVED  
CISTPL_MANFID  
TPL_LINK(04H)  
EDI TPLMID_MANF: LSB  
EDI PLMID_MANF: MSB  
LSB: Number Not  
Assign.  
SPACE  
END TEXT  
D
C
O
P
Y
R
I
G
H
SPACE  
END TEXT  
1
9
9
7
END TEXT  
END OF LIST  
T
(1)  
SPACE  
E
L
E
C
T
R
O
Address  
Value  
Description  
4CH  
30  
31  
32  
33  
34  
0
1
2
3
4
2CH  
2EH  
30H  
32H  
20H  
04H  
F6H  
01H  
4EH  
58H  
30  
32  
34  
36  
38  
0
2
4
6
8
N
I
C
34H  
00H  
MSB: Number Not  
Assign.  
CISTPL_VERS1  
TPL_LINK  
TPLLV1_MAJOR  
TPLLV1_MINOR  
36H  
38H  
3AH  
3CH  
3EH  
00H  
15H  
47H  
04H  
01H  
SPACE  
(2)  
32  
34  
36  
38  
2
4
6
8
Auguat 2000  
Rev. 3  
13  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
PCMCIA Flash Memory Card  
FLB Series  
White Electronic Designs  
Document Title  
1 MEGABYTE through 10 MEGABYTE (AMD based)  
Revision History  
Rev #  
History  
Release Date Status  
Rev 0  
Rev 1  
Rev 2  
Rev 3  
Initial release  
12-23-98  
5-27-99  
5-31-00  
8-1-00  
Change logo  
Added page 10  
Corrected timing errors on pages 6 and 7  
Auguat 2000  
Rev. 3  
14  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
厂商 型号 描述 页数 下载

WEDC

 		7P001FEA0200C15 [ Flash Card, 1MX8, 150ns, CARD-68 ] 6 页

WEDC

 		7P001FEA0300C15 [ Flash Card, 1MX8, 150ns, CARD-68 ] 6 页

WEDC

 		7P001FLG0100C15 [ Flash Card, 512MX16, 150ns, CARD-68 ] 11 页

ETC

 		7P001FLG0100C20 周边其他\n[ Peripheral Miscellaneous ] 13 页

WEDC

 		7P001FLG0100I15 [ Flash Card, 512MX16, 150ns, CARD-68 ] 11 页

WEDC

 		7P001FLG0100I20 [ Flash Card, 512MX16, 200ns, CARD-68 ] 11 页

WEDC

 		7P001FLG0101C15 [ Flash Card, 512MX16, 150ns, CARD-68 ] 11 页

WEDC

 		7P001FLG0101C20 [ Flash Card, 512MX16, 200ns, CARD-68 ] 11 页

WEDC

 		7P001FLG0101I15 [ Flash Card, 512MX16, 150ns, CARD-68 ] 11 页

ETC

 		7P001FLG0101I20 周边其他\n[ Peripheral Miscellaneous ] 13 页

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