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5P83905PGGK8

型号：

5P83905PGGK8

品牌：

IDT[ INTEGRATED DEVICE TECHNOLOGY ]

页数：

18 页

PDF大小：

373 K

下载PDF手册
High-Performance 1.8V/2.5V/3.3V Crystal  
Input to LVCMOS Clock Fanout Buffer with OE  
5P8390x  
DATASHEET  
Description  
Features  
The 5P8390x is a high performance, 1-to-4/6/8 crystal input to  
LVCMOS fanout buffer with output enable pins. This device  
accepts a fundamental mode crystal from 10MHz to 40MHz  
and outputs LVCMOS clocks with best-in-class phase noise  
performance.  
• 4/6/8 copies of LVCMOS output clocks with best-in-class  
phase noise performance  
• Phase Noise:  
Offset Noise Power (3.3V)  
• 100Hz: -131 dBc/Hz  
The 5P8390x family (5P83904, 5P83905, and 5P83908)  
features a synchronous glitch-free Output Enable function to  
eliminate any intermediate incorrect output clock cycles when  
enabling or disabling outputs. It comes in standard TSSOP  
packages or small QFN packages and can operate from 1.8V  
to 3.3V supplies.  
• 1KHz: -145 dBc/Hz  
• 10KHz: -154 dBc/Hz  
• 100KHz: -161 dBc/Hz  
• Operating power supply modes:  
• Full 3.3V, 2.5V, 1.8V  
• Mixed 3.3V core/2.5V output operating supply  
• Mixed 3.3V core/1.8V output operating supply  
• Mixed 2.5V core/1.8V output operating supply  
• Crystal Oscillator Interface  
• Synchronous Output Enable  
• Packaged in 16-, 20-pin TSSOP and QFN packages (Pb  
free, fully RoHS compliant)  
• Extended (-40°C to +105°C) temperature range  
5P83904 Block Diagram  
CLK0  
CLK1  
CLK2  
XTAL_IN  
OSC  
XTAL_OUT  
ENABLE1  
ENABLE2  
SYNC1  
SYNC2  
CLK3  
5P8390x OCTOBER 5, 2016  
1
©2016 Integrated Device Technology, Inc.  
5P8390x DATASHEET  
5P83905 Block Diagram  
CLK0  
CLK1  
CLK2  
CLK3  
CLK4  
XTAL_IN  
OSC  
XTAL_OUT  
ENABLE1  
ENABLE2  
SYNC1  
SYNC2  
CLK5  
5P83908 Block Diagram  
CLK0  
CLK1  
CLK2  
CLK3  
CLK4  
CLK5  
CLK6  
XTAL_IN  
OSC  
XTAL_OUT  
ENABLE1  
ENABLE2  
SYNC1  
SYNC2  
CLK7  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
2
OCTOBER 5, 2016  
5P8390x DATASHEET  
Pin Assignments for TSSOP Packages  
XTAL_IN  
GND  
XTAL_OUT  
1
2
20  
19  
XTAL_IN  
XTAL_OUT  
ENABLE2  
GND  
1
2
3
4
5
6
7
8
16  
15  
VDD  
ENABLE2  
CLK0  
ENABLE1  
3
18 ENABLE1  
14 CLK3  
CLK7  
17  
4
VDDO  
13  
CLK0  
5P83904PGGI  
16 VDDO  
5
GND  
12 CLK2  
VDDO  
NC  
5P83908PGGI  
CLK1  
6
15  
14  
13  
12  
11  
CLK6  
CLK5  
GND  
CLK4  
VDD  
11  
10  
9
GND  
NC  
VDDO  
CLK2  
7
GND  
8
VDD  
CLK1  
9
GND  
10  
CLK3  
XTAL_IN  
XTAL_OUT  
ENABLE2  
GND  
1
2
3
4
5
6
7
8
16  
15  
ENABLE1  
14 CLK5  
VDDO  
13  
CLK0  
5P83905PGGI  
12 CLK4  
VDDO  
CLK1  
11  
10  
9
GND  
CLK3  
VDD  
GND  
CLK2  
Pin Assignments for QFN Packages  
20 19 18 17 16  
5P83908NDGI  
13  
14  
16 15  
1
2
3
4
5
15  
14  
13  
12  
11  
XTAL_OUT  
VDD  
CLK6  
CLK5  
GND  
12  
11  
10  
9
XTAL_OUT  
ENABLE2  
1
2
3
4
CLK2  
GND  
NC  
5P83904CMGI  
ENABLE2  
CLK0  
GND  
VDD  
CLK4  
VDD  
CLK0  
6
7
8
5
GND  
6
7 8 9 10  
13  
14  
16 15  
12  
XTAL_OUT  
ENABLE2  
GND  
1
CLK4  
GND  
CLK3  
VDD  
2
3
4
11  
10  
9
5P83905CMGI  
CLK0  
6
7 8  
5
OCTOBER 5, 2016  
3
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
5P8390x DATASHEET  
Pin Descriptions  
Pin Number  
Pin Name  
Pin Type  
Pin Description  
5P83904  
5P83905  
5P83908  
XTAL_IN  
16  
16  
20  
Input  
Oscillator Input from Crystal.  
XTAL_OUT  
VDD  
1
9
1
9
1
Input  
Oscillator Output to drive Crystal.  
Positive power supply for core.  
2, 11  
Power  
VDDO  
GND  
5, 13  
5, 13  
7, 16  
Power  
Power  
Positive power supply for outputs.  
Power supply ground.  
3, 7, 11  
3, 7, 11  
5, 9, 13, 19  
Output Enable pin. Please see below Output Enable  
Function Table. Active High. Internal pull-up.  
ENABLE1  
ENABLE2  
15  
2
15  
2
18  
3
Input  
Input  
Output Enable pin. Please see below Output Enable  
Function Table. Active High. Internal pull-up.  
CLK0  
CLK1  
CLK2  
CLK3  
CLK4  
CLK5  
CLK6  
CLK7  
NC  
4
8
4
6
4
6
Output  
Output  
Output  
Output  
Output  
Output  
Output  
Output  
NC  
LVCMOS Clock Output 0. Voltage set by VDDO.  
LVCMOS Clock Output 1. Voltage set by VDDO.  
LVCMOS Clock Output 2. Voltage set by VDDO.  
LVCMOS Clock Output 3. Voltage set by VDDO.  
LVCMOS Clock Output 4. Voltage set by VDDO.  
LVCMOS Clock Output 5. Voltage set by VDDO.  
LVCMOS Clock Output 6. Voltage set by VDDO.  
LVCMOS Clock Output 7. Voltage set by VDDO.  
No connect.  
12  
14  
—
8
8
10  
12  
14  
—
—
—
10  
12  
14  
15  
17  
—
—
—
—
6, 10  
Output Enable Function Table  
ENABLE1 ENABLE2 5P83904 CLK0-2 5P83905 CLK0-4 5P83908 CLK0-6 5P83904 CLK3 5P83905 CLK5 5P83908 CLK7  
0
0
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Active  
Low  
Low  
Active  
Low  
Low  
Active  
Low  
0
1
1
0
Active  
Active  
Active  
Active  
Active  
Active  
1(default)  
1(default)  
Active  
Active  
Active  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
4
OCTOBER 5, 2016  
5P8390x DATASHEET  
Absolute Maximum Ratings  
Stresses above the ratings listed below can cause permanent damage to the 5P8390x. These ratings, which are standard values  
for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions  
above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating  
conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended  
operating temperature range.  
Item  
Rating  
Supply Voltage, VDD  
Output Enable and All Outputs  
CLKIN  
3.465V  
-0.4 V to VDD+0.5 V  
-0.4 V to 3.465V  
-40 to +105°C  
-65 to +150°C  
125C  
Ambient Operating Temperature (extended)  
Storage Temperature  
Junction Temperature  
Soldering Temperature  
260C  
Recommended Operation Conditions  
Parameter  
Min.  
Typ.  
Max.  
+105  
Units  
C  
Ambient Operating Temperature (extended)  
Power Supply Voltage (measured in respect to GND)  
-40  
+1.71  
+3.465  
V
DC Electrical Characteristics  
(VDD = 1.8V, 2.5V, 3.3V)  
VDD=1.8V ±5% , Ambient temperature -40° to +105°C, unless stated otherwise  
Parameter  
Input High Voltage  
Symbol  
VIH  
Conditions  
XTAL_IN, ENABLE1/2 pins  
XTAL_IN, ENABLE1/2 pins  
IOH = -4 mA  
Min.  
Typ.  
Max.  
Units  
0.7xVDD  
V
V
V
V
Input Low Voltage  
Output High Voltage  
Output Low Voltage  
Nominal Output Impedance  
Operating Supply Current  
5P83904  
VIL  
0.3xVDD  
1.85  
VOH  
VOL  
1.65  
0.03  
IOL = 4 mA  
0.05  
ZO  
14  
Outputs On, 25MHz with No Load  
Outputs On, 25MHz with No Load  
Outputs On, 25MHz with No Load  
8.9  
9.0  
9.2  
5P83905  
IDD  
mA  
5P83908  
OCTOBER 5, 2016  
5
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
5P8390x DATASHEET  
VDD=2.5 V ±5%, Ambient temperature -40° to +105°C, unless stated otherwise  
Parameter  
Input High Voltage  
Symbol  
VIH  
Conditions  
XTAL_IN, ENABLE1/2 pins  
XTAL_IN, ENABLE1/2 pins  
IOH = -4 mA  
Min.  
Typ.  
Max.  
Units  
0.7xVDD  
V
V
V
V
Input Low Voltage  
Output High Voltage  
Output Low Voltage  
Nominal Output Impedance  
Operating Supply Current  
5P83904  
VIL  
0.3xVDD  
2.58  
VOH  
VOL  
2.31  
0.03  
IOL = 4 mA  
0.05  
ZO  
14  
Outputs On, 25MHz with No Load  
Outputs On, 25MHz with No Load  
Outputs On, 25MHz with No Load  
10.6  
10.7  
10.8  
5P83905  
IDD  
mA  
5P83908  
VDD=3.3 V ±5% , Ambient temperature -40° to +105°C, unless stated otherwise  
Parameter  
Input High Voltage, CLKIN  
Input Low Voltage, CLKIN  
Output High Voltage  
Output Low Voltage  
Nominal Output Impedance  
Operating Supply Current  
5P83904  
Symbol  
VIH  
Conditions  
XTAL_IN, ENABLE1/2 pins  
XTAL_IN, ENABLE1/2 pins  
IOH = -4 mA  
Min.  
Typ.  
Max.  
Units  
0.7xVDD  
V
V
V
V
VIL  
0.3xVDD  
3.43  
VOH  
VOL  
3.09  
0.03  
IOL = 4 mA  
0.04  
ZO  
14  
Outputs On, 25MHz with No Load  
Outputs On, 25MHz with No Load  
Outputs On, 25MHz with No Load  
12.1  
12.2  
12.3  
5P83905  
IDD  
mA  
5P83908  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
6
OCTOBER 5, 2016  
5P8390x DATASHEET  
AC Electrical Characteristics  
(VDD = 1.8V, 2.5V, 3.3V)  
VDD = 1.8V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise  
Parameter  
Input Frequency  
Symbol  
Conditions  
Input Frequency Crystal  
Input Frequency Clock  
Min.  
8
Typ.  
Max. Units  
fMAX  
40  
200  
3
MHz  
DC  
Delay for Output Enable / Disable  
Time ENABLEx to BCLKn  
tEN / DIS  
t
cycles  
Duty Cycle  
tDC  
45  
55  
65  
ns  
ps  
Output to Output Skew  
Phase Noise  
tSKEWO-O  
25  
Φnoise fOUT = 25 MHz 100 Hz off Carrier  
fOUT = 25 MHz 1 kHz off Carrier  
-121.1974  
-132.1742  
-143.8058  
-155.2978  
0.279  
dBc/Hz  
fOUT = 25 MHz 10 kHz off Carrier  
fOUT = 25 MHz 100 kHz off Carrier  
RMS Phase Jitter  
tJIT(Φ)  
tR / F  
25MHz carrier, Integration Range: 12kHz-20MHz  
20% to 80%  
ps  
ns  
ps  
ns  
Output Rise/Fall Time  
Device to Device Skew  
Propagation Delay  
t
0.95  
200  
6
freq, LVCMOS INPUT  
2.5  
3.1  
VDD = 2.5 V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise  
Parameter  
Input Frequency  
Symbol  
Conditions  
Input Frequency Crystal  
Input Frequency Clock  
Min.  
8
Typ.  
Max. Units  
fMAX  
40  
200  
3
MHz  
DC  
Delay for Output Enable / Disable  
Time ENABLEx to BCLKn  
tEN / DIS  
t
cycles  
Duty Cycle  
tDC  
45  
55  
65  
ns  
ps  
Output to Output Skew  
Phase Noise  
tSKEWO-O  
25  
Φnoise fOUT = 25 MHz 100 Hz off Carrier  
fOUT = 25 MHz 1 kHz off Carrier  
-131.26  
-139.2177  
-149.5185  
-158.7531  
0.2  
dBc/Hz  
fOUT = 25 MHz 10 kHz off Carrier  
fOUT = 25 MHz 100 kHz off Carrier  
RMS Phase Jitter  
tJIT(Φ)  
tR / F  
25MHz carrier, Integration Range: 12kHz-20MHz  
20% to 80%  
ps  
ns  
ps  
ns  
Output Rise/Fall Time  
Device to Device Skew  
Propagation Delay  
t
0.9  
200  
6
freq, LVCMOS INPUT  
2.5  
3.6  
VDD = 3.3 V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise  
Parameter  
Input Frequency  
Symbol  
Conditions  
Input Frequency Crystal  
Input Frequency Clock  
Min.  
8
Typ.  
Max. Units  
fMAX  
40  
200  
3
MHz  
DC  
Delay for Output Enable / Disable  
Time ENABLEx to BCLKn  
tEN / DIS  
t
cycles  
Duty Cycle  
tDC  
45  
55  
65  
ns  
ps  
Output to Output Skew  
tSKEWO-O  
25  
OCTOBER 5, 2016  
7
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
5P8390x DATASHEET  
Parameter  
Symbol  
Conditions  
Min.  
Typ.  
-131.27  
-145.3267  
-154.3789  
-161.1555  
0.16  
Max. Units  
Phase Noise  
Φnoise fOUT = 25 MHz 100 Hz off Carrier  
fOUT = 25 MHz 1 kHz off Carrier  
dBc/Hz  
fOUT = 25 MHz 10 kHz off Carrier  
fOUT = 25 MHz 100 kHz off Carrier  
RMS Phase Jitter  
tJIT(Φ)  
tR / F  
25MHz carrier, Integration Range: 12kHz-20MHz  
20% to 80%  
ps  
Output Rise/Fall Time  
Device to Device Skew  
Propagation Delay  
t
0.85  
200  
6
ns  
ps  
ns  
freq, LVCMOS INPUT  
2.5  
2.9  
Phase Noise Plots  
The phase noise plots above show the low Additive Jitter of the 5P8390x high-performance buffer. With an integration range of  
12kHz to 20MHz, the reference input has about 58.9fs of RMS phase jitter while the output of 5P8390x has about 70.9fs of RMS  
phase jitter. This results in a low Additive Phase Jitter of only 39fs.  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
8
OCTOBER 5, 2016  
5P8390x DATASHEET  
Test Load and Circuit  
50ohms  
5 inche  
s
CL = 5pF  
Marking Diagrams  
IDT5P839  
04PGGK  
YYWW$  
IDT5P839  
05PGGK  
YYWW$  
IDT5P839  
08PGGK  
YYWW$  
LOT  
LOT  
LOT  
16-pin TSSOP  
20-pin TSSOP  
16-pin TSSOP  
905K  
Y**  
904K  
Y**  
XXX  
YWW$  
908K  
16-pin QFN  
16-pin QFN  
20-pin QFN  
Notes:  
1. “**” is the lot sequence.  
2. “XXX” denotes the last three characters of the Asm lot (20-pin QFN only).  
3. “YYWW”, “YWW”, “YW”, or “Y” is the last digit(s) of the year and week that the part was assembled.  
4. “$” denotes the mark code.  
5. “LOT” denotes lot number.  
6. “G” after the two-letter package code denotes RoHS compliant package.  
7. “I” denotes extended temperature range device.  
8. Bottom marking: country of origin (TSSOP only).  
OCTOBER 5, 2016  
9
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
5P8390x DATASHEET  
Package Outline and Package Dimensions (16-pin QFN, 2.5mm x 2.5mm Body, 0.4mm pitch)  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
10  
OCTOBER 5, 2016  
5P8390x DATASHEET  
Package Outline and Package Dimensions, cont. (16-pin QFN, 2.5mm x 2.5mm Body, 0.4mm pitch)  
OCTOBER 5, 2016  
11  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
5P8390x DATASHEET  
Package Outline and Package Dimensions (20-pin QFN, 3mm x 3mm Body, 0.4mm pitch)  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
12  
OCTOBER 5, 2016  
5P8390x DATASHEET  
Package Outline and Package Dimensions, cont. (20-pin QFN, 3mm x 3mm Body, 0.4mm pitch)  
OCTOBER 5, 2016  
13  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
5P8390x DATASHEET  
Package Outline and Package Dimensions (8-, 14-, 16-, 20-pin TSSOP)  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
14  
OCTOBER 5, 2016  
5P8390x DATASHEET  
Package Outline and Package Dimensions, cont. (8-, 14-, 16-, 20-pin TSSOP)  
OCTOBER 5, 2016  
15  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
5P8390x DATASHEET  
Package Outline and Package Dimensions, cont. (8-, 14-, 16-, 20-pin TSSOP)  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
16  
OCTOBER 5, 2016  
5P8390x DATASHEET  
Ordering Information  
Part / Order Number  
5P83904PGGK  
5P83904PGGK8  
5P83904CMGK  
5P83904CMGK8  
5P83905PGGK  
5P83905PGGK8  
5P83905CMGK  
5P83905CMGK8  
5P83908PGGK  
5P83908PGGK8  
5P83908NDGK  
5P83908NDGK8  
Marking  
Shipping Packaging  
Tubes  
Package  
16-pin TSSOP  
16-pin TSSOP  
16-pin QFN  
Temperature  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
see page 9  
Tape and Reel  
Cut Tape  
Tape and Reel  
Tubes  
16-pin QFN  
16-pin TSSOP  
16-pin TSSOP  
16-pin QFN  
Tape and Reel  
Cut Tape  
Tape and Reel  
Tubes  
16-pin QFN  
20-pin TSSOP  
20-pin TSSOP  
20-pin QFN  
Tape and Reel  
Tubes  
Tape and Reel  
20-pin QFN  
“G” after the two-letter package code denotes Pb-Free configuration, RoHS compliant.  
“K” denotes extended temperature range.  
Revision History  
Rev. Date  
Originator  
H.G.  
Description of Change  
A
B
07/11/16  
10/05/16  
Release to final.  
Y.G.  
1. Update "Propagation Delay" typical values per latest characterization data.  
2. Update "Output Rise/Fall" maximum values per latest characterization data.  
OCTOBER 5, 2016  
17  
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE  
Corporate Headquarters  
6024 Silver Creek Valley Road  
San Jose, CA 95138 USA  
www.IDT.com  
Sales  
Tech Support  
www.idt.com/go/support  
1-800-345-7015 or 408-284-8200  
Fax: 408-284-2775  
www.IDT.com/go/sales  
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in  
this document, including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined  
in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether  
express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This  
document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties.  
IDT’s products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably  
expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.  
Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Product specification subject to change without notice. Other trademarks and service marks used herein, including protected  
names, logos and designs, are the property of IDT or their respective third party owners.  
Copyright ©2016 Integrated Device Technology, Inc.. All rights reserved.  
厂商 型号 描述 页数 下载

IDT

 		5P83904CMGK [ High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer ] 18 页

IDT

 		5P83904CMGK8 [ High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer ] 18 页

IDT

 		5P83904PGGK [ High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer ] 18 页

IDT

 		5P83904PGGK8 [ High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer ] 18 页

IDT

 		5P83905CMGK [ High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer ] 18 页

IDT

 		5P83905CMGK8 [ High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer ] 18 页

IDT

 		5P83905PGGK [ High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer ] 18 页

IDT

 		5P83908NDGK [ High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer ] 18 页

IDT

 		5P83908NDGK8 [ High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer ] 18 页

IDT

 		5P83908PGGK [ High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer ] 18 页

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