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5V2305SNTGK8

型号：

5V2305SNTGK8

品牌：

IDT[ INTEGRATED DEVICE TECHNOLOGY ]

页数：

10 页

PDF大小：

126 K

下载PDF手册
High-Performance 1 to 5 Clock Buffer  
5V2305S  
DATASHEET  
Description  
Features  
The 5V2305S is a low skew, single input to five output, clock  
buffer. The 5V2305S has best in class additive phase Jitter of  
sub 50 fsec.  
• Extremely low RMS Additive Phase Jitter: 50fs  
• Low output skew: 20ps  
• Packaged in 16-pin TSSOP and small 2mm x 2mm 10-pin  
DFN  
The 5V2305S also supports a synchronous glitch-free Output  
Enable function to eliminate any potential intermediate  
incorrect output clock cycles when enabling or disabling  
outputs. It comes in various packages and can operate from a  
1.8V to 3.3V supply.  
• Pb (lead) free package  
• Low power CMOS technology  
• Operating voltages of 1.8V to 3.3V  
• Extended temperature range (-40°C to +105°C)  
Block Diagram  
Control  
Logic  
OE  
Q0  
Q1  
Q2  
ICLK  
Q3  
Q4  
5V2305S AUGUST 1, 2016  
1
©2016 Integrated Device Technology, Inc.  
5V2305S DATASHEET  
Pin Assignments  
GND  
VDD  
Q0  
ICLK  
VDD  
VDD  
Q4  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
GND  
Q0  
1
2
3
4
5
10  
9
ICLK  
Q4  
Q1  
8
Q3  
GND  
Q1  
GND  
Q3  
Q2  
7
OE  
Q2  
VDD  
6
GND  
VDD  
GND  
VDD  
OE  
10-pin DFN (2x2mm)  
16-pin (173 mil) TSSOP  
Pin Descriptions  
Pin Name  
Pin Number  
Pin Type  
Pin Description  
16-pin TSSOP 10-pin DFN  
VDD  
GND  
ICLK  
Q0  
2, 7, 10, 14, 15  
5
1, 6  
10  
2
Power DC power supply. Connect to 1.8V to 3.3V.  
Power Power supply ground.  
1, 4, 8, 12  
16  
3
Input  
Reference input clock.  
Output Clock Output 0. Same frequency as CLKIN.  
Output Clock Output 1. Same frequency as CLKIN.  
Output Clock Output 2. Same frequency as CLKIN.  
Output Clock Output 3. Same frequency as CLKIN.  
Output Clock Output 4. Same frequency as CLKIN.  
Q1  
5
3
Q2  
6
4
Q3  
11  
13  
8
Q4  
9
Active High Output Enable pin. When this pin is high, all outputs are  
enabled and active. When this pin is low, all outputs are driven low.  
OE  
9
7
Input  
External Components  
A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01µF should be  
connected between VDD on pin 2 and GND on pin 4, as close to the device as possible. A 33series terminating resistor may  
be used on each clock output if the trace is longer than 1 inch.  
To achieve the low output skew that the 5V2305S is capable of, careful attention must be paid to board layout. Essentially, all  
five outputs must have identical terminations, identical loads and identical trace geometries. If they do not, the output skew will  
be degraded. For example, using a 30series termination on one output (with 33on the others) will cause at least 15 ps of  
skew.  
HIGH-PERFORMANCE 1 TO 5 CLOCK BUFFER  
2
AUGUST 1, 2016  
5V2305S DATASHEET  
Absolute Maximum Ratings  
Stresses above the ratings listed below can cause permanent damage to the 5V2305S. These ratings, which are standard values  
for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions  
above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating  
conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended  
operating temperature range.  
Item  
Rating  
Supply Voltage, VDD  
Inputs and Outputs  
3.465V  
-0.5 V to VDD+0.5 V  
-40° to +105°C  
-65° to +150°C  
125°C  
Ambient Operating Temperature (extended)  
Storage Temperature  
Junction Temperature  
Soldering Temperature  
260°C  
Recommended Operation Conditions  
Parameter  
Min.  
Typ.  
Max.  
+105  
Units  
C  
Ambient Operating Temperature (extended)  
Power Supply Voltage (measured in respect to GND)  
-40  
+1.71  
+3.465  
V
AUGUST 1, 2016  
3
HIGH-PERFORMANCE 1 TO 5 CLOCK BUFFER  
5V2305S DATASHEET  
DC Electrical Characteristics  
(VDD = 1.8V, 2.5V, 3.3V)  
VDD=1.8V ±5% , Ambient temperature -40° to +105°C, unless stated otherwise  
Parameter  
Operating Voltage  
Symbol  
VDD  
VIH  
Conditions  
Min.  
1.71  
Typ.  
Max.  
1.89  
Units  
V
Input High Voltage, ICLK  
Input Low Voltage, ICLK  
Input High Voltage. OE  
Input Low Voltage, OE  
Output High Voltage  
Note 1  
0.7 x VDD  
1.89  
V
VIL  
Note 1  
0.3 x VDD  
VDD  
V
VIH  
Note 1  
0.7 x VDD  
1.3  
V
VIL  
Note 1  
0.3 x VDD  
V
VOH  
VOL  
IDD  
ZO  
IOH = -10 mA  
IOL = 10mA  
No load, 135 MHz  
V
Output Low Voltage  
0.35  
V
Operating Supply Current  
Nominal Output Impedance  
Input Capacitance  
18  
17  
5
mA  
CIN  
ICLK  
pF  
Notes: 1. Nominal switching threshold is VDD/2  
VDD=2.5 V ±5%, Ambient temperature -40° to +105°C, unless stated otherwise  
Parameter  
Operating Voltage  
Symbol  
VDD  
VIH  
Conditions  
Min.  
2.375  
Typ.  
Max.  
2.625  
Units  
V
Input High Voltage, ICLK  
Input Low Voltage, ICLK  
Input High Voltage. OE  
Input Low Voltage, OE  
Output High Voltage  
Note 1  
0.7 x VDD  
2.625  
V
VIL  
Note 1  
0.3 x VDD  
VDD  
V
VIH  
Note 1  
0.7 x VDD  
1.8  
V
VIL  
Note 1  
0.3 x VDD  
V
VOH  
VOL  
IDD  
ZO  
IOH = -16 mA  
IOL = 16 mA  
No load, 135 MHz  
V
Output Low Voltage  
0.5  
V
Operating Supply Current  
Nominal Output Impedance  
Input Capacitance  
25  
17  
5
mA  
CIN  
ICLK  
pF  
VDD=3.3 V ±5% , Ambient temperature -40° to +105°C, unless stated otherwise  
Parameter  
Operating Voltage  
Symbol  
VDD  
VIH  
Conditions  
Min.  
3.135  
Typ.  
Max.  
3.465  
Units  
V
Input High Voltage, ICLK  
Input Low Voltage, ICLK  
Input High Voltage. OE  
Input Low Voltage, OE  
Output High Voltage  
Note 1  
0.7 x VDD  
3.465  
V
VIL  
Note 1  
0.3 x VDD  
VDD  
V
VIH  
Note 1  
0.7 x VDD  
2.2  
V
VIL  
Note 1  
0.3 x VDD  
V
VOH  
VOL  
IDD  
ZO  
IOH = -25 mA  
IOL = 25 mA  
No load, 135 MHz  
V
Output Low Voltage  
0.7  
V
Operating Supply Current  
Nominal Output Impedance  
Input Capacitance  
30  
17  
5
mA  
CIN  
ICLK  
pF  
HIGH-PERFORMANCE 1 TO 5 CLOCK BUFFER  
4
AUGUST 1, 2016  
5V2305S DATASHEET  
AC Electrical Characteristics  
(VDD = 1.8V, 2.5V, 3.3V)  
VDD = 1.8V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise  
Parameter  
Input Frequency  
Symbol  
Conditions  
Min. Typ. Max. Units  
0
200  
1.0  
1.0  
3
MHz  
ns  
Output Rise Time  
tOR  
tOF  
tEN  
tDIS  
0.36 to 1.44 V, CL=5 pF  
0.6  
0.6  
Output Fall Time  
1.44 to 0.36 V, CL=5 pF  
CL < 5 pF  
ns  
Output Enable Time  
Output Disable Time  
Start-up Time  
cycles  
cycles  
ms  
CL < 5 pF  
3
tSTART-UP Part start-up time for valid outputs after VDD ramp-up  
135MHz, Note 1  
2
Propagation Delay  
1.5  
2.2  
20  
4
ns  
Buffer Additive Phase Jitter, RMS  
Output to Output Skew  
Device to Device Skew  
125MHz, Integration Range: 12kHz-20MHz  
Rising edges at VDD/2, Note 2  
0.05  
65  
500  
ps  
ps  
Rising edges at VDD/2  
ps  
VDD = 2.5 V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise  
Parameter  
Input Frequency  
Symbol  
Conditions  
Min. Typ. Max. Units  
0
200  
1.0  
1.0  
3
MHz  
ns  
Output Rise Time  
tOR  
tOF  
tEN  
tDIS  
0.5 to 2.0 V, CL=5 pF  
0.6  
0.6  
Output Fall Time  
2.0 to 0.5 V, CL=5 pF  
CL < 5 pF  
ns  
Output Enable Time  
Output Disable Time  
Start-up Time  
cycles  
cycles  
ms  
CL < 5 pF  
3
tSTART-UP Part start-up time for valid outputs after VDD ramp-up  
135MHz, Note 1  
2
Propagation Delay  
1.8  
2.5  
20  
4.5  
0.05  
65  
ns  
Buffer Additive Phase Jitter, RMS  
Output to Output Skew  
Device to Device Skew  
125MHz, Integration Range: 12kHz-20MHz  
Rising edges at VDD/2, Note 2  
ps  
ps  
Rising edges at VDD/2  
500  
ps  
VDD = 3.3 V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise  
Parameter  
Input Frequency  
Symbol  
Conditions  
Min. Typ. Max. Units  
0
200  
1.0  
1.0  
3
MHz  
ns  
Output Rise Time  
tOR  
tOF  
tEN  
tDIS  
0.66 to 2.64 V, CL=5 pF  
0.6  
0.6  
Output Fall Time  
2.64 to 0.66 V, CL=5 pF  
CL < 5 pF  
ns  
Output Enable Time  
Output Disable Time  
Start-up Time  
cycles  
cycles  
ms  
CL < 5 pF  
3
tSTART-UP Part start-up time for valid outputs after VDD ramp-up  
135MHz, Note 1  
3
Propagation Delay  
1.5  
2.1  
20  
4
ns  
Buffer Additive Phase Jitter, RMS  
Output to Output Skew  
Device to Device Skew  
125MHz, Integration Range: 12kHz-20MHz  
Rising edges at VDD/2, Note 2  
0.05  
65  
500  
ps  
ps  
Rising edges at VDD/2  
ps  
Notes:  
1. With rail to rail input clock  
2. Between any 2 outputs with equal loading.  
3. Duty cycle on outputs will match incoming clock duty cycle. Consult IDT for tight duty cycle clock generators.  
AUGUST 1, 2016  
5
HIGH-PERFORMANCE 1 TO 5 CLOCK BUFFER  
5V2305S DATASHEET  
Test Load and Circuit  
50ohms  
5 inche  
s
Rs=33ohm  
CL = 5pF  
Marking Diagrams  
IDT5V230  
5SPGGK  
YYWW$  
05SK  
YW**  
LOT  
10-pin DFN  
16-pin TSSOP  
Notes:  
1. “**” is the lot number.  
2. “YYWW” or “YW” are the last digits of the year and week that the part was assembled.  
3 “G” denotes RoHS compliant package.  
4. “$” denotes mark code.  
5. “K” denotes extended temperature range device.  
HIGH-PERFORMANCE 1 TO 5 CLOCK BUFFER  
6
AUGUST 1, 2016  
5V2305S DATASHEET  
Package Outline and Package Dimensions (10-pin DFN, 2x2mm)  
AUGUST 1, 2016  
7
HIGH-PERFORMANCE 1 TO 5 CLOCK BUFFER  
5V2305S DATASHEET  
Package Outline and Package Dimensions (10-pin DFN, 2x2mm), cont.  
HIGH-PERFORMANCE 1 TO 5 CLOCK BUFFER  
8
AUGUST 1, 2016  
5V2305S DATASHEET  
Package Outline and Package Dimensions (16-pin TSSOP, 173 Mil. Body)  
16  
Millimeters  
Inches  
Symbol  
Min  
—
Max  
1.20  
0.15  
1.05  
0.30  
0.20  
5.10  
Min  
—
Max  
.047  
A
A1  
A2  
b
E1  
E
0.05  
0.80  
0.19  
0.09  
4.90  
0.002  
0.032  
0.007  
0.006  
0.041  
0.012  
INDEX  
AREA  
C
0.0035 0.008  
0.193 0.201  
0.252 BASIC  
0.169 0.177  
0.0256 Basic  
D
1 2  
E
6.40 BASIC  
4.30 4.50  
0.65 Basic  
D
E1  
e
L
0.45  
0.75  
.018  
.030  
0  
8  
0  
8  
A
A2  
A1  
c
- C -  
e
SEATING  
PLANE  
b
L
.10 (.004)  
C
Ordering Information  
Part / Order Number  
5V2305SPGGK  
5V2305SPGGK8  
5V2305SNTGK  
Marking  
Shipping Packaging  
Tubes  
Package  
16-pin TSSOP  
16-pin TSSOP  
10-pin DFN  
Temperature  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
-40° to +105°C  
see page 6  
Tape and Reel  
Cut Tape  
Tape and Reel  
10-pin DFN  
5V2305SNTGK8  
“G” after the two-letter package code denotes Pb-Free configuration, RoHS compliant.  
Revision History  
Date  
Originator  
H.G.  
Description of Change  
August 1, 2016  
July 11, 2016  
Updated typical values for propagation delay and output to output skew.  
Release to final.  
H.G.  
AUGUST 1, 2016  
9
HIGH-PERFORMANCE 1 TO 5 CLOCK BUFFER  
Corporate Headquarters  
6024 Silver Creek Valley Road  
San Jose, CA 95138 USA  
www.IDT.com  
Sales  
Tech Support  
www.idt.com/go/support  
1-800-345-7015 or 408-284-8200  
Fax: 408-284-2775  
www.IDT.com/go/sales  
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in  
this document, including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined  
in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether  
express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This  
document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties.  
IDT’s products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably  
expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.  
Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Product specification subject to change without notice. Other trademarks and service marks used herein, including protected  
names, logos and designs, are the property of IDT or their respective third party owners.  
Copyright ©2016 Integrated Device Technology, Inc.. All rights reserved.  
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