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NVTFS4823NWFTWG

型号：

NVTFS4823NWFTWG

品牌：

ONSEMI[ ONSEMI ]

页数：

6 页

PDF大小：

121 K

下载PDF手册
NVTFS4823N  
Power MOSFET  
30 V, 10.5 mW, 30 A, Single N−Channel  
Features  
• Small Footprint (3.3x3.3 mm) for Compact Design  
• Low R  
to Minimize Conduction Losses  
DS(on)  
http://onsemi.com  
• Low Capacitance to Minimize Driver Losses  
• NVTFS4823NWF − Wettable Flanks Product  
• AEC−Q101 Qualified and PPAP Capable  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(on)  
10.5 mW @ 10 V  
17.5 mW @ 4.5 V  
• These Devices are Pb−Free and are RoHS Compliant  
30 V  
30 A  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Parameter  
Drain−to−Source Voltage  
Symbol  
Value  
30  
Unit  
V
N−Channel  
D (5 − 8)  
V
DSS  
Gate−to−Source Voltage  
V
"20  
30  
V
GS  
Continuous Drain Cur-  
T
= 25°C  
I
A
mb  
D
rent R  
(Notes 1,  
Y
J−mb  
T
mb  
= 100°C  
21  
2, 3, 4)  
Steady  
State  
G (4)  
Power Dissipation  
T
mb  
= 25°C  
P
21  
11  
13  
W
A
D
R
(Notes 1, 2, 3)  
Y
J−mb  
T
mb  
= 100°C  
S (1, 2, 3)  
Continuous Drain Cur-  
T = 25°C  
I
A
D
rent R  
& 4)  
(Notes 1, 3,  
q
JA  
MARKING DIAGRAM  
T = 100°C  
A
9.0  
Steady  
State  
1
Power Dissipation  
(Notes 1, 3)  
T = 25°C  
P
3.1  
1.6  
198  
W
1
A
D
S
S
S
G
D
D
D
D
R
q
JA  
XXXX  
AYWWG  
G
WDFN8  
(m8FL)  
CASE 511AB  
T = 100°C  
A
Pulsed Drain Current  
T = 25°C, t = 10 ms  
I
DM  
A
A
p
Operating Junction and Storage Temperature  
T , T  
−55 to  
175  
°C  
J
stg  
XXXX = Specific Device Code  
Source Current (Body Diode)  
I
19  
A
A
Y
WW  
G
= Assembly Location  
= Year  
= Work Week  
S
Single Pulse Drain−to−Source Avalanche  
E
AS  
28.8  
mJ  
Energy (T = 25°C, V = 24 V, V = 10 V,  
J
DD  
GS  
= Pb−Free Package  
I
= 24 A, L = 0.1 mH, R = 25 W)  
L(pk)  
G
(Note: Microdot may be in either location)  
Lead Temperature for Soldering Purposes  
(1/8″ from case for 10 s)  
T
260  
°C  
L
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information in the  
package dimensions section on page 5 of this data sheet.  
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)  
Parameter  
Symbol  
Value  
Unit  
Junction−to−Mounting Board (top) − Steady  
State (Note 2, 3)  
R
7.0  
°C/W  
Y
J−mb  
Junction−to−Ambient − Steady State (Note 3)  
R
47  
q
JA  
1. The entire application environment impacts the thermal resistance values shown,  
they are not constants and are only valid for the particular conditions noted.  
2. Psi (Y) is used as required per JESD51−12 for packages in which  
substantially less than 100% of the heat flows to single case surface.  
2
3. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.  
4. Maximum current for pulses as long as 1 second is higher but is dependent  
on pulse duration and duty cycle.  
© Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
May, 2013 − Rev. 2  
NVTFS4823N/D  
 
NVTFS4823N  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain−to−Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
V
V
= 0 V, I = 250 mA  
30  
V
(BR)DSS  
GS  
D
I
T = 25°C  
J
1.0  
10  
mA  
DSS  
V
= 0 V,  
= 30 V  
GS  
DS  
V
T = 125°C  
J
Gate−to−Source Leakage Current  
ON CHARACTERISTICS (Note 5)  
Gate Threshold Voltage  
I
V
= 0 V, V = "20 V  
"100  
nA  
GSS  
DS  
GS  
V
V
= V , I = 250 mA  
1.5  
2.5  
V
GS(TH)  
GS  
DS  
D
Drain−to−Source On Resistance  
R
V
= 10 V, I = 15 A  
8.1  
13.5  
34  
10.5  
17.5  
mW  
DS(on)  
GS  
GS  
DS  
D
V
V
= 4.5 V, I = 15 A  
D
Forward Transconductance  
CHARGES AND CAPACITANCES  
Input Capacitance  
g
FS  
= 1.5 V, I = 20 A  
S
D
C
750  
175  
100  
6.0  
0.8  
2.4  
2.4  
12  
pF  
iss  
Output Capacitance  
C
oss  
V
= 0 V, f = 1.0 MHz, V = 12 V  
DS  
GS  
Reverse Transfer Capacitance  
Total Gate Charge  
C
rss  
Q
Q
nC  
G(TOT)  
Threshold Gate Charge  
Gate−to−Source Charge  
Gate−to−Drain Charge  
Total Gate Charge  
Q
G(TH)  
V
= 4.5 V, V = 15 V, I = 15 A  
DS D  
GS  
Q
GS  
Q
GD  
V
= 10 V, V = 15 V, I = 15 A  
nC  
ns  
G(TOT)  
GS  
DS  
D
SWITCHING CHARACTERISTICS (Note 6)  
Turn−On Delay Time  
Rise Time  
t
12  
22  
14  
4
d(on)  
t
r
V
= 4.5 V, V = 15 V,  
DS  
GS  
I
D
= 15 A, R = 3.0 W  
G
Turn−Off Delay Time  
Fall Time  
t
d(off)  
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
V
= 0 V,  
T = 25°C  
0.85  
0.72  
12  
1.1  
V
SD  
RR  
GS  
S
J
I
= 15 A  
T = 125°C  
J
Reverse Recovery Time  
Charge Time  
t
ns  
V
GS  
= 0 V,  
t
6.0  
6.0  
5.0  
a
dI /dt = 100 A/ms,  
S
Discharge Time  
t
I
= 15 A  
b
S
Reverse Recovery Charge  
Q
nC  
RR  
5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.  
6. Switching characteristics are independent of operating junction temperatures.  
http://onsemi.com  
2
 
NVTFS4823N  
TYPICAL CHARACTERISTICS  
60  
60  
50  
40  
30  
20  
10  
0
10 V  
5.5 V  
T = 25°C  
V
DS  
≥ 10 V  
J
50  
40  
30  
20  
10  
0
4.1 V  
3.8 V  
V
GS  
= 4.5 V  
3.5 V  
3.2 V  
2.9 V  
T = 125°C  
J
T = 25°C  
J
T = −55°C  
J
0
1
2
3
4
5
1
2
3
4
5
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (V)  
V
GS  
, GATE−TO−SOURCE VOLTAGE (V)  
Figure 1. On−Region Characteristics  
Figure 2. Transfer Characteristics  
0.020  
0.019  
0.018  
0.017  
0.016  
0.015  
0.014  
0.013  
0.012  
0.011  
0.010  
0.009  
0.008  
0.007  
0.006  
0.025  
0.020  
0.015  
0.010  
0.005  
0
T = 25°C  
J
I
= 15 A  
D
T = 25°C  
J
V
= 4.5 V  
GS  
V
= 10 V  
GS  
3
4
5
6
7
8
9
10  
5
10 15 20 25 30 35 40 45 50 55 60  
I , DRAIN CURRENT (A)  
V
, GATE−TO−SOURCE VOLTAGE (V)  
GS  
D
Figure 3. On−Resistance vs. Gate−to−Source  
Figure 4. On−Resistance vs. Drain Current and  
Voltage  
Gate Voltage  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
10000  
1000  
100  
V
GS  
= 0 V  
I
V
= 15 A  
D
= 10 V  
GS  
T = 150°C  
J
T = 125°C  
J
10  
50  
25  
0
25  
50  
75  
100 125 150 175  
5
10  
V , DRAIN−TO−SOURCE VOLTAGE (V)  
DS  
15  
20  
25  
30  
T , JUNCTION TEMPERATURE (°C)  
J
Figure 5. On−Resistance Variation with  
Figure 6. Drain−to−Source Leakage Current  
Temperature  
vs. Voltage  
http://onsemi.com  
3
NVTFS4823N  
TYPICAL CHARACTERISTICS  
10  
1200  
1000  
800  
600  
400  
200  
0
Q
T
V
= 0 V  
GS  
T = 25°C  
J
8
6
4
2
0
C
iss  
Q
Q
gd  
gs  
C
oss  
V
DS  
= 15 V  
I
D
= 15 A  
T = 25°C  
J
C
rss  
0
5
10  
15  
20  
25  
30  
0
2
4
6
8
10  
12  
DRAIN−TO−SOURCE VOLTAGE (V)  
Q , TOTAL GATE CHARGE (nC)  
g
Figure 7. Capacitance Variation  
Figure 8. Gate−to−Source Voltage vs. Total  
Charge  
1000  
100  
10  
40  
30  
20  
10  
0
V = 0 V  
GS  
T = 25°C  
J
V
= 15 V  
= 10 A  
= 10 V  
DD  
I
D
V
GS  
t
r
t
d(off)  
t
d(on)  
t
f
1.0  
1
10  
R , GATE RESISTANCE (W)  
100  
0.5  
0.6  
0.7  
0.8  
0.9  
1.0  
V
, SOURCE−TO−DRAIN VOLTAGE (V)  
FigureS1D0. Diode Forward Voltage vs. Current  
G
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
30  
25  
20  
15  
10  
5
1000  
100  
10  
I = 24 A  
D
V
= 10 V  
GS  
Single Pulse  
= 25°C  
T
C
10 ms  
100 ms  
10 ms  
1 ms  
1
R
Limit  
DS(on)  
dc  
Thermal Limit  
Package Limit  
0
0.1  
0.1  
1
10  
100  
25  
50  
75  
100  
125  
150  
200  
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (V)  
T , STARTING JUNCTION TEMPERATURE (°C)  
J
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
Figure 12. Maximum Avalanche Energy vs.  
Starting Junction Temperature  
http://onsemi.com  
4
NVTFS4823N  
TYPICAL CHARACTERISTICS  
100  
10  
Duty Cycle = 0.5  
0.2  
0.1  
0.05  
0.02  
0.01  
0.1  
Single Pulse  
0.01  
0.000001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
PULSE TIME (sec)  
Figure 13. Thermal Response  
DEVICE ORDERING INFORMATION  
Device  
†
Marking  
Package  
Shipping  
NVTFS4823NTAG  
4823  
WDFN8  
1500 / Tape & Reel  
1500 / Tape & Reel  
5000 / Tape & Reel  
5000 / Tape & Reel  
(Pb−Free)  
NVTFS4823NWFTAG  
NVTFS4823NTWG  
23WF  
4823  
WDFN8  
(Pb−Free)  
WDFN8  
(Pb−Free)  
NVTFS4823NWFTWG  
23WF  
WDFN8  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
http://onsemi.com  
5
NVTFS4823N  
PACKAGE DIMENSIONS  
WDFN8 3.3x3.3, 0.65P  
CASE 511AB  
ISSUE D  
2X  
NOTES:  
0.20  
C
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH  
PROTRUSIONS OR GATE BURRS.  
D
A
B
E
2X  
D1  
MILLIMETERS  
INCHES  
NOM  
0.030  
−−−  
0.012  
0.20  
C
8
1
7
6
5
4
DIM  
A
A1  
b
MIN  
0.70  
0.00  
0.23  
0.15  
NOM  
0.75  
−−−  
0.30  
0.20  
MAX  
MIN  
MAX  
0.031  
0.002  
0.016  
0.010  
0.80  
0.05  
0.40  
0.25  
0.028  
0.000  
0.009  
0.006  
4X  
q
E1  
c
0.008  
D
3.30 BSC  
3.05  
2.11  
3.30 BSC  
3.05  
1.60  
0.30  
0.65 BSC  
0.41  
0.80  
0.43  
0.13  
1.50  
−−−  
0.130 BSC  
0.120  
0.083  
0.130 BSC  
0.120  
0.063  
0.012  
0.026 BSC  
0.016  
0.032  
0.017  
D1  
D2  
E
E1  
E2  
E3  
e
G
K
L
L1  
M
2.95  
1.98  
3.15  
2.24  
0.116  
0.078  
0.124  
0.088  
c
2
3
A1  
TOP VIEW  
0.116  
0.058  
0.009  
0.124  
0.068  
0.016  
2.95  
1.47  
0.23  
3.15  
1.73  
0.40  
0.10  
0.10  
C
C
A
C
6X  
e
0.30  
0.65  
0.30  
0.06  
1.40  
0
0.51  
0.95  
0.56  
0.20  
1.60  
0.012  
0.026  
0.012  
0.002  
0.055  
0
0.020  
0.037  
0.022  
0.008  
0.063  
SEATING  
PLANE  
0.005  
0.059  
−−−  
DETAIL A  
SIDE VIEW  
DETAIL A  
q
12  
12  
_
_
_
_
8X b  
0.10  
0.05  
C
C
A
B
SOLDERING FOOTPRINT*  
8X  
e/2  
0.42  
0.65  
4X  
L
4X  
0.66  
PITCH  
1
8
4
5
PACKAGE  
OUTLINE  
K
E2  
M
E3  
3.60  
L1  
D2  
BOTTOM VIEW  
G
2.30  
0.57  
0.47  
0.75  
2.37  
3.46  
DIMENSION: MILLIMETERS  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,  
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC  
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without  
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications  
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC  
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for  
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where  
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and  
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,  
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture  
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81−3−5817−1050  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NVTFS4823N/D  
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