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IX9915NTR

型号：

IX9915NTR

品牌：

IXYS[ IXYS CORPORATION ]

页数：

10 页

PDF大小：

219 K

下载PDF手册
IX9915  
Low Voltage Error Amplifier with a  
350V Darlington Transistor  
INTEGRATED  
C
IRCUITS  
D
IVISION  
Features  
Description  
• Precision reference, error amplifier, and a high  
voltage Darlington transistor in a single package  
• 1.299V±1% reference @25ºC  
(±1.5% @-40ºC to 85ºC)  
• Error amplifier supply voltage range: 1.3V to 12.5V  
over temperature  
The IX9915 integrates an error amplifier with a  
precision reference and a 350V Darlington transistor  
in a single package. The error amplifier can be  
operated from 1.3V to 12.5V over the operational  
temperature range. The breakdown voltage of the  
Darlington transistor is 350V.  
• Breakdown voltage of Darlington transistor: 350V  
The integrated combination of a 4-terminal 431 type  
shunt regulator with a high voltage Darlington  
transistor is ideal for use in LED lamp bleeder control  
circuits.  
Applications  
• LED lamps  
• Low voltage power supply feedback  
• AC-to-DC off-line power supplies  
• DC-to-DC converters  
Ordering Information  
Part  
Description  
IX9915N  
8-pin SOIC, Tube (100/Tube)  
IX9915NTR  
8-pin SOIC, Tape & Reel (2000/Reel)  
IX9915 Block Diagram  
VCC  
C
B OC  
FB  
+
_
VREF  
E
+
_
VSS  
DS-IX9915-R01  
www.ixysic.com  
1
IX9915  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.1 Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.2 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
1.5 Test Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
1.6 Performance Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
2.1 Regulation Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
2.2 Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
2.3 Design Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
3. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.3 Soldering Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.5 Mechanical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
2
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R01  
IX9915  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1. Specifications  
1.1 Package Pinout  
1.2 Pin Description  
Pin#  
Name  
Description  
1
2
3
4
5
6
7
FB  
OC  
B
Input Voltage  
1
2
3
4
8
7
6
5
VSS  
VCC  
E
FB  
OC  
B
Output Current  
Darlington Base  
Not Connected  
Darlington Collector  
Darlington Emitter  
Supply Input  
N/C  
C
E
VCC  
C
N/C  
VSS  
8
Supply Return  
1.3 Absolute Maximum Ratings  
Parameter  
Symbol  
VCEO  
VECO  
ICE  
Ratings  
350  
2
Unit  
Collector-Emitter Voltage  
Emitter-Collector Voltage  
Collector Current  
V
V
200  
15  
mA  
V
Supply Voltage (Referenced to VSS  
)
VCC  
IOC  
Output DC Current  
20  
mA  
mW  
mW  
PA  
30  
Power Dissipation (Shunt Regulator)  
Power Dissipation, Darlington Transistor  
1
PD  
250  
250  
2
1
PT  
mW  
kV  
Total Power Dissipation  
ESD Rating (Human Body Model)  
Operating Temperature  
-
TOPR  
TSTG  
-40 to +85  
°C  
Storage Temperature  
-55 to +130  
°C  
1 Derate linearly 2.83 mW/°C.  
Unless otherwise specified, Absolute Maximum electrical ratings are at 25°C.  
Absolute Maximum Ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to  
the device. Functional operation of the device at these or any other conditions beyond those indicated in the  
operational sections of this data sheet is not implied.  
Typical values are characteristic of the device at 25°C, and are the result of engineering evaluations. They are  
provided for information purposes only, and are not part of the manufacturing testing requirements.  
R01  
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3
IX9915  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1.4 Electrical Characteristics  
Parameter  
Symbol  
Conditions  
Min Typ Max Unit  
Input Characteristics @25°C (Unless Otherwise Specified)  
VCC  
TA=-40°C to +85°C  
VCC=1.6V, IOC=10mA (Fig. 1)  
TA=25°C  
Supply voltage  
Reference voltage 1  
1.3  
-
12.5  
V
V
VREF  
1.286 1.299 1.312  
1.280 1.299 1.318  
TA=-40°C to +85°C  
Deviation of VREF over temperature 2  
Ratio of VREF variation to VCC change  
FB input bias current  
VREF(DEV)  
VREF/VCC  
IIB  
VCC=1.6V, IOC=10mA, TA=-40°C to +85°C (Fig. 1)  
-
-
8
21  
mV  
1.3V < VCC < 12.5V, IOC=10mA (Fig. 1)  
VCC=1.6V, IOC=10mA (Fig. 1)  
VCC=1.6V, IOC=10mA, (Fig. 1)  
TA=-40°C to +85°C  
-0.37  
0.34  
-2.7 mV/V  
0.1  
0.5  
A  
Deviation of IIB over temperature 2  
IIB(DEV)  
A  
-
-
0.4  
75  
0.6  
100  
0.1  
-
IQ  
ICC(off)  
VCC=1.6V, VFB = VREF, IOC=0mA (Fig. 3)  
Quiescent bias current  
A  
A  
S
VOC=VCC=12.5V, VFB=0V (Fig. 2)  
Error amplifier Off-State current  
Shunt Transconductance 3  
0.001  
1
gm (IOC/VFB  
)
VCC=1.6V, IOC = 0.2mA to 10mA, f=1kHz  
-
Darlington Characteristics @25°C (Unless Otherwise Specified)  
BVCEO  
ICE  
VBE(ON)  
VCE(SAT)  
hFE  
ICE=100A  
Collector-emitter voltage breakdown  
350  
-
-
-
-
-
-
V
nA  
V
VCE=200V, RB=1M(Fig. 4)  
ICE=40mA, VCE=2V  
IC=100mA, IB=150A  
ICE=40mA, VCE=2V  
Collector current  
-
100  
1.8  
Base-emitter On voltage  
Collector-emitter saturation voltage  
Current gain  
-
-
1.2  
V
2500  
40000  
-
1 Reference voltage measured at Pin FB under the specified conditions.  
2 Deviation parameters V  
REF(DEV)  
and I  
IB(DEV)  
are defined as the difference between the minimum and maximum values obtained over the rated temperature range.  
gm  
---------------  
3 With two external resistors, the total shunt transconductance of the circuit is defined as: gm  
=
R1  
-----  
1 +  
R2  
1.5 Test Diagrams  
Figure 1: VREF, IIB, VREF/VCC, gM Test Circuit  
IOC  
OC  
IQ  
VCC  
C
B
VCC  
R1  
IIB  
+
+
_
FB  
E
R2  
+
VREF  
_
VSS  
4
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R01  
IX9915  
INTEGRATED  
C
IRCUITS  
D
IVISION  
Figure 2: ICC(OFF) Test Circuit  
C
B
OC  
VCC  
VCC  
+
+
FB  
_
E
+
_
VSS  
Figure 3: IQ Test Circuit  
IOC  
OC  
IQ  
VCC  
C
B
VCC  
R1  
IIB  
+
+
_
FB  
E
R2  
+
VFB  
_
VSS  
Figure 4: ICE Test Circuit  
RB  
C
B
OC  
VCC  
+
VCE  
+
FB  
_
E
+
_
VSS  
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IX9915  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1.6 Performance Data  
FB Input Bias Current vs.Temperature  
(IOC=10mA)  
VREF vs.Temperature  
700  
600  
500  
400  
300  
200  
100  
1.320  
1.310  
1.300  
1.290  
1.280  
1.270  
-50  
-25  
0
25  
50  
75  
100 125  
-50 -25  
0
25  
50  
75 100 125 150  
Temperature (ºC)  
Temperature (ºC)  
Off-State Current vs.Temperature  
(VOC=13.2V, VFB=0V)  
Saturation Voltage vs.Temperature  
(IOC=10mA)  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
-50  
-25  
0
25  
50  
75  
100 125  
-50 -25  
0
25  
50  
75 100 125 150  
Temperature (ºC)  
Temperature (ºC)  
6
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R01  
IX9915  
INTEGRATED  
C
IRCUITS  
D
IVISION  
2. Functional Description  
IX9915 is the functional equivalent of a 4-terminal 431  
type precision shunt regulator and a high voltage  
Darlington transistor in the same package.  
The typical application for IX9915 is shown in  
Figure 5.  
Figure 5 IX9915 Application Diagram  
Dimmer Switch  
I3  
VREG  
Rectifier  
R3  
IH  
R0 IOC  
IQ  
I1  
AC Supply  
-
+VLINE  
R1  
C
B
OC  
VCC  
VREF  
+
_
FB  
E
+
_
R2  
RE  
VSS  
This is a simplified application circuit that shows how  
the IX9915 can be used in an LED lamp control circuit.  
The high voltage Darlington transistor will bleed the  
current when VLINE is lower than the predetermined  
voltage. The 4-terminal 431 type shunt regulator is  
used to monitor VLINE voltage and control the  
As VREG increases, the error amplifier's input voltage  
FB will also increase. Ramping of VFB beyond the  
internal reference voltage causes the error amplifier to  
sink more IOC, which in turn decreases VREG  
Likewise, a reduction of VREG results in a lessoning of  
OC causing VREG to increase.  
V
.
I
Darlington transistor bleeding the current (ON) or not  
(OFF). When VLINE reaches the predetermined  
voltage, the shunt regulator starts to regulate to drive  
2.1 Regulation Voltage  
V
OC going low, and turns off the Darlington transistor  
When connected as shown in the application circuit  
above and properly configured, the IX9915 will  
regulate VREG such that VFB is equal to VREF(1.299V).  
To achieve this, the values of the voltage divider  
resistors, R1 and R2, must be set in the following  
manner:  
to make sure this bleeder circuitry only burns a little  
power at the higher VLINE voltage. Maximum bleeding  
current IH can be controlled by properly choosing RE  
and VREG  
.
Regulation of VREG is made possible by applying a  
scaled sample of its voltage to pin FB, the error  
amplifier's non-inverting input. The error amplifier  
compares this scaled voltage against an internal high  
accuracy reference voltage and generates an output  
current which in turn regulate VREG through the  
resistor R3.  
R1  
-----  
R2  
VREG  
-------------  
VREF  
=
– 1  
Because VREG regulation occurs when VFB=VREF any  
change in bias current through R2 at the desired  
regulated voltage level will cause a regulation error. As  
shown in the Electrical Characteristics table the error  
amplifier input at pin FB has an input bias current (IIB)  
specification that reduces the current into R2. (IIB is  
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IX9915  
INTEGRATED  
C
IRCUITS  
D
IVISION  
always into pin FB). This error causes the regulated  
output voltage to increase which increases the current  
through R1 by an amount equal to IIB, thereby  
restoring the current through R2 to its original value.  
Reducing the VREG error created by the input bias  
current to less than 1% is accomplished by setting the  
value of R1 using the following formula:  
If taking R0=40k, the gain of the comparator is  
around 82dB. That is to say, once the error amplifier  
starts to regulate, the Darlington transistor will be shut  
off by this comparator. So, IOC can be ignored for  
affecting the predetermined voltage:  
VLINE-TH VREG + I1 + IQ  R3  
(2)  
VREG  
Almost full power supply voltage will cross over R3,  
taking R3=100kto minimize its power consumption:  
-------------  
R1   
50A  
Vrms2  
Where:  
------------------  
P =  
100k  
50A = 100 IIBMAX  
Substituting:  
2.2 Compensation  
• IQ=75A,  
The dominate pole of the error amplifier is around  
13kHz. In a typical system with a low-bandwidth  
requirement, it doesn't need any external  
compensation. Frequency response of the system can  
be optimized for the specific application by placing a  
compensation network between the OC and FB pins  
of the IX9915. For designs with more critical  
bandwidth requirements, measurement of the loop  
response must be made and compensation adjusted  
as necessary.  
• I1=VREF / R2,  
• VLINE-TH=25V  
into formula (2):  
R2 9.6k  
VREG  
– 1  
-------------  
R1 = R2   
VREF  
R1 20k  
2.3 Design Example  
A design example for the bleeder circuitry in LED lamp  
exhibits the detailed steps. In this example, it will target  
the predetermined voltage VLINE-TH=25V and  
maximum bleeding current IH-MAX=25mA.  
In order to flow the maximum bleeding current IH-MAX  
through the Darlington transistor:  
VREG = IH – MAX RE + VBE  
(1)  
If taking RE=100:  
VREG = IH – MAX RE + VBE  
= 25mA 100+ 1.5V  
= 4V  
In fact, the components in the dashed rectangle  
function as a comparator, its gain:  
R0 R2 gm  
-----------------------------  
A =  
R1 + R2  
R2  
VREF  
1.299V  
4V  
------------------  
R1 + R2  
-------------  
----------------  
= 0.325  
=
=
VREG  
gm = 1S (typical)  
8
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R01  
IX9915  
INTEGRATED  
C
IRCUITS  
D
IVISION  
3. Manufacturing Information  
3.1 Moisture Sensitivity  
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated  
Circuits Division classifies its plastic encapsulated devices for moisture sensitivity according to the latest  
version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation.  
We test all of our products to the maximum conditions set forth in the standard, and guarantee proper  
operation of our devices when handled according to the limitations and information in that standard as well as to any  
limitations set forth in the information or standards referenced below.  
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced  
product performance, reduction of operable life, and/or reduction of overall reliability.  
This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled  
according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.  
Device  
Moisture Sensitivity Level (MSL) Classification  
IX9915N  
MSL 1  
3.2 ESD Sensitivity  
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.  
3.3 Soldering Profile  
Provided in the table below is the Classification Temperature (T ) of this product and the maximum dwell time the  
C
body temperature of this device may be (T - 5)ºC or greater. The classification temperature sets the Maximum Body  
C
Temperature allowed for this device during lead-free reflow processes. For through-hole devices, and any other  
processes, the guidelines of J-STD-020 must be observed.  
Classification Temperature (TC)  
Dwell Time (tp)  
Device  
Max Reflow Cycles  
IX9915N  
260°C  
30 seconds  
3
3.4 Board Wash  
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. Board washing to reduce or  
remove flux residue following the solder reflow process is acceptable provided proper precautions are taken to  
prevent damage to the device. These precautions include but are not limited to: using a low pressure wash and  
providing a follow up bake cycle sufficient to remove any moisture trapped within the device due to the washing  
process. Due to the variability of the wash parameters used to clean the board, determination of the bake temperature  
and duration necessary to remove the moisture trapped within the package is the responsibility of the user  
(assembler). Cleaning or drying methods that employ ultrasonic energy may damage the device and should not be  
used. Additionally, the device must not be exposed to flux or solvents that are Chlorine- or Fluorine-based.  
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IX9915  
INTEGRATED  
C
IRCUITS  
D
IVISION  
3.5 Mechanical Dimensions  
3.5.1 IX9915N 8-Pin SOIC Package  
0.31 / 0.51  
(0.012 / 0.020)  
8x  
PCB Land Pattern  
TOP VIEW  
1.55  
(0.061)  
5
5.80 / 6.20  
(0.228 / 0.244)  
3.75  
(0.148)  
3.80 / 4.00  
(0.150 / 0.157)  
0.10 / 0.25  
(0.004 / 0.010)  
A
0.25  
(0.010)  
PIN #1  
1.27  
0.05  
6x  
0.60  
(0.024)  
GAUGE PLANE  
SEATING PLANE  
1.25 MIN  
(0.049 MIN)  
A
0.40 / 1.27  
(0.016 / 0.050)  
4
8°- 0°  
1.75 MAX  
(0.069 MAX)  
4.80 / 5.00  
(0.189 / 0.197)  
Dimensions  
MIN / MAX  
0.10  
(0.004)  
0.10 / 0.25  
(0.004 / 0.010)  
Notes:  
1. Controlling dimension: millimeters.  
2. All dimensions are in mm (inches).  
3. This package conforms to JEDEC Standard MS-012, variation AA, Rev. F.  
4. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per end.  
5. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side.  
6. Lead thickness includes plating.  
3.5.2 IX9915NTR Tape & Reel  
330.2 DIA.  
(13.00 DIA.)  
Top Cover  
W=12.00  
(0.472)  
Tape Thickness  
0.102 MAX.  
(0.004 MAX.)  
B0=5.30  
(0.209)  
A0=6.50  
(0.256)  
P1=8.00  
(0.315)  
K0= 2.10  
(0.083)  
Dimensions  
mm  
(inches)  
User Direction of Feed  
Embossed Carrier  
Embossment  
NOTE: Tape dimensions not shown comply with JEDEC Standard EIA-481-2  
For additional information please visit www.ixysic.com  
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and  
reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses or indemnity are expressed  
or implied. Except as set forth in IXYS Integrated Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability  
whatsoever, and disclaims any express or implied warranty relating to its products, including, but not limited to, the implied warranty of merchantability, fitness for a  
particular purpose, or infringement of any intellectual property right.  
The products described in this document are not designed, intended, authorized, or warranted for use as components in systems intended for surgical implant into  
the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical  
harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes  
to its products at any time without notice.  
Specifications: DS-IX9915-R01  
© Copyright 2018, IXYS Integrated Circuits Division  
All rights reserved. Printed in USA.  
3/23/2018  
10  
www.ixysic.com  
R01  
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