找货询价

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

QQ咨询

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

技术支持

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

售后咨询

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

QT1080-ISG

型号:

QT1080-ISG

描述:

8键的QTouch传感器IC[ 8 KEY QTOUCH SENSOR IC ]

品牌:

QUANTUM[ QUANTUM RESEARCH GROUP ]

页数:

16 页

PDF大小:

205 K

lQ  
QT1080  
8 KEY QTOUCH™ SENSOR IC  
"
"
"
"
"
"
"
"
"
"
"
"
Eight completely independent QT touch sensing fields  
Designed for low-power portable applications  
100% autocal for life - no adjustments required  
Direct outputs - either encoded or ‘per key’  
Fully debounced results  
24 23 22  
20 19 18 17  
21  
SNS5  
SNS4K  
SNS4  
SNS3K  
SNS3  
SNS2K  
SNS2  
SN1K  
25  
26  
27  
28  
29  
30  
31  
16  
15  
14  
13  
12  
11  
10  
9
OUT_0  
OUT_1  
OUT_2  
OUT_3  
OUT_4  
OUT_5  
OUT_6  
2.8V to 5.0V single supply operation  
QT1080  
32-QFN  
45µA current typ @ 3V in 360ms LP mode  
AKS™ Adjacent Key Suppression  
OUT_7 32  
Spread spectrum bursts for superior noise rejection  
Sync pin for excellent LF noise rejection  
10ms ‘Fast mode’ for use in slider applications  
RoHS compliant packages: 32-QFN and 48-SSOP  
1
2
3
4
5
6
7
8
APPLICATIONS  
! MP3 players  
! Mobile phones  
! PC peripherals  
! Television controls  
! Pointing devices  
! Remote controls  
QT1080 charge-transfer (’QT’) QTouch IC is a self-contained digital controller capable of detecting near-proximity or touch on  
up to eight electrodes. It allows electrodes to project independent sense fields through any dielectric such as glass or  
plastic. This capability coupled with its continuous self-calibration feature can lead to entirely new product concepts, adding  
high value to product designs. The devices are designed specifically for human interfaces, like control panels, appliances,  
gaming devices, lighting controls, or anywhere a mechanical switch or button may be found; they may also be used for some  
material sensing and control applications.  
Each of the channels operates independently of the others, and each can be tuned for a unique sensitivity level by simply  
changing a corresponding external Cs capacitor.  
AKS™ Adjacent Key Suppression (patent pending) suppresses touch from weaker responding keys and only allows a  
dominant key to detect; for example to solve the problem of large fingers on tightly spaced keys.  
Spread-spectrum burst technology provides superior noise rejection. These devices also have a SYNC/LP pin which allows for  
synchronization with additional similar parts and/or to an external source to suppress interference, or, a Low Power (LP) mode  
which conserves power.  
By using the charge-transfer principle, this device delivers a level of performance clearly superior to older technologies yet is  
highly cost-effective.  
This part is available in both 32-QFN and 48-SSOP RoHS compliant packages.  
AVAILABLE OPTIONS  
TA  
32-QFN  
48-SSOP  
-40ºC to +85ºC  
QT1080-ISG  
QT1080-IS48G  
LQ  
Copyright © 2004-2006 QRG Ltd  
QT1080 R11.06/0806  
Contents  
3.2 Spread-spectrum Circuit  
1 Overview  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
3
3
4
7
7
7
7
7
7
7
8
8
8
8
8
8
8
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
8
9
9
9
1.1 Parameters  
3.3 Cs Sample Capacitors - Sensitivity  
3.4 Power Supply  
. . . . . . . . . . . . . . . . . . . . . . . .  
1.2 Wiring  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
3.5 PCB Layout and Construction  
2 Device Operation  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . .  
2.1 Start-up Time  
2.2 Option Resistors  
2.3 OUT Pins - Direct Mode  
4 Specifications  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
4.1 Absolute Maximum Specifications  
4.2 Recommended Operating Conditions  
4.3 AC Specifications  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . 10  
. . . . . . . . . . . . . . . . . . . . . 10  
2.4 OUT Pins - Binary Coded Mode  
2.5 DETECT Pin  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
4.4 DC Specifications  
4.5 Signal Processing  
2.6 SYNC/LP Pin  
2.7 AKS Function Pins  
4.6 Idd Curves (Average)  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
2.8 MOD_0, MOD_1 Inputs  
2.9 Fast Detect Mode  
4.7 LP Mode Typical Response Times  
4.8 Mechanical - 32-QFN Package  
4.9 Mechanical - 48-SSOP Package  
4.10 Part Marking  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . 12  
. . . . . . . . . . . . . . . . . . . . . . . . . 13  
. . . . . . . . . . . . . . . . . . . . . . . . 13  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
2.10 Simplified Mode  
2.11 Unused Keys  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
3 Design Notes  
3.1 Oscillator Frequency  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
lQ  
2
QT1080 R11.06/0806  
In normal operation, both the start and end of a touch must  
be confirmed for six measurement bursts. In a special ‘Fast  
Detect‘ mode (available via jumper resistors), confirmation of  
the start of a touch requires only two sequential detections,  
but confirmation of the end of a touch is still six bursts.  
1 Overview  
1.1 Parameters  
The QT1080 is an easy to use, eight-touch-key sensor IC  
based on Quantum’s patented charge-transfer principles for  
robust operation and ease of design. This device has many  
advanced features which provide for reliable, trouble-free  
operation over the life of the product.  
Fast detect is only available when AKS is disabled.  
Spread-spectrum operation: The bursts operate over a  
spread of frequencies, so that external fields will have  
minimal effect on key operation and emissions are very  
weak. Spread-spectrum operation works with the DI  
mechanism to dramatically reduce the probability of false  
detection due to noise.  
Burst operation: The device operates in ‘burst mode’. Each  
key is acquired using a burst of charge-transfer sensing  
pulses whose count varies depending on the value of the  
reference capacitor Cs and the load capacitance Cx. In LP  
mode, the device sleeps in an ultra-low current state  
between bursts to conserve power. The keys’ signals are  
acquired using two successive bursts of pulses:  
Sync Mode: The QT1080 features a Sync mode to allow the  
device to slave to an external signal source, such as a mains  
signal (50/60Hz), to limit interference effects. This is  
performed using the SYNC/LP pin. Sync mode operates by  
triggering two sequential acquire bursts, in sequence A-B  
from the Sync signal. Thus, each Sync pulse causes all eight  
keys to be acquired.  
Burst A: Keys 0, 1, 4, 5  
Burst B: Keys 2, 3, 6, 7  
Bursts always operate in A-B sequence.  
Self-calibration: On power-up, all eight keys are  
self-calibrated within 350 milliseconds (typical) to provide  
reliable operation under almost any conditions.  
Low Power (LP) Mode: The device features an LP mode for  
microamp levels of current drain with a slower response  
time, to allow use in battery operated devices. On touch  
detection, the device automatically reverts to its normal  
mode and asserts the DETECT pin active to wake up a host  
controller. The device remains in normal, full acquire speed  
mode until another pulse is seen on its SYNC/LP pin, upon  
which it goes back to LP mode.  
Autorecalibration: The device can time out and recalibrate  
each key independently after a fixed interval of continuous  
touch detection, so that the keys can never become ‘stuck  
on’ due to foreign objects or other sudden influences. After  
recalibration the key will continue to function normally. The  
delay is selectable to be either 10s, 60s, or infinite  
(disabled).  
AKS™ Adjacent Key Suppression is a patent-pending  
feature that can be enabled via jumper resistors. AKS works  
to prevent multiple keys from responding to a single touch, a  
common complaint about capacitive touch panels. This can  
happen with closely spaced keys, or with control surfaces  
that have water films on them.  
The device also autorecalibrates a key when its signal  
reflects a sufficient decrease in capacit ance. In this case the  
device recalibrates after ~2 seconds so as to recover normal  
operation quickly.  
AKS operates by comparing signal strengths from keys  
within a group of keys to suppress touch detections from  
those that have a weaker signal change than the dominant  
one.  
Drift compensation operates to correct the reference level  
of each key slowly but automatically over time, to suppress  
false detections caused by changes in temperature,  
humidity, dirt and other environmental effects.  
The QT1080 has two different AKS groupings of keys,  
selectable via option resistors. These groupings are:  
The drift compensation is asymmetric; in the increasing  
capacitive load direction the device drifts more slowly than in  
the decreasing direction. In the increasing direction, the rate  
of compensation is one count of signal per 2 seconds; in the  
opposing direction, it is one count every 500ms.  
# AKS operates in two groups of four keys.  
# AKS operates over all eight keys.  
These two modes allow the designer to provide AKS while  
also providing for shift or function operations.  
Detection Integrator (DI) confirmation reduces the effects  
of noise on the QT1080. The ‘detect integrator’ mechanism  
requires consecutive detections over a number of  
measurement bursts for a touch to be confirmed and  
indicated on the outputs. In a like manner, the end of a touch  
(loss of signal) has to be confirmed over a number of  
measurement bursts. This process acts as a type of  
‘debounce’ against noise.  
If AKS is disabled, all keys can operate simultaneously.  
Outputs: There are two output modes: one per key, and  
binary coded.  
One per key output: In this mode there is one output pin per  
key. This mode has two output drive options, push-pull and  
open-drain. The outputs can also be made either active-high  
or active-low. These options are set via external  
configuration resistors.  
A per-key counter is incremented each time the key has  
exceeded its threshold and stayed there for a number of  
measurement bursts. When this counter reaches a preset  
limit the key is finally declared to be touched.  
Binary coded output: In this mode, three output lines encode  
for one possible key in detect. If more than one key is  
detecting, only the first one touched will be indicated.  
For example, if the limit value is six, then the device has to  
exceed its threshold and stay there for six measurement  
bursts in succession without going below the threshold level,  
before the key is declared to be touched. If on any  
measurement burst the signal is not seen to exceed the  
threshold level, the counter is cleared and the process has to  
start from the beginning.  
Simplified Mode: To reduce the need for option resistors,  
the simplified operating mode places the part into fixed  
settings with only the AKS feature being selectable. LP  
mode is also possible in this configuration. Simplified mode  
is suitable for most applications.  
lQ  
3
QT1080 R11.06/0806  
1.2 Wiring  
Table 1.1 Pinlist  
Function  
32-QFN 48-SSOP  
Name  
Type  
Notes  
If Unused  
Pin  
Pin  
1
-
2
3
33  
34  
35  
36  
SS  
n/c  
/RST  
Vdd  
OD  
-
I
Spread spectrum  
Spread spectrum drive  
Leave open  
100K resistor to Vss  
-
-
Vdd  
-
Reset input  
Power  
Active low reset  
+2.8 ~ +5.0V  
Pwr  
Resistor to Vdd and optional  
spread spectrum RC network  
4
5
37  
OSC  
n/c  
I
Oscillator  
-
-
38, 39, 40,  
41, 42  
-
Leave open  
-
Sense pin and  
option select  
Sense pin  
Sense pin and  
option select  
Sense pin  
Sense pin and  
option select  
Sense pin  
Sense pin and  
option select  
Sense pin  
Sense pin and  
option select  
Sense pin  
Sense pin and  
option select  
Sense pin  
Sense pin and  
option select  
Sense pin and  
mode select  
To Cs0 and/or  
option resistor  
To Cs0 + Key  
To Cs1 and/or  
option resistor*  
To Cs1 + Key  
To Cs2 and/or  
option resistor*  
To Cs2 + Key  
To Cs3 and/or  
option resistor*  
To Cs3 + Key  
To Cs4 and/or  
option resistor*  
To Cs4 + Key  
To Cs5 and/or  
option resistor*  
To Cs5 + Key  
To Cs6 and/or  
option resistor*  
To Cs6 + Key and/or  
mode resistor†  
6
43  
44  
45  
46  
47  
48  
1
SNS0  
SNS0K  
SNS1  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
Option resistor  
7
Open  
Open or  
option resistor*  
Open  
Open or  
option resistor*  
Open  
Open or  
option resistor*  
Open  
Open or  
option resistor*  
Open  
Open or  
option resistor*  
Open  
Open or  
option resistor*  
8
9
SNS1K  
SNS2  
10  
11  
12  
13  
14  
15  
16  
17  
18  
SNS2K  
SNS3  
2
SNS3K  
SNS4  
3
4
SNS4K  
SNS5  
5
6
SNS5K  
SNS6  
7
Open or  
19  
20  
8
9
SNS6K  
SNS7  
I/O  
I/O  
mode resistor†  
Open or mode  
resistoror option  
resistor*  
Sense pin and mode  
or option select  
To Cs7 and/or mode resistor†  
or option resistor*  
21  
-
10  
SN7K  
n/c  
I/O  
-
Sense pin  
-
To Cs7 + Key  
Leave open  
Open  
11, 12, 13,  
14, 15, 16  
-
22  
-
23  
24  
-
25  
26  
27  
28  
29  
17  
18, 19, 20  
21  
22  
23, 24  
25  
Vss  
n/c  
Pwr  
-
I
O/OD  
-
O/OD  
O/OD  
O/OD  
O/OD  
O/OD  
Ground  
0V  
-
-
-
Sync In or LP In  
Detect Status  
-
Leave open  
SYNC/LP‡  
DETECT  
n/c  
Rising edge sync or LP pulse  
Active = any key in detect  
Leave open  
Also, binary coded output 0  
Also, binary coded output 1  
Also, binary coded output 2  
Vdd or Vss  
Open  
-
Open  
Open  
Open  
Open  
Open  
OUT_0  
OUT_1  
OUT_2  
OUT_3  
OUT_4  
Out 0  
Out 1  
Out 2  
Out 3  
26  
27  
28  
29  
Out 4  
In binary coded mode, these  
pins are clamped internally to  
Vss  
30  
31  
32  
30  
31  
32  
OUT_5  
OUT_6  
OUT_7  
O/OD  
O/OD  
O/OD  
Out 5  
Out 6  
Out 7  
Open  
Open  
Open  
Pin Type  
I
CMOS input only  
CMOS I/O  
CMOS push-pull output  
CMOS open drain output  
CMOS push pull or open-drain output (option selected)  
Power / ground  
I/O  
O
OD  
O/OD  
Pwr  
Notes  
Mode resistor is required only in Simplified mode (see Figure 1.2)  
* Option resistor is required only in Full Options mode (see Figure 1.1)  
Pin is either Sync or LP depending on options selected (functions SL_0, SL_1, see Figure 1.1)  
lQ  
4
QT1080 R11.06/0806  
Figure 1.1 Connection Diagram - Full Options; Shown for 32-QFN Package  
VDD  
+2.8 ~ +5V  
Voltage Reg  
Vunreg  
*4.7uF  
*4.7uF  
*100nF  
3
2
RSNS2  
2.2K  
VDD  
/RST  
4.7nF  
11  
10  
9
12  
13  
SNS2K  
SNS2  
SNS3  
KEY 2  
KEY 1  
KEY 0  
MOD_0  
Vdd / Vss  
4.7nF  
1M  
1M  
RSNS3  
MOD_1  
Vdd / Vss  
RS2  
CS3  
RS3  
10K  
1M  
1M  
1M  
1M  
1M  
CS2  
4.7nF  
CS1  
4.7nF  
SNS3K  
SNS4  
KEY 3  
KEY 4  
KEY 5  
KEY 6  
KEY 7  
RSNS1  
2.2K  
2.2K  
RS1  
10K  
SNS1K  
SNS1  
AKS_1  
Vdd / Vss  
RSNS4  
POL  
Vdd / Vss  
4.7nF  
RS4  
10K  
CS4  
8
15  
16  
17  
18  
19  
20  
21  
SNS4K  
SNS5  
RSNS0  
2.2K  
2.2K  
RS0  
10K  
7
SNS0K  
SNS0  
AKS_0  
Vdd / Vss  
OUT_D  
Vdd / Vss  
1M  
RSNS5  
4.7nF  
4.7nF  
CS5  
RS5  
10K  
6
CS0  
SNS5K  
SNS6  
2.2K  
2.2K  
10K  
VDD  
RSNS6  
SL_0  
Vdd / Vss  
CS6  
RS6  
Recommended Rb1, Rb2 Values  
SNS6K  
SNS7  
2.2K  
Vdd Range  
Rb1 Rb2  
2.8 ~ 3.59V 12K  
3.6 ~ 5V 15K  
10K  
22K  
27K  
Rb1  
Rb2  
RSNS7 4.7nF  
SL_1  
Vdd / Vss  
RS7  
CS7  
SNS7K  
4
OSC  
10K  
The required value of spread-spectrum capacitor CSS  
will vary according to the lengths of the acquire bursts,  
see Section 3.2. A typical value of CSS is 100nF.  
QT1080  
32-QFN  
CSS  
1
SS  
OUT_7  
OUT_6  
OUT_5  
OUT_4  
OUT_3  
OUT_2  
OUT_1  
OUT_0  
22  
VSS  
32  
31  
30  
29  
28  
27  
26  
25  
OUT_7  
OUT_6  
OUT_5  
OUT_4  
OUT_3  
OUT_2  
OUT_1  
OUT_0  
23  
24  
SYNC or LP IN  
DETECT OUT  
SYNC/LP  
DETECT  
Table 1.2  
AKS / Fast-Detect Options  
AKS_1  
Vss  
Vss  
Vdd  
Vdd  
AKS_0  
AKS MODE  
Off  
Off  
On, in 2 groups  
On, global  
FAST-DETECT  
Off  
Enabled  
Off  
Off  
Vss  
Vdd  
Vss  
Vdd  
Table 1.3  
Max On-Duration  
MOD_1  
Vss  
Vss  
MOD_0  
Vss  
Vdd  
MAX ON-DURATION MODE  
10 seconds (nom) to recalibrate  
60 seconds (nom) to recalibrate  
Infinite (disabled)  
Vdd  
Vss  
Vdd  
Vdd  
(reserved)  
Table 1.4  
Polarity and Output  
OUT_D  
Vss  
Vss  
Vdd  
Vdd  
POL  
Vss  
Vdd  
Vss  
Vdd  
OUT_n, DETECT PIN MODE  
Binary coded, active high, push-pull  
Direct, active low, open-drain  
Direct, active high, push-pull  
Direct, active low, push-pull  
Table 1.5  
SYNC/LP Function  
SL_1  
Vss  
Vss  
Vdd  
Vdd  
SL_0  
Vss  
Vdd  
Vss  
SYNC/LP PIN MODE  
Sync  
LP mode: 110ms nom response time  
LP mode: 200ms nom response time  
LP mode: 360ms nom response time  
Vdd  
lQ  
5
QT1080 R11.06/0806  
Figure 1.2 Connection Diagram - Simplified Mode; Shown for 32-QFN  
SMR resistor installed between SNS6K and SNS7.  
VDD  
+2.8 ~ +5V  
Voltage Reg  
Vunreg  
*4.7uF  
*100nF  
*4.7uF  
3
2
RSNS2  
RS3  
RS4  
RS5  
VDD  
/RST  
4.7nF  
11  
10  
9
12  
13  
SNS2K  
SNS2  
SNS3  
KEY 2  
KEY 1  
KEY 0  
4.7nF  
RSNS3  
RS2  
CS3  
2.2K  
2.2K  
10K  
CS2  
4.7nF  
CS1  
4.7nF  
SNS3K  
SNS4  
KEY 3  
KEY 4  
KEY 5  
KEY 6  
KEY 7  
RSNS1  
10K  
2.2K  
RS1  
SNS1K  
SNS1  
RSNS4  
4.7nF  
4.7nF  
4.7nF  
10K  
CS4  
8
15  
16  
17  
18  
19  
20  
21  
SNS4K  
SNS5  
RSNS0  
2.2K  
RS0  
10K  
7
SNS0K  
SNS0  
AKS_0  
Vdd / Vss  
RSNS5  
1M  
CS5  
10K  
2.2K  
6
CS0  
SNS5K  
SNS6  
RS6  
10K  
2.2K  
VDD  
RSNS6  
CS6  
2.2K  
SMR  
Recommended Rb1, Rb2 Values  
Vdd Range Rb1 Rb2  
SNS6K  
SNS7  
RS7  
10K  
1M  
Rb1  
Rb2  
RSNS7 4.7nF  
2.8 ~ 3.59V 12K  
3.6 ~ 5V 15K  
22K  
27K  
2.2K  
CS7  
SNS7K  
4
OSC  
10K  
The required value of spread-spectrum capacitor CSS  
will vary according to the lengths of the acquire bursts,  
see Section 3.2. A typical value of CSS is 100nF.  
QT1080  
32-QFN  
CSS  
1
SS  
OUT_7  
OUT_6  
OUT_5  
OUT_4  
OUT_3  
OUT_2  
OUT_1  
OUT_0  
22  
VSS  
32  
31  
30  
29  
28  
27  
26  
25  
OUT_7  
OUT_6  
OUT_5  
OUT_4  
OUT_3  
OUT_2  
OUT_1  
OUT_0  
23  
24  
LP IN  
SYNC/LP  
DETECT  
DETECT OUT  
Table 1.6  
AKS Resistor Options  
AKS_0  
Vss  
Vdd  
AKS MODE  
Off  
On, global  
FAST-DETECT  
Enabled  
Off  
Table 1.7  
Functions in Simplified Mode  
Output Drive, Polarity  
SYNC/LP pin  
Max on-duration delay  
Detect Pin  
Direct outputs, push-pull, active high  
200ms nom LP function; sync not available  
60 seconds (nom)  
Active high on any detect  
lQ  
6
QT1080 R11.06/0806  
2.5 DETECT Pin  
2 Device Operation  
2.1 Start-up Time  
After a reset or power-up event, the device requires 350ms  
to initialize, calibrate, and start operating normally. Keys will  
work properly once all keys have been calibrated after reset.  
DETECT represents the functional logical-OR of all eight  
keys. DETECT can be used to wake up a battery-operated  
product upon human touch.  
DETECT is also required to indicate to a host when the  
binary coded output pins (in that mode) are showing an  
active key. While DETECT is active, the binary coded  
outputs should be read at least twice along with DETECT to  
make sure that the code was not transitioning between  
states, to prevent a false reading.  
2.2 Option Resistors  
The option resistors are read on power-up only. There are  
two primary option mode configurations: full, and simplified.  
The output polarity and drive of DETECT are governed  
according to Table 1.4.  
In full options mode, eight 1Moption resistors are required  
as shown in Figure 1.1. All eight resistors are mandatory.  
To obtain simplified mode, a 1Mresistor should be  
connected from SNS6K to SNS7. In simplified mode, only  
one additional 1Moption resistor is required for the AKS  
feature (Figure 1.2).  
2.6 SYNC/LP Pin  
The SYNC / LP pin function is configured according to the  
SL_0 and SL_1 resistor connections to either Vdd or Vss,  
according to Table 1.5.  
Note that the presence and connection of option resistors  
will affect the required values of Cs; this effect will be  
especially noticeable if the Cs values are under 22nF. Cs  
values should be adjusted for optimal sensitivity after the  
option resistors are connected.  
Sync mode: Sync allows the designer to synchronize  
acquire bursts to an external signal source, such as mains  
frequency (50/60 Hz) to suppress interference. It can also be  
used to synchronize two QT parts which operate near each  
other, so that they will not cross-interfere if two or more of  
the keys (or associated wiring) of the two parts are near  
each other.  
2.3 OUT Pins - Direct Mode  
Direct output mode is selected via option resistors, as shown  
in Table 1.4.  
The SYNC input of the QT1080 is positive pulse triggered. If  
the SYNC input does not change, the device will free-run at  
its own rate after ~150ms.  
In this mode, there is one output for each key; each is active  
when a touch is confirmed on the corresponding electrode.  
Unused OUT pins should be left open.  
A trigger pulse on SYNC will cause the device to fire two  
acquire bursts in A-B sequence:  
If AKS is off, it is possible for all OUT pins to be active at the  
same time.  
Burst A: Keys 0, 1, 4, 5  
Burst B: Keys 2, 3, 6, 7  
Circuit of Figure 1.1: OUT polarity and drive are governed  
by the resistor connections to Vdd or Vss according to  
Table 1.4. The drive can be either push-pull or open-drain,  
active low or high.  
Low Power LP Mode: This allows the device to enter a Low  
Power mode with very low power consumption, in one of  
three response time settings: 110ms, 200ms, and 360ms  
nominal.  
Circuit of Figure 1.2: In this simplified circuit, the OUT pins  
are active high, push-pull only.  
LP mode is entered by a positive >150µs trigger pulse on the  
SYNC/LP pin. Once the LP pulse is detected, the device will  
enter and remain in this microamp mode until it senses and  
confirms a touch. Then it will switch back to normal (full  
speed) mode on its own, with a response time of 30ms  
typical (burst length dependent). The device will go back to  
LP mode again if SYNC/LP is held high, or after another LP  
pulse is received.  
2.4 OUT Pins - Binary Coded Mode  
Binary code mode is selected via option resistors, as shown  
in Table 1.4.  
In this mode, a key detection is registered as a binary code  
on pins OUT_2, OUT_1 and OUT_0, with possible values  
from 000 to 111. In practice, four lines are required to read  
the code, unless key 0 is not implemented; the output code  
000 can mean either ‘nothing detecting’ or ‘key 0 is  
detecting’. The fourth required line (if all eight keys are  
implemented) is the DETECT signal, which is active-high  
when any key is active.  
The response time setting is determined by option resistors  
SL_1 and SL_0; see Table 1.5. Slower response times result  
in lower power drain.  
The SYNC/LP pulse should be >150µs in duration.  
If the SYNC/LP pin is held high permanently, the device will  
go into normal mode during a key touch, and return to  
low-current mode when the detection ceases.  
The first key touched always wins and shows its output.  
Keys that come afterwards are hidden until the currently  
reported key has stopped detecting, in which case the code  
will change to the latent key.  
If the SYNC/LP pin is held low constantly, the device will  
remain in normal mode (25ms typical response time)  
continuously.  
This mode is useful to reduce the number of connections to  
a host controller, at the expense of being able to only report  
one active key at a time. Note that in global AKS mode  
(Section 2.7), only one key can report active at a time  
anyway.  
Circuit of Figure 1.1: OUT polarity and drive can only be  
push-pull and active high.  
Circuit of Figure 1.2: Binary coded not available.  
lQ  
7
QT1080 R11.06/0806  
AKS in this mode is Global only (i.e. operates across all  
functioning keys).  
2.7 AKS Function Pins  
The QT1080 features an adjacent key suppression (AKS)  
function with two modes. Option resistors act to set this  
feature according to Tables 1.2 and 1.6. AKS can also be  
disabled, allowing any combination of keys to become active  
at the same time. When operating, the modes are:  
The other option features are fixed as follows:  
OUT_n, DETECT Pins: Push-pull, active high, direct  
outputs  
SYNC/LP Function: LP mode, ~200ms response time  
Max On-Duration: 60 seconds  
Global: AKS functions operates across all eight keys. This  
means that only one key can be active at any one time.  
See Tables 1.6 and 1.7.  
Groups: AKS functions among two groups of four keys:  
0-1-4-5 and 2-3-6-7. This means that up to two keys can  
be active at any one time.  
2.11 Unused Keys  
Unused keys should be disabled by removing the  
corresponding Cs, Rs, and Rsns components and  
connecting SNS pins as shown in the ‘Unused’ column of  
Table 1.1. Unused keys are ignored and do not factor into  
the AKS function (Section 2.7).  
In Group mode, keys in one group have no AKS interaction  
with keys in the other group.  
Note that in Fast Detect mode, AKS can only be off.  
2.8 MOD_0, MOD_1 Inputs  
In full option mode, MOD_0 and MOD_1 resistors are used  
to set the ‘Max On-Duration’ recalibration timeouts. If a key  
becomes stuck on for a lengthy duration of time, this feature  
will cause an automatic recalibration event of that specific  
key only once the specified on-time has been exceeded.  
Settings of 10s, 60s, and infinite are available.  
3 Design Notes  
3.1 Oscillator Frequency  
The QT1080’s internal oscillator runs from an external  
resistor network connected to the OSC and SS pins as  
shown in Figures 1.1 and 1.2 to achieve spread spectrum  
operation. If spread spectrum mode is not required, the OSC  
pin should be connected to Vdd with an 18K1% resistor.  
The Max On-Duration feature operates on a key-by-key  
basis; when one key is stuck on, its recalibration has no  
effect on other keys.  
The logic combination on the MOD option pins sets the  
timeout delay (see Table 1.3).  
Under different Vdd voltage conditions the resistor network  
(or the solitary 18Kresistor) might require minor  
adjustment to obtain the specified burst center frequency.  
The network should be adjusted slightly so that the positive  
pulses on any key are approximately 2µs wide in the ‘solitary  
18Kresistor’ mode, or 2.15µs wide at the beginning of a  
burst with the recommended spread-spectrum circuit (see  
next section).  
Simplified mode MOD timing: In simplified mode, the max  
on-duration is fixed at 60 seconds.  
2.9 Fast Detect Mode  
In many applications, it is desirable to sense touch at high  
speed. Examples include scrolling ‘slider’ strips or ‘Off’  
buttons. It is possible to place the device into a ‘Fast Detect’  
mode that usually requires under 10ms to respond. This is  
accomplished internally by setting the Detect Integrator to  
only two counts, i.e. only two successive detections are  
required to detect touch.  
In practice, the pulse width has little effect on circuit  
performance if it varies in the range from 1.5µs to 2.5µs. The  
only effects will be seen in non-LP mode, as proportional  
variations in Max On-Duration times and response times.  
3.2 Spread-spectrum Circuit  
In LP mode, ‘Fast’ detection will not speed up the initial  
delay (which could be up to 360ms nominal depending on  
the option setting). However, once a key is detected the  
device is forced back into normal speed mode . It will remain  
in this faster mode until another LP pulse is received.  
The QT1080 offers the ability to spectrally spread its  
frequency of operation to heavily reduce susceptibility to  
external noise sources and to limit RF emissions. The SS pin  
is used to modulate an external passive RC network that  
modulates the OSC pin. OSC is the main oscillator current  
input. The circuit is shown in both Figures 1.1 and 1.2.  
When used in a ‘slider’ application, it is normally desirable to  
run the keys without AKS.  
The resistors Rb1 and Rb2 should be changed depending  
on Vdd. As shown in Figures 1.1 and 1.2, two sets of values  
are recommended for these resistors depending on Vdd.  
The power curves in Section 4.6 also show the effect of  
these resistors.  
In both normal and ‘Fast’ modes, the time required to  
process a key release is the same. It takes six sequential  
confirmations of non-detection to turn a key off.  
Fast Detect mode can be enabled as shown in Tables 1.2  
and 1.6.  
The circuit can be eliminated, if it is not desired, by using an  
18Kresistor from OSC to Vdd to drive the oscillator, and  
connecting SS to Vss with a 100Kresistor. This mode  
consumes significantly less current than spread spectrum  
mode.  
2.10 Simplified Mode  
A simplified operating mode which does not require the  
majority of option resistors is available. This mode is set by  
connecting a resistor labelled SMR between pins SNS6K  
and SNS7 (see Figure 1.2).  
The spread-spectrum RC network might need to be modified  
slightly if the burst lengths are particularly long. Vdd  
In this mode there is only one option possible - AKS enable  
or disable. When AKS is disabled, Fast Detect mode is  
enabled; when AKS is enabled, Fast Detect mode is off.  
variations can shift the center frequency and spread slightly.  
lQ  
8
QT1080 R11.06/0806  
The sawtooth waveform observed on SS should reach a  
crest height as follows:  
The required values of Cs can be noticeably affected by the  
presence and connection of the option resistors (see  
Section 2.2).  
Vdd >= 3.6V:17% of Vdd  
Vdd < 3.6V: 20% of Vdd  
3.4 Power Supply  
The 100nF capacitor connected to SS (Figures 1.1 and 1.2)  
should be adjusted so that the waveform approximates the  
above amplitude, ±10%, during normal operation in the  
target circuit. If this is done, the circuit will give a spectral  
modulation of 12-15%.  
The power supply can range from 2.8 to 5.0 volts. If this  
fluctuates slowly with temperature, the device will track and  
compensate for these changes automatically with only minor  
changes in sensitivity. If the supply voltage drifts or shifts  
quickly, the drift compensation mechanism will not be able to  
keep up, causing sensitivity anomalies or false detections.  
3.3 Cs Sample Capacitors - Sensitivity  
The Cs sample capacitors accumulate the charge from the  
key electrodes and determine sensitivity. Higher values of  
Cs make the corresponding sensing channel more sensitive.  
The values of Cs can differ for each channel, permitting  
differences in sensitivity from key to key or to balance  
unequal sensitivities. Unequal sensitivities can occur due to  
key size and placement differences and stray wiring  
capacitances. More stray capacitance on a sense trace will  
desensitize the corresponding key; increasing the Cs for that  
key will compensate for the loss of sensitivity.  
The power supply should be locally regulated, using a  
three-terminal device, to between 2.8V and 5.0V. If the  
supply is shared with another electronic system, care should  
be taken to ensure that the supply is free of digital spikes,  
sags and surges which can cause adverse effects.  
For proper operation a 0.1µF or greater bypass capacitor  
must be used between Vdd and Vss; the bypass capacitor  
should be routed with very short tracks to the device’s Vss  
and Vdd pins.  
The Cs capacitors can be virtually any plastic film or low to  
medium-K ceramic capacitor. The normal Cs range is 2 .2nF  
to 50nF depending on the sensitivity required; larger values  
of Cs require better quality to ensure reliable sensing. In  
certain circumstances the normal Cs range may be  
exceeded, hence the different values in Section 4.2.  
Acceptable capacitor types for most uses include PPS film,  
polypropylene film, and NP0 and X7R ceramics. Lower  
grades than X7R are not advised.  
3.5 PCB Layout and Construction  
Refer to Quantum application note AN-KD02 for information  
related to layout and construction matters.  
lQ  
9
QT1080 R11.06/0806  
4 Specifications  
4.1 Absolute Maximum Specifications  
Operating temperature, Ta. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 ~ +85ºC  
Storage temp, Ts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50ºC ~ +125ºC  
Vdd. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 ~ +6.0V  
Max continuous pin current, any control or drive pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20mA  
Short circuit duration to ground or Vdd, any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite  
Voltage forced onto any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V ~ (Vdd + 0.3) Volts  
4.2 Recommended Operating Conditions  
Operating temperature, Ta. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 ~ +85ºC  
V
DD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.8 ~ +5.0V  
Short-term supply ripple+noise. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5mV/s  
Long-term supply stability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100mV  
Cs range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2nF ~ 100nF  
Cx range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 ~ 50pF  
4.3 AC Specifications  
Vdd = 5.0, Ta = recommended, Cx = 5pF, Cs = 4.7nF; circuit of Figure 1.1  
Parameter Description  
Min  
Typ  
Max  
Units  
Notes  
Trc  
Fc  
Recalibration time  
150  
132  
15  
ms  
kHz  
%
Burst center frequency  
Burst modulation, percent  
Sample pulse duration  
Start-up time from cold start  
Burst duration  
Fm  
Tpc  
Tsu  
Tbd  
Tdf  
Tdn  
Tdl  
Tdr  
Total deviation  
2
µs  
350  
3.4  
10  
ms  
ms  
ms  
ms  
ms  
ms  
Both bursts together  
Response time - Fast mode  
Response time - Normal mode  
Response time - LP mode  
Release time - all modes  
25  
200  
25  
200ms LP setting  
End of touch  
4.4 DC Specifications  
Vdd = 5.0, Ta = recommended, Cx = 5pF, Cs = 4.7nF; circuit of Figure 1.1 unless noted  
Parameter Description  
Min  
Typ  
Max  
Units  
Notes  
IDDN  
Average supply current,  
normal mode*  
4.5  
2.7  
2.2  
1.8  
1.5  
1.3  
8
mA  
@ Vdd = 5.0  
@ Vdd = 4.0  
@ Vdd = 3.6  
@ Vdd = 3.3  
@ Vdd = 3.0  
@ Vdd = 2.8  
I
DDL  
Average supply current, LP mode*  
Average supply turn-on slope  
45  
µA  
@ Vdd = 3.0; 360ms LP mode  
V
DDS  
100  
V/s  
Required for start-up, w/o external reset  
circuit  
V
IL  
Low input logic level  
High input logic level  
Low output voltage  
High output voltage  
Input leakage current  
Acquisition resolution  
0.7  
0.5  
±1  
V
V
V
HL  
3.5  
V
OL  
V
7mA sink  
V
OH  
IL  
Vdd-0.5  
V
2.5mA source  
I
µA  
bits  
A
R
8
*No spread spectrum circuit; Rosc = 18KΩ  
4.5 Signal Processing  
Vdd = 5.0, Ta = recommended, Cx = 5pF, Cs = 4.7nF  
Description  
Value  
Units  
Notes  
Detection threshold  
10  
counts  
counts  
counts  
secs  
Threshold for increase in Cx load  
Detection hysteresis  
2
Anti-detection threshold  
6
Threshold for decrease of Cx load  
Time to recalibrate if Cx load has exceeded anti-detection threshold  
Must be consecutive or detection fails  
Must be consecutive or detection fails  
Option pin selected  
Anti-detection recalibration delay  
Detect Integrator filter, normal mode  
Detect Integrator filter, ‘fast’ mode  
Max On-Duration  
2
6
samples  
samples  
secs  
2
10, 60,  
2,000  
500  
Normal drift compensation rate  
Anti-drift compensation rate  
ms/level  
ms/level  
Towards increasing Cx load  
Towards decreasing Cx load  
lQ  
10  
QT1080 R11.06/0806  
4.6 Idd Curves (Average)  
Cx = 5pF, Cs = 4.7nF, Ta = 20oC, Spread spectrum circuit of Fig. 1.1.  
QT1080 Idd (normal mode) mA  
QT1080 Idd (110ms response) µA  
5.0  
500  
400  
300  
200  
100  
0
4.0  
Rb1=15K  
Rb2=27K  
Rb1=15K  
Rb2=27K  
3.0  
2.0  
Rb1=12K  
Rb2=22K  
1.0  
Rb1=12K  
Rb2=22K  
0.0  
2.5  
3
3.5  
4
4.5  
5
5.5  
2.5  
3
3.5  
4
4.5  
5
5.5  
Vdd(V)  
Vdd(V)  
QT1080 Idd (200ms response) µA  
QT1080 Idd (360ms response) µA  
400  
300  
200  
100  
0
300  
250  
200  
150  
100  
50  
Rb1=15K  
Rb2=27K  
Rb1=15K  
Rb2=27K  
Rb1=12K  
Rb2=22K  
Rb1=12K  
Rb2=22K  
0
2.5  
3
3.5  
4
4.5  
5
5.5  
2.5  
3
3.5  
4
4.5  
5
5.5  
Vdd(V)  
Vdd(V)  
Cx = 5pF, Cs = 4.7nF, Ta = 20oC, Rosc = 18K; no spread spectrum circuit  
QT1080 Idd (normal mode) mA  
QT1080 Idd (110ms response) µA  
5.0  
400  
300  
200  
100  
0
4.0  
3.0  
2.0  
1.0  
0.0  
2.5  
3
3.5  
4
4.5  
5
5.5  
2.5  
3
3.5  
4
4.5  
5
5.5  
Vdd(V)  
Vdd(V)  
QT1080 Idd (200ms response) µA  
QT1080 Idd (360ms response) µA  
250  
200  
150  
100  
50  
125  
100  
75  
50  
25  
0
0
2.5  
3
3.5  
4
4.5  
5
5.5  
2.5  
3
3.5  
4
4.5  
5
5.5  
Vdd(V)  
Vdd(V)  
lQ  
11  
QT1080 R11.06/0806  
4.7 LP Mode Typical Response Times  
Response Time vs Vdd - 110ms Setting  
Response Time vs Vdd - 200ms Setting  
130  
240  
230  
220  
210  
200  
190  
180  
170  
160  
125  
120  
115  
110  
105  
100  
95  
90  
2.5  
3
3.5  
4
4.5  
5
5.5  
2.5  
3
3.5  
4
4.5  
5
5.5  
Vdd  
Vdd  
Response Time vs Vdd - 360ms Setting  
430  
410  
390  
370  
350  
330  
310  
290  
2.5  
3
3.5  
4
4.5  
5
5.5  
Vdd  
lQ  
12  
QT1080 R11.06/0806  
4.8 Mechanical - 32-QFN Package  
Dimensions In Millimeters  
Symbol Minimum Nominal Maximum  
A
A1  
b
C
D
D2  
E
E2  
e
L
y
0.70  
0.00  
0.18  
-
4.90  
3.05  
4.90  
3.05  
-
-
0.02  
0.25  
0.20 REF  
5.00  
-
5.00  
-
0.50  
0.40  
-
0.95  
0.05  
0.32  
-
5.10  
3.65  
5.10  
3.65  
-
0.30  
0.00  
0.50  
0.075  
Note that there is no functional requirement for the large pad on the underside of this package to be  
soldered. If the final application requires this area to be soldered for mechanical reasons, the pad to  
which it is soldered must be isolated and contained under the footprint only.  
4.9 Mechanical - 48-SSOP Package  
A
B
C
G
J
H
D
a
F
E
All dimensions in millimeters  
A
10.03  
10.67  
B
7.39  
7.59  
C
0.20  
0.30  
D
2.16  
2.51  
E
F
0.10  
0.25  
G
15.57  
16.18  
H
0.10  
0.30  
J
0.64  
0.89  
a
Min  
Max  
0o  
8o  
0.635  
Typ  
lQ  
13  
QT1080 R11.06/0806  
4.10 Part Marking  
32-QFN  
48-SSOP  
QRG Part  
No.  
Pin 48  
QRG  
Revision  
Code  
QT1080  
©QRG 11  
YYWWG  
run nr.  
QT1080-IS48G  
© QRG 0803 R11  
QProxTM  
<datecode>  
DIMPLE  
'YY' = Year of manufacture:  
'WW' = Week of manufacture:  
'G' = Green/RoHS Compliant.  
Pin 1  
Pin 1  
Identification  
'run nr.' = 6 Digit Run Number  
lQ  
14  
QT1080 R11.06/0806  
NOTES:  
lQ  
15  
QT1080 R11.06/0806  
lQ  
Copyright © 2004-2006 QRG Ltd. All rights reserved  
Patented and patents pending  
Corporate Headquarters  
1 Mitchell Point  
Ensign Way, Hamble SO31 4RF  
Great Britain  
Tel: +44 (0)23 8056 5600 Fax: +44 (0)23 8045 3939  
www.qprox.com  
North America  
651 Holiday Drive Bldg. 5 / 300  
Pittsburgh, PA 15220 USA  
Tel: 412-391-7367 Fax: 412-291-1015  
This device is covered under one or more United States and corresponding international patents. QRG patent numbers can be found online  
at www.qprox.com. Numerous further patents are pending, which may apply to this device or the applications thereof.  
The specifications set out in this document are subject to change without notice. All products sold and services supplied by QRG are subject  
to our Terms and Conditions of sale and supply of services which are available online at www.qprox.com and are supplied with every order  
acknowledgement. QRG trademarks can be found online at www.qprox.com. QRG products are not suitable for medical (including lifesaving  
equipment), safety or mission critical applications or other similar purposes. Except as expressly set out in QRG's Terms and Conditions, no  
licenses to patents or other intellectual property of QRG (express or implied) are granted by QRG in connection with the sale of QRG  
products or provision of QRG services. QRG will not be liable for customer product design and customers are entirely responsible for their  
products and applications which incorporate QRG's products.  
Development Team: John Dubery, Alan Bowens, Matthew Trend  
厂商 型号 描述 页数 下载

QUANTUM

QT1+10G QTOUCH⑩传感器IC[ QTOUCH⑩ SENSOR IC ] 12 页

QUANTUM

QT1+IG QTOUCH⑩传感器IC[ QTOUCH⑩ SENSOR IC ] 12 页

QUANTUM

QT1+T+G 电荷转移触摸传感器[ CHARGE-TRANSFER TOUCH SENSOR ] 14 页

QUANTUM

QT100 电荷转移IC[ CHARGE-TRANSFER IC ] 10 页

QUANTUM

QT100-ISG 电荷转移IC[ CHARGE-TRANSFER IC ] 10 页

ATMEL

QT100A-ISMG [ Consumer Circuit, PDSO10 ] 18 页

QUANTUM

QT100_07 电荷转移QTOUCH⑩ IC[ CHARGE-TRANSFER QTOUCH⑩ IC ] 12 页

QUANTUM

QT100_0707 电荷转移QTOUCHâ ?? ¢ IC[ CHARGE-TRANSFER QTOUCH™ IC ] 12 页

QUANTUM

QT100_3R0.08_0307 电荷转移QTOUCH⑩ IC[ CHARGE-TRANSFER QTOUCH⑩ IC ] 12 页

QT

QT1010T1-W [ LONG CREEPAGE MINI-FLAT PACKAGE ] 13 页

PDF索引:

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

0

1

2

3

4

5

6

7

8

9

IC型号索引:

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

0

1

2

3

4

5

6

7

8

9

Copyright 2024 gkzhan.com Al Rights Reserved 京ICP备06008810号-21 京

0.199082s