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OXU210HP-PBG

型号:

OXU210HP-PBG

品牌:

OXFORD[ OXFORD SEMICONDUCTOR ]

页数:

2 页

PDF大小:

91 K

OXU210HP  
USB2.0 High-Speed Host, Peripheral, and OTG Controller  
Description  
Features  
The Oxford Semiconductor OXU210HP is a single-chip,  
high-speed USB host and high-speed USB peripheral  
controller with integrated transceivers. It is the fourth  
controller in the family of integrated, low-cost, high-  
performance, On-The-Go (OTG) controllers that have  
been specifically designed for embedded systems.  
ƒ High-performance, high-speed USB dual-role  
(host/peripheral) controller  
ƒ Compatible with the USB Specification, Revision  
2.0 for high-speed (480 Mb/s), full-speed (12 Mb/s),  
and low-speed (1.5 Mb/s) operations  
ƒ High-speed optimized host controller with  
transaction translator for complete backward  
compatibility with full-speed and low-speed products  
The OXU210HP operates up to 480 Mb/s, using a  
compatible EHCI-based core. It also includes an  
integrated transaction translator that supports full-speed  
(12 Mb/s) and low-speed (1.5 Mb/s) USB peripherals.  
ƒ Two high-speed USB ports; one port remains host  
while the other can be configured as peripheral,  
host or On-The-Go (dual role)  
The selectable 16- and 32-bit processor interface is  
compatible with a variety of CPUs. A large 72-Kbyte  
buffer has also been integrated to reduce interrupts and  
minimize CPU overhead.  
ƒ Simultaneous operation of both ports  
ƒ Choice of 16-bit or 32-bit configurable processor  
interface  
The OXU210HP supports all USB transfer modes  
(control, interrupt, bulk, and isochronous) and is  
supported with USB device drivers and the Oxford  
Semiconductor USBLink product suite. The USBLink  
host, peripheral, and OTG stacks have been ported to a  
wide variety of real time operating systems including  
VxWorks®, ThreadX®, and Nucleus®.  
ƒ Fast microprocessor access cycle and double/multi-  
buffering support for USB transfers  
ƒ Host interface contains support for common SoC  
DMA modes including bursting and slave  
request/acknowledge protocols  
ƒ Complete host, peripheral, and OTG software  
solutions for popular microprocessors using many  
of the most popular operating systems including  
VxWorks®, Windows® CE 5.0 and Linux® 2.6.11  
In addition, Oxford Semiconductor also makes available  
low-level controller drivers for other native USB stacks  
such as those included with Windows® CE and Linux®  
2.6.x.  
ƒ Advanced power management controls chip  
clocking and PHY function for very low power  
consumption  
Sample Applications  
ƒ Integrated on-chip VBUS voltage comparator and  
ƒ Digital televisions  
100 mA charge pump  
ƒ Home media centers  
ƒ Portable media players  
ƒ Digital video cameras  
ƒ Digital still cameras  
ƒ Printers  
ƒ 72 Kbytes of single-port SRAM provides space for  
data structures and buffer space for transfer data  
ƒ True transfer level operation, with transaction  
scheduling and handling (data sequence toggle,  
error retry, etc.), implemented in hardware  
ƒ Integrated PLL runs from a single 12-MHz crystal or  
ƒ MP3 players  
an external 12-MHz clock source  
ƒ External storage products  
ƒ Set-Top Boxes (STB)  
ƒ Personal Video Recorders (PVR)  
ƒ Personal Digital Assistants (PDA)  
ƒ 3G mobile phones  
ƒ Packaging  
o
o
7x7 mm BGA, 84 ball, RoHS compliant  
14x14 mm LQFP, 128 pin, RoHS compliant  
ƒ Operating temperature range: -40 to 85 degrees C  
ƒ DVD recorders  
Copyright 2006, Oxford Semiconductor, Inc.  
June 2006, REV. 1.1  
OXU210HP Architectural Block Diagram  
SUPERIOR  
PERFORMANCE  
Large internal RAM  
allows for multi-  
buffering  
72 KB  
Buffer  
Memory  
OSC1  
OSC2  
PLL/  
Clock  
Test  
Control  
TEST  
simultaneous  
Transaction  
Translator  
streams. Retries due  
to USB NAK’s are  
done in hardware –  
decreasing  
interrupts and  
lowering CPU and  
bus utilization.  
ACK  
REQ  
DMA  
Interface  
HS  
OTG  
Xcvr  
Host  
Controller  
Power  
2 PORTS  
2 ports allow multiple usage  
models;  
Management  
Transaction  
Translator  
LOW POWER  
DESIGN  
Multiple power and  
clock regions are  
available with  
2 Hosts,  
Host + Peripheral, or  
Host + OTG  
ADDR  
DATA  
CNTRL  
INT  
Host  
Controller  
16/32-bit  
Microprocessor  
Interface  
HS  
OTG  
Xcvr  
software-controlled  
power saving  
modes. PLL and  
oscillator can be  
disabled for deep-  
sleep state. Clock  
control block  
produces the lowest  
of four primary clock  
frequencies that  
meet the  
Peripheral  
Controller  
System  
Configuration &  
Control Registers  
OTG  
Control  
application’s  
operational  
requirements.  
OTG LOGIC  
Integrated hardware or software HNP  
options allow for more control of your  
software development.  
SIMULTANEOUS OPERATION  
Full host controller and peripheral controller  
implementations allow both  
to operate at the same time.  
Windows is a registered trademark of Microsoft, Inc.  
ThreadX is a registered trademark of Express Logic, Inc.  
Nucleus is a registered trademark of Mentor Graphics Corporation.  
VxWorks is a registered trademark of Wind River Systems.  
Linux is a registered trademark of Linus Torvalds.  
Contact Details  
Oxford Semiconductor, Inc.  
1768 McCandless Drive  
Milpitas, CA. 95035  
USA  
Sales email:  
sales@oxsemi.com  
Website:  
http://www.oxsemi.com  
Copyright 2006, Oxford Semiconductor, Inc.  
June 2006, REV. 1.1  
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