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2SK3325-ZJ

型号：

2SK3325-ZJ

描述：

切换N沟道功率MOS FET工业用[ SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE ]

品牌：

NEC[ NEC ]

页数：

8 页

PDF大小：

79 K

下载PDF手册
DATA SHEET  
MOS FIELD EFFECT TRANSISTOR  
2SK3325  
SWITCHING  
N-CHANNEL POWER MOS FET  
INDUSTRIAL USE  
DESCRIPTION  
ORDERING INFORMATION  
The 2SK3325 is N-Channel DMOS FET device that features  
a low gate charge and excellent switching characteristics, and  
designed for high voltage applications such as switching power  
supply, AC adapter.  
PART NUMBER  
2SK3325  
PACKAGE  
TO-220AB  
TO-262  
2SK3325-S  
2SK3325-ZJ  
TO-263  
FEATURES  
• Low gate charge:  
G
DD  
GS  
D
Q = 22 nC TYP. (V = 400 V, V = 10 V, I = 10 A)  
(TO-220AB)  
• Gate voltage rating: ±30 V  
• Low on-state resistance  
DS(on)  
R
GS  
D
= 0.85 Ω MAX. (V = 10 V, I = 5.0 A)  
• Avalanche capability ratings  
• TO-220AB, TO-262, TO-263 package  
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)  
GS  
DSS  
Drain to Source Voltage (V = 0 V)  
V
500  
±30  
V
V
(TO-262)  
DS  
GSS(AC)  
Gate to Source Voltage (V = 0 V)  
V
D(DC)  
I
Drain Current (DC)  
±10  
A
Drain Current (pulse) Note1  
D(pulse)  
I
±40  
A
C
T
Total Power Dissipation (T = 25°C)  
P
85  
W
W
°C  
°C  
A
A
T
P
Total Power Dissipation (T = 25°C)  
1.5  
ch  
Channel Temperature  
T
150  
stg  
Storage Temperature  
T
–55 to +150  
10  
(TO-263)  
Single Avalanche Current Note2  
Single Avalanche Energy Note2  
AS  
I
AS  
E
10.7  
mJ  
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 %  
2. Starting Tch = 25°C, VDD = 150 V, RG = 25Ω, VGS = 20 V →0V  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No.  
Date Published May 2000 NS CP(K)  
Printed in Japan  
D14264EJ1V0DS00 (1st edition)  
1999, 2000  
©
2SK3325  
ELECTRICAL CHARACTERISTICS (TA = 25 °C)  
CHARACTERISTICS  
Drain Leakage Current  
SYMBOL  
IDSS  
TEST CONDITIONS  
VDS = 500 V, VGS = 0 V  
MIN. TYP. MAX. UNIT  
100  
±100  
3.5  
µA  
nA  
V
Gate to Source Leakage Current  
Gate to Source Cut-off Voltage  
Forward Transfer Admittance  
Drain to Source On-state Resistance  
Input Capacitance  
IGSS  
VGS = ±30 V, VDS = 0 V  
VDS = 10 V, ID = 1 mA  
VGS(off)  
| yfs |  
RDS(on)  
Ciss  
2.5  
2.0  
VDS = 10 V, ID = 5.0 A  
VGS = 10 V, ID = 5.0 A  
4.0  
0.68  
1200  
190  
10  
S
0.85  
Ω
VDS = 10 V, VGS = 0 V, f = 1 MHz  
pF  
pF  
pF  
ns  
ns  
ns  
ns  
nC  
nC  
nC  
V
Output Capacitance  
Coss  
Crss  
Reverse Transfer Capacitance  
Turn-on Delay Time  
td(on)  
tr  
td(off)  
tf  
VDD = 150 V, ID = 5.0 A, VGS(on) = 10 V,  
21  
RG = 10 Ω, RL = 60 Ω  
Rise Time  
11  
Turn-off Delay Time  
40  
Fall Time  
9.5  
22  
Total Gate Charge  
QG  
VDD = 400 V, VGS = 10 V, ID = 10 A  
Gate to Source Charge  
Gate to Drain Charge  
Body Diode Forward Voltage  
QGS  
QGD  
VF(S-D)  
6.5  
7.5  
1.0  
IF = 10 A, VGS = 0 V  
Reverse Recovery Time  
Reverse Recovery Charge  
trr  
IF = 10 A, VGS = 0 V, di/dt = 50 A/µs  
0.5  
2.6  
µs  
Qrr  
µC  
TEST CIRCUIT 1 AVALANCHE CAPABILITY  
TEST CIRCUIT 2 SWITCHING TIME  
D.U.T.  
L
D.U.T.  
V
GS  
R
L
RG  
= 25 Ω  
90%  
90%  
V
GS  
Wave Form  
V
GS(on)  
10%  
0
R
G
PG.  
PG.  
50 Ω  
V
DD  
VDD  
V
GS = 20→0V  
I
D
90%  
I
D
V
0
GS  
BVDSS  
10%  
10%  
I
D
0
Wave Form  
I
AS  
VDS  
τ
I
D
t
d(on)  
t
r
t
d(off)  
tf  
VDD  
t
on  
toff  
τ = 1 µs  
Duty Cycle ≤ 1 %  
Starting Tch  
TEST CIRCUIT 3 GATE CHARGE  
D.U.T.  
= 2 mA  
I
G
RL  
PG.  
50 Ω  
V
DD  
2
Data Sheet D14264EJ1V0DS00  
2SK3325  
TYPICAL CHARACTERISTICS(TA = 25 °C)  
Figure1. DERATING FACTOR OF FORWARD BIAS  
SAFE OPERATING AREA  
Figure2. TOTAL POWER DISSIPATION vs.  
CASE TEMPERATURE  
100  
100  
80  
80  
60  
40  
20  
60  
40  
20  
20  
40  
60  
- Case Temperature - ˚C  
Figure4. DRAIN CURRENT vs.  
DRAIN TO SOURCE VOLTAGE  
80 100 120 140 160  
0
0
20  
40  
60  
- Case Temperature - ˚C  
Figure3. FORWARD BIAS SAFE OPERATING AREA  
80 100 120 140 160  
Tc  
T
c
100  
10  
1
20  
I
D (pulse)  
Pulsed  
VGS = 20 V  
I
D (DC)  
10 V  
8.0 V  
1ms  
Power Dissipation Lited  
10  
VGS = 6.0 V  
T
c
= 25 ˚C  
Single Pulse  
0.1  
1
10  
100  
1000  
0
4
8
12  
16  
VDS - Drain to Source Voltage - V  
VDS - Drain to Source Voltage - V  
Figure5. DRAIN CURRENT vs.  
GATE TO SOURCE VOLTAGE  
100  
Pulsed  
10  
1
0.1  
T = –25 ˚C  
A
25 ˚C  
75 ˚C  
125 ˚C  
0.01  
0.001  
0.0001  
0
5
10  
15  
VGS - Gate to Source Voltage - V  
3
Data Sheet D14264EJ1V0DS00  
2SK3325  
Figure6. TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH  
100  
10  
Rth(ch-A) = 83.0 ˚C/W  
Rth(ch-C) = 1.47 ˚C/W  
1
0.1  
T
c
= 25 ˚C  
Single Pulse  
0.01  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
PW - Pulse Width - s  
Figure8. DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
GATE TO SOURCE VOLTAGE  
Figure7. FORWARD TRANSFER ADMITTANCE vs.  
DRAIN CURRENT  
10  
2.0  
1
0.1  
T
A
= –25 ˚C  
25 ˚C  
75 ˚C  
125 ˚C  
I
D
= 10 A  
5.0 A  
2.0 A  
1.0  
VDS = 10 V  
Pulsed  
Pulsed  
20 25  
0.01  
0.0  
0.01  
0.1  
1
10  
100  
0
5
10  
15  
V
GS - Gate to Source Voltage - V  
I
D
- Drain Current - A  
Figure9. DRAIN TO SOURCE ON-STATE  
Figure10. GATE TO SOURCE CUT-OFF VOLTAGE vs.  
CHANNEL TEMPERATURE  
RESISTANCE vs. DRAIN CURRENT  
3.0  
4.0  
Pulsed  
VDS = 10 V  
I
D
= 1 mA  
3.0  
2.0  
1.0  
0.0  
2.0  
1.0  
0
–50  
0
50  
100  
150  
200  
0.1  
1
10  
100  
T
ch - Channel Temperature - ˚C  
ID  
- Drain Current - A  
4
Data Sheet D14264EJ1V0DS00  
2SK3325  
Figure12. SOURCE TO DRAIN DIODE  
FORWARD VOLTAGE  
Figure11. DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
CHANNEL TEMPERATURE  
3.0  
100  
10  
Pulsed  
2.0  
I
D
= 10 A  
VGS = 10 V  
1
I = 5.0 A  
D
1.0  
0.0  
V
GS = 0 V  
0.1  
V
GS = 10 V  
0.01  
–50  
0
50  
100  
150  
1.5  
0.0  
0.5  
1.0  
T
ch - Channel Temperature - ˚C  
VSD - Source to Drain Voltage - V  
Figure13. CAPACITANCE vs. DRAIN TO  
SOURCE VOLTAGE  
Figure14. SWITCHING CHARACTERISTICS  
1000  
100  
t
r
10000  
V
GS = 0 V  
f = 1.0 MHz  
Ciss  
t
f
1000  
100  
Coss  
t
t
d(on)  
d(off)  
10  
1
10  
1
Crss  
V
DD = 150 V  
GS = 10 V  
V
R
G
= 10 Ω  
0.1  
1
10  
100  
0.1  
1
10  
100  
1000  
ID  
- Drain Current - A  
V
DS - Drain to Source Voltage - V  
Figure16. DYNAMIC INPUT/OUTPUT CHARACTERISTICS  
800  
Figure15. REVERSE RECOVERY TIME vs.  
DRAIN CURRENT  
1000  
900  
800  
700  
I = 10 A  
D
14  
12  
10  
8
700  
600  
500  
400  
300  
200  
100  
di/dt = 50 A/µs  
GS = 0 V  
V
V
DD = 400 V  
250 V  
VGS  
100 V  
600  
500  
400  
300  
200  
100  
0
6
4
2
V
DS  
0
0
5
10  
15  
20  
25  
0.1  
1
10  
100  
Q
G
- Gate Charge - nC  
I
F
- Drain Current - A  
5
Data Sheet D14264EJ1V0DS00  
2SK3325  
Figure18. SINGLE AVALANCHE ENERGY vs  
INDUCTIVE LOAD  
Figure17. SINGLE AVALANCHE ENERGY vs  
STARTING CHANNEL TEMPERATURE  
16  
14  
12  
10  
8
100  
10  
1
R
G
= 25 Ω  
DD = 150 V  
GS = 20 V → 0 V  
Starting Tch = 25 ˚C  
I
D(peak) = IAS  
V
R
G
= 25 Ω  
V
V
V
GS = 20 V → 0 V  
DD = 150 V  
I
AS = 10 A  
E
AS = 10.7 mJ  
6
4
2
0
0.1  
25  
50  
75  
100  
125  
150  
175  
10 µ  
1 m  
L - Inductive Load - H  
10 m  
100 µ  
Starting Tch - Starting Channel Temperature - ˚C  
6
Data Sheet D14264EJ1V0DS00  
2SK3325  
PACKAGE DRAWINGS (Unit : mm)  
1)TO-220AB (MP-25)  
2)TO-262 (MP-25 Fin Cut)  
4.8 MAX.  
1.3±0.2  
10.6 MAX.  
10.0  
4.8 MAX.  
1.3±0.2  
(10)  
4
φ
3.6±0.2  
1
2
3
4
1
2 3  
1.3±0.2  
1.3±0.2  
2.8±0.2  
0.5±0.2  
1.Gate  
0.75±0.3  
2.54 TYP.  
2.54 TYP.  
0.75±0.1  
0.5±0.2  
2.8±0.2  
2.54 TYP.  
2.Drain  
2.54 TYP.  
3.Source  
4.Fin (Drain)  
1.Gate  
2.Drain  
3.Source  
4.Fin (Drain)  
3)TO-263 (MP-25ZJ)  
4.8 MAX.  
(10)  
4
1.3±0.2  
EQUIVALENT CIRCUIT  
Drain  
Body  
Diode  
1.4±0.2  
0.7±0.2  
Gate  
0.5±0.2  
2.54 TYP.  
2.54 TYP.  
1
2
3
Source  
1.Gate  
2.Drain  
3.Source  
4.Fin (Drain)  
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and  
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as  
much as possible, and quickly dissipate it once, when it has occurred.  
7
Data Sheet D14264EJ1V0DS00  
2SK3325  
•
The information in this document is current as of May, 2000. The information is subject to change  
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data  
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products  
and/or types are available in every country. Please check with an NEC sales representative for  
availability and additional information.  
•
•
No part of this document may be copied or reproduced in any form or by any means without prior  
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.  
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of  
third parties by or arising from the use of NEC semiconductor products listed in this document or any other  
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any  
patents, copyrights or other intellectual property rights of NEC or others.  
•
•
•
Descriptions of circuits, software and other related information in this document are provided for illustrative  
purposes in semiconductor product operation and application examples. The incorporation of these  
circuits, software and information in the design of customer's equipment shall be done under the full  
responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third  
parties arising from the use of these circuits, software and information.  
While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers  
agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize  
risks of damage to property or injury (including death) to persons arising from defects in NEC  
semiconductor products, customers must incorporate sufficient safety measures in their design, such as  
redundancy, fire-containment, and anti-failure features.  
NEC semiconductor products are classified into the following three quality grades:  
"Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products  
developed based on a customer-designated "quality assurance program" for a specific application. The  
recommended applications of a semiconductor product depend on its quality grade, as indicated below.  
Customers must check the quality grade of each semiconductor product before using it in a particular  
application.  
"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio  
and visual equipment, home electronic appliances, machine tools, personal electronic equipment  
and industrial robots  
"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster  
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed  
for life support)  
"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life  
support systems and medical equipment for life support, etc.  
The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's  
data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not  
intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness  
to support a given application.  
(Note)  
(1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries.  
(2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for  
NEC (as defined above).  
M8E 00. 4  
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