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TDA 8922

型号:

TDA 8922

描述:

- 12号的铝制车身绘( RAL 7032 )

品牌:

NXP[ NXP ]

页数:

36 页

PDF大小:

748 K

INTEGRATED CIRCUITS  
DATA SHEET  
TDA8922  
2 × 25 W class-D power amplifier  
Objective specification  
2003 Mar 20  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
CONTENTS  
17  
18  
PACKAGE OUTLINE  
SOLDERING  
1
2
3
4
5
6
7
8
FEATURES  
18.1  
18.2  
Introduction  
APPLICATIONS  
Through-hole mount packages  
Soldering by dipping or by solder wave  
Manual soldering  
Surface mount packages  
Reflow soldering  
Wave soldering  
Manual soldering  
Suitability of IC packages for wave, reflow and  
dipping soldering methods  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
ORDERING INFORMATION  
BLOCK DIAGRAM  
18.2.1  
18.2.2  
18.3  
18.3.1  
18.3.2  
18.3.3  
18.4  
PINNING  
FUNCTIONAL DESCRIPTION  
8.1  
General  
19  
20  
21  
DATA SHEET STATUS  
DEFINITIONS  
8.2  
8.3  
Pulse width modulation frequency  
Protections  
8.3.1  
8.3.2  
Overtemperature  
Short-circuit across loudspeaker terminals and  
to supply lines  
DISCLAIMERS  
8.3.3  
8.3.4  
8.4  
Start-up safety test  
Supply voltage alarm  
Differential audio inputs  
9
LIMITING VALUES  
10  
11  
12  
13  
14  
THERMAL CHARACTERISTICS  
QUALITY SPECIFICATION  
STATIC CHARACTERISTICS  
SWITCHING CHARACTERISTICS  
DYNAMICAC CHARACTERISTICS(STEREO  
AND DUAL SE APPLICATION)  
15  
DYNAMIC AC CHARACTERISTICS (MONO  
BTL APPLICATION)  
16  
APPLICATION INFORMATION  
16.1  
16.2  
16.3  
16.4  
16.5  
16.6  
16.7  
16.8  
16.9  
16.10  
16.11  
16.12  
16.13  
BTL application  
Pin MODE  
Output power estimation  
External clock  
Heatsink requirements  
Output current limiting  
Pumping effects  
Reference design  
PCB information for HSOP24 package  
Classification  
Bill of materials for reference design  
Curves measured in reference design  
Application schematics  
2003 Mar 20  
2
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
1
FEATURES  
2
APPLICATIONS  
High efficiency ( 90%)  
Television sets  
Operating supply voltage from ±12.5 to ±30 V  
Very low quiescent current  
Low distortion  
Home-sound sets  
Multimedia systems  
All mains fed audio systems  
Car audio (boosters).  
Usable as a stereo Single-Ended (SE) amplifier or as a  
mono amplifier in Bridge-Tied Load (BTL)  
Fixed gain of 30 dB in Single-Ended (SE) and 36 dB in  
Bridge-Tied Load (BTL)  
3
GENERAL DESCRIPTION  
The TDA8922 is a high efficiency class-D audio power  
amplifier with very low dissipation. The typical output  
power is 2 × 25 W.  
High output power  
Good ripple rejection  
Internal switching frequency can be overruled by an  
external clock  
The device is available in the HSOP24 power package  
with a small internal heatsink and in the DBS23P  
through-hole power package. Depending on the supply  
voltage and load conditions, a very small or even no  
external heatsink is required. The amplifier operates over  
a wide supply voltage range from ±12.5 to ±30 V and  
consumes a very low quiescent current.  
No switch-on or switch-off plop noise  
Short-circuit proof across load and to supply lines  
Electrostatic discharge protection  
Thermally protected.  
4
QUICK REFERENCE DATA  
SYMBOL  
General; VP = ±20 V  
PARAMETER  
CONDITIONS  
MIN.  
TYP. MAX. UNIT  
VP  
supply voltage  
±12.5 ±20  
±30  
V
Iq(tot)  
total quiescent supply no load connected  
current  
55  
75  
mA  
η
efficiency  
Po = 25 W; SE: RL = 2 × 8 ; fi = 1 kHz  
90  
%
Stereo single-ended configuration  
Po output power  
RL = 8 ; THD = 10%; VP = ±20 V; note 1 22  
RL = 4 ; THD = 10%; VP = ±15 V; note 1 22  
25  
25  
W
W
Mono bridge-tied load configuration  
Po  
output power  
RL = 8 ; THD = 10%; VP = ±15 V; note 1 46  
50  
W
Note  
1. See Section 16.5.  
5
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
VERSION  
TDA8922TH  
HSOP24  
DBS23P  
plastic, heatsink small outline package; 24 leads;  
low stand-off height  
SOT566-3  
TDA8922J  
plastic DIL-bent-SIL power package; 23 leads  
(straight lead length 3.2 mm)  
SOT411-1  
2003 Mar 20  
3
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
6
BLOCK DIAGRAM  
V
V
V
V
STABI PROT  
DDP2  
23 (16)  
DDP1  
DDA2  
3 (20)  
DDA1  
10 (4)  
18 (12)  
13 (7)  
14 (8)  
15 (9)  
BOOT1  
RELEASE1  
SWITCH1  
ENABLE1  
9 (3)  
8 (2)  
IN1  
IN1+  
DRIVER  
HIGH  
PWM  
MODULATOR  
INPUT  
STAGE  
CONTROL  
AND  
HANDSHAKE  
16 (10)  
OUT1  
DRIVER  
LOW  
mute  
11 (5)  
7 (1)  
SGND1  
OSC  
STABI  
V
SSP1  
TDA8922TH  
(TDA8922J)  
TEMPERATURE SENSOR  
CURRENT PROTECTION  
OSCILLATOR  
MANAGER  
V
6 (23)  
DDP2  
MODE  
MODE  
mute  
22 (15)  
BOOT2  
2 (19)  
SGND2  
ENABLE2  
DRIVER  
HIGH  
CONTROL  
AND  
HANDSHAKE  
21 (14)  
OUT2  
5 (22)  
4 (21)  
SWITCH2  
IN2+  
IN2−  
INPUT  
STAGE  
PWM  
MODULATOR  
DRIVER  
LOW  
RELEASE2  
1 (18)  
12 (6)  
SSA1  
24 (17)  
19 (-)  
(1)  
17 (11)  
20 (13)  
V
V
V
V
V
SSP1  
HW  
SSA2  
SSD  
SSP2  
MGU994  
(1) Pin HW (TDA8922TH only) should be connected to pin VSSD in the application.  
Pin numbers in parenthesis refer to the TDA8922J.  
Fig.1 Block diagram.  
2003 Mar 20  
4
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
7
PINNING  
SYMBOL  
PIN  
TDA8922TH  
DESCRIPTION  
TDA8922J  
VSSA2  
1
2
18  
19  
20  
21  
22  
23  
1
negative analog supply voltage for channel 2  
signal ground for channel 2  
SGND2  
VDDA2  
IN2−  
3
positive analog supply voltage for channel 2  
negative audio input for channel 2  
4
IN2+  
5
positive audio input for channel 2  
MODE  
OSC  
6
mode selection input: standby, mute or operating  
oscillator frequency adjustment or tracking input  
positive audio input for channel 1  
7
IN1+  
8
2
IN1−  
9
3
negative audio input for channel 1  
VDDA1  
SGND1  
VSSA1  
PROT  
VDDP1  
BOOT1  
OUT1  
VSSP1  
STABI  
HW  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
4
positive analog supply voltage for channel 1  
signal ground for channel 1  
5
6
negative analog supply voltage for channel 1  
time constant capacitor for protection delay  
positive power supply voltage for channel 1  
bootstrap capacitor for channel 1  
7
8
9
10  
11  
12  
PWM output from channel 1  
negative power supply voltage for channel 1  
decoupling of internal stabilizer for logic supply  
handle wafer; must be connected to pin VSSD  
negative power supply voltage for channel 2  
PWM output from channel 2  
VSSP2  
OUT2  
BOOT2  
VDDP2  
VSSD  
13  
14  
15  
16  
17  
bootstrap capacitor for channel 2  
positive power supply voltage for channel 2  
negative digital supply voltage  
2003 Mar 20  
5
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
handbook, halfpage  
OSC  
IN1+  
IN1−  
1
2
3
V
4
DDA1  
SGND1  
5
V
6
SSA1  
handbook, halfpage  
PROT  
V
24  
23  
1
2
V
7
SSD  
SSA2  
V
V
SGND2  
8
DDP1  
DDP2  
BOOT1  
OUT1  
BOOT2 22  
OUT2 21  
3
V
9
DDA2  
IN2−  
IN2+  
MODE  
OSC  
IN1+  
IN1−  
10  
11  
12  
13  
14  
15  
16  
17  
18  
4
V
V
20  
5
SSP1  
SSP2  
STABI  
HW 19  
6
TDA8922J  
TDA8922TH  
V
STABI 18  
17  
7
SSP2  
OUT2  
V
8
SSP1  
BOOT2  
OUT1 16  
9
V
BOOT1 15  
10  
V
DDP2  
DDA1  
V
V
14  
11 SGND1  
12  
SSD  
DDP1  
V
PROT 13  
V
SSA2  
SSA1  
MGU995  
SGND2 19  
V
20  
DDA2  
IN221  
IN2+ 22  
23  
MODE  
MGU996  
Fig.2 Pin configuration TDA8922TH.  
Fig.3 Pin configuration TDA8922J.  
2003 Mar 20  
6
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
8
FUNCTIONAL DESCRIPTION  
General  
The amplifier system can be switched in three operating  
modes with pin MODE:  
8.1  
Standby mode; with a very low supply current  
The TDA8922 is a two channel audio power amplifier using  
class-D technology. A detailed application reference  
design is shown in Fig.10. Typical application schematics  
are shown in Figs 37 and 38.  
Mute mode; the amplifiers are operational, but the audio  
signal at the output is suppressed  
Operating mode; the amplifiers fully are operational with  
output signal.  
The audio input signal is converted into a digital Pulse  
Width Modulated (PWM) signal via an analog input stage  
and PWM modulator. To enable the output power  
transistors to be driven, this digital PWM signal is applied  
to a control and handshake block and driver circuits for  
both the high side and low side. In this way a level shift is  
performed from the low power digital PWM signal  
(at logic levels) to a high power PWM signal which  
switches between the main supply lines.  
An example of a switching circuit for driving pin MODE is  
illustrated in Fig.4.  
For suppressing plop noise, the amplifier will remain  
automatically in the mute mode for approximately 150 ms  
before switching to the operating mode (see Fig.5).  
During this time, the coupling capacitors at the input are  
fully charged.  
A 2nd-order low-pass filter converts the PWM signal to an  
analog audio signal across the loudspeakers.  
The TDA8922 one-chip class-D amplifier contains high  
power D-MOS switches, drivers, timing and handshaking  
between the power switches and some control logic. For  
protection a temperature sensor and a maximum current  
detector are built-in.  
+5 V  
handbook, halfpage  
standby/  
mute/on  
mute  
The two audio channels of the TDA8922 contain two  
PWMs, two analog feedback loops and two differential  
input stages. It also contains circuits common to both  
channels such as the oscillator, all reference sources, the  
mode functionality and a digital timing manager.  
R
MODE pin  
R
SGND  
MBL463  
The TDA8922 contains two independent amplifier  
channels with high output power, high efficiency (90%),  
low distortion and a low quiescent current. The amplifier  
channels can be connected in the following configurations:  
Mono Bridge-Tied Load (BTL) amplifier  
Stereo Single-Ended (SE) amplifiers.  
Fig.4 Example of mode selection circuit.  
2003 Mar 20  
7
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
audio  
switching  
V
mode  
operating  
4 V  
mute  
2 V  
standby  
0 V (SGND)  
time  
100 ms  
>50 ms  
audio  
switching  
V
mode  
operating  
4 V  
standby  
0 V (SGND)  
time  
100 ms  
50 ms  
MBL465  
When switching from standby to mute, there is a delay of 100 ms before the output starts switching. The audio signal is available after Vmode has been  
set to operating, but not earlier than 150 ms after switching to mute.  
When switching from standby to operating, there is a first delay of 100 ms before the outputs starts switching. The audio signal is available after a  
second delay of 50 ms.  
Fig.5 Timing on mode selection input.  
2003 Mar 20  
8
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
8.2  
Pulse width modulation frequency  
8.3.2  
SHORT-CIRCUIT ACROSS LOUDSPEAKER TERMINALS  
AND TO SUPPLY LINES  
The output signal of the amplifier is a PWM signal with a  
carrier frequency of approximately 350 kHz. Using a  
2nd-order LC demodulation filter in the application results  
in an analog audio signal across the loudspeaker.  
This switching frequency is fixed by an external resistor  
When the loudspeaker terminals are short-circuited or if  
one of the demodulated outputs of the amplifier is  
short-circuited to one of the supply lines, this will be  
detected by the current protection. If the output current  
exceeds the maximum output current of 4 A, then the  
power stage will shut down within less than 1 µs and the  
high current will be switched off. In this state the  
dissipation is very low. Every 100 ms the system tries to  
restart again. If there is still a short-circuit across the  
loudspeaker load or to one of the supply lines, the system  
is switched off again as soon as the maximum current is  
exceeded. The average dissipation will be low because of  
this low duty cycle.  
ROSC connected between pin OSC and VSSA. With the  
resistor value given in the schematic diagram of the  
reference design, the carrier frequency is typical 350 kHz.  
The carrier frequency can be calculated using the  
9 × 109  
ROSC  
following equation: fosc  
=
Hz  
------------------  
If two or more class-D amplifiers are used in the same  
audio application, it is advisable to have all devices  
operating at the same switching frequency.  
8.3.3  
START-UP SAFETY TEST  
This can be realized by connecting all OSC pins together  
and feed them from a external central oscillator. Using an  
external oscillator it is necessary to force pin OSC to a  
DC-level above SGND for switching from the internal to an  
external oscillator. In this case the internal oscillator is  
disabled and the PWM will be switched on the external  
frequency. The frequency range of the external oscillator  
must be in the range as specified in the switching  
characteristics; see Chapter 13.  
During the start-up sequence, when pin MODE is switched  
from standby to mute, the conditions at the output  
terminals of the power stage are checked. In the event of  
a short-circuit at one of the output terminals to VDD or VSS  
the start-up procedure is interrupted and the systems waits  
for open-circuit outputs. Because the test is done before  
enabling the power stages, no large currents will flow in the  
event of a short-circuit. This system protects for  
short-circuits at both sides of the output filter to both supply  
lines. When there is a short-circuit from the power PWM  
output of the power stage to one of the supply lines (before  
the demodulation filter) it will also be detected by the  
start-up safety test. Practical use of this test feature can be  
found in detection of short-circuits on the printed-circuit  
board.  
In an application circuit:  
Internal oscillator: ROSC connected between pin OSC  
and VSSA  
External oscillator: connect the oscillator signal between  
pins OSC and SGND; delete ROSC and COSC  
.
8.3 Protections  
Remark: This test is only operational prior to or during the  
start-up sequence, and not during normal operation.  
Temperature, supply voltage and short-circuit protections  
sensors are included on the chip. In the event that the  
maximum current or maximum temperature is exceeded  
the system will shut down.  
During normal operation the maximum current protection  
is used to detect short-circuits across the load and with  
respect to the supply lines.  
8.3.1  
OVERTEMPERATURE  
If the junction temperature Tj > 150 °C, then the power  
stage will shut down immediately. The power stage will  
start switching again if the temperature drops to  
approximately 130 °C, thus there is a hysteresis of  
approximately 20 °C.  
2003 Mar 20  
9
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
8.3.4  
SUPPLY VOLTAGE ALARM  
8.4  
Differential audio inputs  
If the supply voltage drops below ±12.5 V, the  
For a high common mode rejection ratio and a maximum  
of flexibility in the application, the audio inputs are fully  
differential. By connecting the inputs anti-parallel the  
phase of one of the channels can be inverted, so that a  
load can be connected between the two output filters.  
In this case the system operates as a mono BTL amplifier  
and with the same loudspeaker impedance an  
approximately four times higher output power can be  
obtained.  
undervoltage protection circuit is activated and the system  
will shut down correctly. If the internal clock is used, this  
switch-off will be silent and without plop noise. When the  
supply voltage rises above the threshold level, the system  
is restarted again after 100 ms. If the supply voltage  
exceeds ±32 V the overvoltage protection circuit is  
activated and the power stages will shut down. They are  
re-enabled as soon as the supply voltage drops below the  
threshold level.  
The input configuration for a mono BTL application is  
illustrated in Fig.6; for more information see Chapter 16.  
An additional balance protection circuit compares the  
positive (VDD) and the negative (VSS) supply voltages and  
is triggered if the voltage difference between them  
exceeds a certain level. This level depends on the sum of  
both supply voltages. An expression for the unbalanced  
threshold level is as follows: Vth(unb) 0.15 × (VDD + VSS).  
In the stereo single-ended configuration it is also  
recommended to connect the two differential inputs in  
anti-phase. This has advantages for the current handling  
of the power supply at low signal frequencies.  
Example: With a symmetrical supply of ±30 V, the  
protection circuit will be triggered if the unbalance exceeds  
approximately 9 V; see Section 16.7.  
OUT1  
IN1+  
IN1−  
V
SGND  
OUT2  
in  
IN2+  
IN2−  
power stage  
MBL466  
Fig.6 Input configuration for mono BTL application.  
2003 Mar 20  
10  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
9
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
SYMBOL  
VP  
VMODE  
Vsc  
IORM  
Tstg  
PARAMETER  
CONDITIONS  
MIN.  
MAX.  
±30  
UNIT  
supply voltage  
V
V
V
A
input voltage on pin MODE  
short-circuit voltage on output pins  
repetitive peak current in output pin  
storage temperature  
with respect to SGND  
note 1  
5.5  
±30  
4
55  
40  
+150  
+85  
150  
°C  
°C  
°C  
Tamb  
Tvj  
ambient temperature  
virtual junction temperature  
Notes  
1. See Section 16.6.  
10 THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
CONDITIONS  
VALUE  
UNIT  
Rth(j-a)  
thermal resistance from junction to ambient  
in free air; note 1  
TDA8922TH  
35  
35  
K/W  
K/W  
TDA8922J  
Rth(j-c)  
thermal resistance from junction to case  
TDA8922TH  
note 1  
1.3  
1.3  
K/W  
K/W  
TDA8922J  
Note  
1. See Section 16.5.  
11 QUALITY SPECIFICATION  
In accordance with “General Quality Specification for Integrated Circuits: SNW-FQ-611D” if this device is used as an  
audio amplifier.  
2003 Mar 20  
11  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
12 STATIC CHARACTERISTICS  
VP = ±25 V; Tamb = 25 °C; measured in Fig.10; unless otherwise specified.  
SYMBOL  
Supply  
PARAMETER  
CONDITIONS  
MIN.  
TYP. MAX. UNIT  
VP  
supply voltage  
note 1  
±12.5 ±20  
±30  
75  
V
Iq(tot)  
Istb  
total quiescent supply current  
standby supply current  
no load connected  
55  
mA  
µA  
100  
500  
Mode select input; pin MODE  
VMODE  
IMODE  
Vstb  
input voltage  
note 2  
0
5.5  
V
input current  
VMODE = 5.5 V  
notes 2 and 3  
notes 2 and 3  
notes 2 and 3  
1000 µA  
input voltage for standby mode  
input voltage for mute mode  
input voltage for operating mode  
0
0.8  
3.0  
5.5  
V
V
V
Vmute  
Von  
2.2  
4.2  
Audio inputs; pins IN1, IN1+, IN2+ and IN2−  
VI DC input voltage  
Amplifier outputs; pins OUT1 and OUT2  
note 2  
0
V
VOO(SE)  
output offset voltage  
SE; operating and mute  
SE; operating mute  
BTL; operating and mute  
BTL; operating mute  
150  
80  
mV  
mV  
mV  
mV  
VOO(SE)  
VOO(BTL)  
VOO(BTL)  
variation of output offset voltage  
output offset voltage  
215  
115  
variation of output offset voltage  
Stabilizer output; pin STABI  
Vo(stab)  
stabilizer output voltage  
mute and operating; note 4  
11  
13  
15  
V
Temperature protection  
Tprot  
Thys  
temperature protection activation  
150  
°C  
°C  
hysteresis on temperature  
protection  
20  
Notes  
1. The circuit is DC adjusted at VP = ±12.5 to ±30 V.  
2. With respect to SGND (0 V).  
3. The transition regions between standby, mute and operating mode contain hysteresis (see Fig.7).  
4. With respect to VSSP1  
.
2003 Mar 20  
12  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
MBL467  
STBY  
MUTE  
ON  
0
0.8  
2.2  
3.0  
4.2  
V
5.5  
(V)  
MODE  
Fig.7 Behaviour of mode selection pin MODE.  
13 SWITCHING CHARACTERISTICS  
VDD = ±25 V; Tamb = 25 °C; measured in Fig.10; unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Internal oscillator  
fosc  
typical internal oscillator  
frequency  
ROSC = 30.0 kΩ  
290  
210  
317  
344  
600  
kHz  
kHz  
fosc(int)  
internal oscillator  
frequency range  
note 1  
External oscillator or frequency tracking  
VOSC  
voltage on pin OSC  
SGND + 4.5 SGND + 5  
SGND + 6  
V
V
VOSC(trip)  
trip level for tracking on  
pin OSC  
SGND + 2.5  
ftrack  
frequency range for  
tracking  
210  
15  
600  
kHz  
V
VP(OSC)(ext) minimum symmetrical  
supply voltage for external  
oscillator application  
Note  
1. Frequency set with ROSC according to the formula in Section 8.2.  
2003 Mar 20  
13  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
14 DYNAMIC AC CHARACTERISTICS (STEREO AND DUAL SE APPLICATION)  
VP = ±20 V; RL = 8 ; fi = 1 kHz; fosc = 310 kHz; RsL < 0.1 (note 1); Tamb = 25 °C; measured in Fig.10; unless  
otherwise specified.  
SYMBOL  
PARAMETER  
output power  
CONDITIONS  
MIN.  
TYP. MAX. UNIT  
Po  
RL = 8 ; VP = ±20 V; note 2  
THD = 0.5%  
18  
20  
25  
W
W
THD = 10%  
22  
RL = 8 ; VP = ±25 V; note 2  
THD = 0.5%  
29  
36  
33  
40  
W
W
THD = 10%  
RL = 4 ; VP = ±15 V; note 2  
THD = 0.5%  
18  
22  
20  
25  
W
W
THD = 10%  
THD  
total harmonic distortion  
Po = 1 W; note 3  
fi = 1 kHz  
0.02  
0.15  
30  
0.05  
%
%
dB  
%
fi = 10 kHz  
Gv(cl)  
η
closed loop voltage gain  
efficiency  
29  
85  
31  
Po = 25 W; fi = 1 kHz; note 4  
operating; note 5  
90  
SVRR  
supply voltage ripple rejection  
fi = 100 Hz  
55  
50  
55  
80  
68  
dB  
dB  
dB  
dB  
kΩ  
fi = 1 kHz  
40  
mute; fi = 100 Hz; note 5  
standby; fi = 100 Hz; note 5  
Zi  
input impedance  
45  
Vn(o)  
noise output voltage  
operating  
Rs = 0 ; note 6  
Rs = 10 k; note 7  
mute; note 8  
note 9  
200  
230  
220  
70  
400  
µV  
µV  
µV  
dB  
dB  
µV  
dB  
αcs  
channel separation  
Gv  
channel unbalance  
1
Vo(mute)  
CMRR  
output signal in mute  
common mode rejection ratio  
note 10  
400  
Vi(CM) = 1 V (RMS)  
75  
Notes  
1. RsL is the series resistance of inductor of low-pass LC filter in the application.  
2. Output power is measured indirectly; based on RDSon measurement.  
3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a lower  
order low-pass filter a significantly higher value is found, due to the switching frequency outside the audio band.  
Maximum limit is guaranteed but may not be 100% tested.  
4. Output power measured across the loudspeaker load.  
5. Vripple = Vripple(max) = 2 V (p-p); Rs = 0 .  
6. B = 22 Hz to 22 kHz; Rs = 0 ; maximum limit is guaranteed, but may not be 100% tested.  
7. B = 22 Hz to 22 kHz; Rs = 10 k.  
2003 Mar 20  
14  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
8. B = 22 Hz to 22 kHz; independent of Rs.  
9. Po = 1 W; Rs = 0 ; fi = 1 kHz.  
10. Vi = Vi(max) = 1 V (RMS); maximum limit is guaranteed, but may not be 100% tested.  
15 DYNAMIC AC CHARACTERISTICS (MONO BTL APPLICATION)  
VP = ±15 V; RL = 8 ; fi = 1 kHz; fosc = 310 kHz; RsL < 0.1 (note 1); Tamb = 25 °C; measured in Fig.10; unless  
otherwise specified.  
SYMBOL  
PARAMETER  
output power  
CONDITIONS  
MIN.  
TYP. MAX. UNIT  
Po  
RL = 8 ; VP = ±15 V; note 2  
THD = 0.5%  
37  
40  
50  
W
W
THD = 10%  
46  
THD  
total harmonic distortion  
Po = 1 W; note 3  
fi = 1 kHz  
0.015 0.05  
%
%
dB  
%
fi = 10 kHz  
0.02  
36  
Gv(cl)  
η
closed loop voltage gain  
efficiency  
35  
85  
37  
Po = 50 W; fi = 1 kHz; note 4  
operating; note 5  
90  
SVRR  
supply voltage ripple rejection  
fi = 100 Hz  
49  
44  
49  
80  
34  
dB  
dB  
dB  
dB  
kΩ  
fi = 1 kHz  
36  
mute; fi = 100 Hz; note 5  
standby; fi = 100 Hz; note 5  
Zi  
input impedance  
22  
Vn(o)  
noise output voltage  
operating  
Rs = 0 ; note 6  
Rs = 10 k; note 7  
mute; note 8  
note 9  
280  
300  
280  
560  
µV  
µV  
µV  
µV  
dB  
Vo(mute)  
CMRR  
output signal in mute  
500  
common mode rejection ratio  
Vi(CM) = 1 V (RMS)  
75  
Notes  
1. RsL is the series resistance of inductor of low-pass LC filter in the application.  
2. Output power is measured indirectly; based on RDSon measurement.  
3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a low  
order low-pass filter a significant higher value will be found, due to the switching frequency outside the audio band.  
Maximum limit is guaranteed but may not be 100% tested.  
4. Output power measured across the loudspeaker load.  
5. Vripple = Vripple(max) = 2 V (p-p); Rs = 0 .  
6. B = 22 Hz to 22 kHz; Rs = 0 ; maximum limit is guaranteed, but may not be 100% tested.  
7. B = 22 Hz to 22 kHz; Rs = 10 k.  
8. B = 22 Hz to 22 kHz; independent of Rs.  
9. Vi = Vi(max) = 1 V (RMS); fi = 1 kHz; maximum limit is guaranteed, but may not be 100% tested.  
2003 Mar 20  
15  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
16 APPLICATION INFORMATION  
16.1 BTL application  
2
RL  
× 2V × (1 tmin × fosc  
)
---------------------  
P
RL + 1.2  
BTL:  
P o(1%)  
=
---------------------------------------------------------------------------------------------  
2 × RL  
When using the power amplifier in a mono BTL application  
(for more output power), the inputs of both channels must  
be connected in parallel and the phase of one of the inputs  
must be inverted (see Fig.6). In principle the loudspeaker  
can be connected between the outputs of the two  
single-ended demodulation filters.  
Maximum current:  
2VP × (1 tmin × fosc  
)
I o(peak)  
=
should not exceed 4 A.  
--------------------------------------------------------  
RL + 1.2  
Legend:  
16.2 Pin MODE  
RL = load impedance  
For correct operation the switching voltage at pin MODE  
should be debounced. If pin MODE is driven by a  
mechanical switch an appropriate debouncing low-pass  
filter should be used. If pin MODE is driven by an  
electronic circuit or microcontroller then it should remain at  
the mute voltage level for at least 100 ms before switching  
back to the standby voltage level.  
fosc = oscillator frequency  
tmin = minimum pulse width (typical 190 ns)  
VP = single-sided supply voltage (so, if supply is ±30 V  
symmetrical, then VP = 30 V)  
Po(1%) = output power just at clipping  
Po(10%) = output power at THD = 10%  
Po(10%) = 1.25 × Po(1%)  
.
16.3 Output power estimation  
The output power in several applications (SE and BTL)  
can be estimated using the following expressions:  
16.4 External clock  
The minimum required symmetrical supply voltage for  
external clock application is ±15 V (equally, the minimum  
asymmetrical supply voltage for applications with an  
external clock is 30 V).  
2
RL  
× V × (1 tmin × fosc  
)
---------------------  
P
RL + 0.6  
SE: Po(1%)  
=
-----------------------------------------------------------------------------------------  
2 × RL  
When using an external clock the following accuracy of the  
duty cycle of the external clock has to be taken into  
account: 47.5% < δ < 52.5%.  
Maximum current:  
VP × (1 tmin × fosc  
)
I o(peak)  
=
should not exceed 4 A.  
-----------------------------------------------------  
RL + 0.6  
A possible solution for an external clock oscillator circuit is  
illustrated in Fig.8.  
V
DDA  
2 kΩ  
ASTAB−  
ASTAB+  
TRIGGER  
0−  
11  
0+  
10  
360 kHz 320 kHz  
4
5
6
CTC  
RTC  
V
HOP  
4.3 V  
1
2
3
DD  
14  
7
120 pF  
220  
HEF4047BT  
5.6 V  
nF  
V
9.1 kΩ  
SS  
RCTC  
8
9
12  
13  
+TRIGGER MR  
RETRIGGER  
GND  
CLOCK  
MBL468  
Fig.8 External oscillator circuit.  
16  
2003 Mar 20  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
16.5 Heatsink requirements  
In some applications it may be necessary to connect an  
external heatsink to the TDA8922. The determining factor  
is the 150 °C maximum junction temperature Tj(max) which  
cannot be exceeded. The expression below shows the  
relationship between the maximum allowable power  
dissipation and the total thermal resistance from junction  
to ambient:  
MBL469  
30  
handbook, halfpage  
P
diss  
(W)  
(1)  
20  
Tj(max) Tamb  
-----------------------------------  
Pdiss  
Rth(j-a)  
=
(2)  
10  
(3)  
(4)  
Pdiss is determined by the efficiency (η) of the TDA8922.  
The efficiency measured in the TDA8922 as a function of  
output power is given in Fig.19. The power dissipation can  
be derived as function of output power (see Fig.18).  
(5)  
0
0
20  
40  
60  
80  
T
100  
(°C)  
The derating curves (given for several values of the Rth(j-a)  
are illustrated in Fig.9. A maximum junction temperature  
)
amb  
Tj = 150 °C is taken into account. From Fig.9 the maximum  
allowable power dissipation for a given heatsink size can  
be derived or the required heatsink size can be determined  
at a required dissipation level.  
(1) Rth(j-a) = 5 K/W.  
(2) Rth(j-a) = 10 K/W.  
(3)  
Rth(j-a) = 15 K/W.  
(4) Rth(j-a) = 20 K/W.  
(5) Rth(j-a) = 35 K/W.  
Example 1:  
Po = 2 × 25 W into 8 Ω  
Tj(max) = 150 °C  
Fig.9 Derating curves for power dissipation as a  
function of maximum ambient temperature.  
Tamb = 60 °C  
Pdiss(tot) = 4.2 W (from Fig.18)  
The required Rth(j-a) = 21.4 K/W can be calculated.  
16.6 Output current limiting  
The Rth(j-a) of the TDA8922 in free air is 35 K/W; the Rth(j-c)  
of the TDA8922 is 1.3 K/W, thus a heatsink of 20.1 K/W is  
required for this example.  
To guarantee the robustness of the class-D amplifier the  
maximum output current which can be delivered by the  
output stage is limited. An overcurrent protection is  
included for each output power switch. When the current  
flowing through any of the power switches exceeds a  
defined internal threshold (e.g. in case of a short-circuit to  
the supply lines or a short-circuit across the load), the  
amplifier will shut down immediately and an internal timer  
will be started. After a fixed time (e.g. 100 ms) the amplifier  
is switched on again. If the requested output current is still  
too high the amplifier will switch-off again. Thus the  
amplifier will try to switch to the operating mode every  
100 ms. The average dissipation will be low in this  
situation because of this low duty cycle. If the overcurrent  
condition is removed the amplifier will remain operating.  
In actual applications, other factors such as the average  
power dissipation with music source (as opposed to a  
continuous sine wave) will determine the size of the  
heatsink required.  
Example 2:  
Po = 2 × 25 W into 4 Ω  
Tj(max) = 150 °C  
Tamb = 60 °C  
Pdiss(tot) = 5.5 W (from Fig.18)  
The required Rth(j-a) = 16.4 K/W.  
Because the duty cycle is low the amplifier will be switched  
off for a relatively long period of time which will be noticed  
as a so-called audio-hole; an audible interruption in the  
output signal.  
The Rth(j-a) of the TDA8922 in free air is 35 K/W; the Rth(j-c)  
of the TDA8922 is 1.3 K/W, thus a heatsink of 15.1 K/W is  
required for this example.  
2003 Mar 20  
17  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
To trigger the maximum current protection in the  
TDA8922, the required output current must exceed 4 A.  
This situation occurs in case of:  
16.7 Pumping effects  
The TDA8922 class-D amplifier is supplied by a  
symmetrical voltage (e.g VDD = +25 V and VSS = 25 V).  
When the amplifier is used in a SE configuration, a  
so-called ‘pumping effect’ can occur. During one switching  
interval, energy is taken from one supply (e.g. VDD), while  
a part of that energy is delivered back to the other supply  
line (e.g. VSS) and visa versa. When the voltage supply  
source cannot sink energy, the voltage across the output  
capacitors of that voltage supply source will increase:  
the supply voltage is pumped to higher levels. The voltage  
increase caused by the pumping effect depends on:  
Short-circuits from any output terminal to the supply  
lines (VDD or VSS  
)
Short-circuit across the load or speaker impedances or  
a load impedance below the specified values of  
4 and 8 .  
Even if load impedances are connected to the amplifier  
outputs which have an impedance rating of 4 , this  
impedance can be lower due to the frequency  
characteristic of the loudspeaker; practical loudspeaker  
impedances can be modelled as an RLC network which  
will have a specific frequency characteristic: the  
Speaker impedance  
Supply voltage  
impedance at the output of the amplifier will vary with the  
input frequency. A high supply voltage in combination with  
a low impedance will result in large current requirements.  
Audio signal frequency  
Capacitor value present on supply lines  
Source and sink currents of other channels.  
Another factor which must be taken into account is the  
ripple current which will also flow through the output power  
switches. This ripple current depends on the inductor  
values which are used, supply voltage, oscillator  
frequency, duty factor and minimum pulse width. The  
maximum available output current to drive the load  
impedance can be calculated by subtracting the ripple  
current from the maximum repetitive peak current in the  
output pin, which is 4 A for the TDA8922.  
The pumping effect should not cause a malfunction of  
either the audio amplifier and/or the voltage supply source.  
For instance, this malfunction can be caused by triggering  
of the undervoltage or overvoltage protection or unbalance  
protection of the amplifier.  
See the application notes (tbf) for a more detailed  
description of the implications of output current limiting.  
16.8 Reference design  
As a rule of thumb the following expressions can be used  
to determine the minimum allowed load impedance  
without generating audio holes:  
The reference design for a single-chip class-D audio  
amplifier using the TDA8922TH is illustrated in Fig.10.  
The Printed-Circuit Board (PCB) layout is shown in Fig.11.  
The Bill Of Materials (BOM) is given in Table 1.  
VP × (1 tmin × fosc  
)
Z ≥  
0.6 for SE application.  
-----------------------------------------------------  
ORM Iripple  
L
I
16.9 PCB information for HSOP24 package  
2VP × (1 tmin × fosc  
)
Z ≥  
1.2 for BTL application.  
--------------------------------------------------------  
L
The size of the PCB is 74.3 × 59.10 mm, dual sided 35 µm  
I
ORM Iripple  
copper with 121 metallized through holes.  
Where:  
The standard configuration has a symmetrical supply  
(typical ±20 V) with stereo SE outputs (typical 2 × 8 ).  
The PCB is also suitable for a mono BTL configuration  
(1 × 8 ) with symmetrical and asymmetrical supply.  
ZL = load impedance  
fosc = oscillator frequency  
tmin = minimum pulse width (typical 190 ns)  
It is possible to use several different output filter inductors  
such as 16RHBP or EP13 types to evaluate the  
performance against the price or size.  
VP = single-sided supply voltage  
(so, if the supply is ±30 V symmetrical, then VP = 30 V)  
IORM = maximum repetitive peak current in output pin;  
see also Chapter 9  
16.10 Classification  
Iripple = ripple current.  
The application shows optimized signal and EMI  
performance.  
See the application notes (tbf) for a more detailed  
description of the implications of output current limiting.  
2003 Mar 20  
18  
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egwidht  
L1  
BEAD  
+
25 V  
V
DD  
V
V
DDP  
SSP  
C1  
470 µF  
(3)  
R1  
C6  
100 nF  
10 kΩ  
C3  
47 µF  
GND  
(3)  
R2  
L2  
BEAD  
C7  
100 nF  
V
C2  
470 µF  
DDA  
9.1 kΩ  
V
R3  
39 kΩ  
SS  
25 V  
L3  
BEAD  
R4 39 kΩ  
V
DDA  
C4  
47 µF  
on  
S1  
mute  
off  
Z1  
5.6 V  
C8  
220 nF  
L4  
BEAD  
C5  
47 µF  
V
SSA  
V
SSA  
V
V
V
V
DDA  
SSA  
C12  
DDP  
SSP  
C15  
220 nF 100 nF  
C9  
220 nF  
R5  
30 kΩ  
C10  
100 nF  
C11  
C13  
100 nF  
C14  
220 nF 100 nF  
V
V
V
V
SSP1  
R6  
C16  
DDA1  
SSA1  
OSC  
MODE  
DDP1  
5.6 k470 nF  
C24  
560 pF  
+
IN1  
10  
12  
7
6
14  
17  
C28  
220 nF  
in 1  
8
SGND  
BOOT1  
C26  
470 nF  
C20  
330 pF  
R7  
5.6 kΩ  
15  
16  
+
OUT1  
C22  
15 nF  
IN1  
R10  
4.7 Ω  
R12  
22 Ω  
9
C30  
15 nF  
SE 4 Ω  
C17  
470 nF  
J1  
OUT1  
SGND1  
SGND2  
L5  
OUT1  
(2)  
11  
2
SGND  
27 µH  
(1)  
J3  
J4  
BTL 8 Ω  
SE 4 Ω  
TDA8922TH  
L6  
(4)  
J2  
27 µH  
OUT2  
OUT2  
C18  
21  
22  
470 nF  
C31  
15 nF  
C23  
15 nF  
+
IN2  
IN2  
R13  
22 Ω  
R11  
4.7 Ω  
5
R8  
5.6 kΩ  
C21  
330 pF  
BOOT2  
C27  
470 nF  
+
OUT2  
C29  
220 nF  
SGND  
C25  
560 pF  
in 2  
4
1
3
24  
V
18  
STABI  
C33  
47 pF  
13  
19  
23  
20  
R9  
C19  
V
V
PROT HW  
V
V
SSP2  
5.6 k470 nF  
SSA2  
DDA2  
SSD  
C32  
220 nF  
DDP2  
C38  
MGU997  
C34  
C37  
C35  
C36  
C39  
100 nF  
100 nF  
220 nF  
220 nF  
100 nF  
100 nF  
V
V
V
V
V
SSP  
SSP  
SSA  
DDA  
DDP  
Every decoupling to ground (plane) must be made as close as possible to the pin.  
(1) BTL: remove In2, R8, R9, C18, C19, C21 and close J3 and J4.  
To handle 20 Hz under all conditions in stereo SE mode, the external power supply  
(2) BTL: connect loudspeaker between OUT1+ and OUT2.  
needs to have a capacitance of at least 4700 µF per supply line; VP = ±27 V (max).  
(3) BTL: R1 and R2 are only required when an asymmetrical supply is used (VSS = 0 V).  
(4) In case of hum, close J1 and J2.  
Fig.10 Single-chip class-D audio amplifier application diagram (reference design for SE and BTL).  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
bnok,lfuapgedwith  
PCB version 4  
1-2002  
C1  
C2  
C35  
C21  
C38  
C3  
L6  
L5  
U1  
C8  
C20  
C11  
C14  
C33  
C5  
J4  
J3  
Z1  
C4  
C17 C16 C18  
L3 L1 L2 L4  
C27  
C26  
C19  
On  
S1  
Off  
+
+
Out1 V  
Out2  
GND V  
SS  
DD  
TDA8920/21/22/23/24TH  
state of D art  
In1  
In2  
Top silk screen  
Top copper  
C25  
C34  
R11  
R10  
C37  
C39  
C23  
C22  
C9  
C36  
C10  
C32  
R5  
C15  
C13  
C12  
C24  
R3  
R8  
R9 R7  
R6  
C30  
C31  
C7  
C6  
R12  
R13  
R2 R1  
R4  
J2  
J1  
C28 C29  
PHILIPS SEMICONDUCTORS  
Bottom silk screen  
MBL496  
Bottom copper  
Fig.11 Printed-circuit board layout for the TDA8922TH.  
20  
2003 Mar 20  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
16.11 Bill of materials for reference design  
Table 1 Single-chip class-D audio amplifier printed-circuit board (PCB version 4; 1-2002) for TDA8922TH  
(see Figs 10 and 11).  
BOM ITEM QUANTITY  
REFERENCE  
PART  
TDA8922TH  
DESCRIPTION  
1
2
3
4
5
6
7
8
9
1
2
2
1
2
4
1
1
2
U1  
Philips Semiconductors B.V.  
Farnell 152-396  
in1 and in2  
cinch inputs  
output connector  
supply connector  
27 µH  
out1 and out2  
Augat 5KEV-02  
V
DD, GND and VSS  
Augat 5KEV-03  
L6 and L5  
L1, L2, L3 and L4  
S1  
EP13 or 16RHBP  
BEAD  
Murata BL01RN1-A62  
Knitter ATE1E M-O-M  
BZX 79C5V6 DO-35  
PCB switch  
5V6  
Z1  
C1 and C2  
470 µF; 35 V  
Panasonic M series  
ECA1VM471  
10  
11  
12  
13  
3
6
C3, C4 and C5  
47 µF; 63 V  
Panasonic NHG series  
ECA1JHG470  
C16, C17, C18, C19, C26 and 470 nF; 63 V  
C27  
MKT EPCOS B32529-C474-K  
9
C8, C9, C11, C14, C28, C29, 220 nF; 63 V  
C32, C35 and C38  
SMD 1206  
10  
C6, C7, C10, C12, C13, C15, 100 nF; 50 V  
C34, C36, C37 and C39  
SMD 0805  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
2
4
2
1
2
1
1
1
4
2
2
2
C20 and C21  
C22, C23, C30 and C31  
C24, C25  
330 pF; 50 V  
15 nF; 50 V  
560 pF; 100 V  
47 pF; 25V  
SMD 0805  
SMD 0805  
SMD 0805  
SMD 0805  
SMD 0805  
SMD 1206  
C33  
R4 and R3  
R5  
39 k; 0.1 W  
30 k; 0.1 W  
R1  
10 k; 0.1 W; optional SMD 0805  
9.1 k; 0.1 W; optional SMD 0805  
R2  
R6, R7, R8 and R9  
R13 and R12  
R10 and R11  
J1 and J2  
5.6 k; 0.1 W  
22 ; 1 W  
SMD 0805  
SMD 2512  
SMD 1206  
4.7 ; 0.25 W  
solder dot jumpers for ground reference in case of hum  
(60 Hz noise)  
26  
27  
2
1
J3 and J4  
heatsink  
wire jumpers for BTL application  
30 mm SK400; OK for maximum music dissipation;  
1/8 Prated (2 × 75 W/8) in 2 × 4 at Tamb = 70 °C  
28  
1
printed-circuit board material 1.6 mm thick epoxy FR4 material, double sided 35 µm  
copper; clearances 300 µm; minimum copper track  
400 µm  
2003 Mar 20  
21  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
16.12 Curves measured in reference design  
The curves illustrated in Figs 30 and 31 show the effects  
of supply pumping when only one single-ended channel is  
driven with a low frequency signal; see Section 16.7.  
The curves illustrated in Figs 20 and 21 are measured with  
a specified load impedance. Spread in ZL (e.g. due to the  
frequency characteristics of the loudspeaker) can trigger  
the maximum current protection circuit; see Section 16.6.  
MGX324  
MGX327  
2
2
10  
10  
handbook, halfpage  
handbook, halfpage  
+
THD  
(%)  
N
+
THD  
(%)  
N
10  
10  
1
1
(1)  
1  
1  
(1)  
(2)  
10  
10  
10  
10  
10  
10  
(2)  
(3)  
2  
3  
2  
3  
2  
1  
2
2
3
4
5
10  
10  
1
10  
10  
10  
10  
10  
10  
10  
P
(W)  
f (Hz)  
o
i
2 × 8 SE; VP = ±20 V.  
(1) 10 kHz.  
2 × 8 SE; VP = ±20 V.  
(1) o = 10 W.  
(2) Po = 1 W.  
P
(2) 1 kHz.  
(3) 100 Hz.  
Fig.12 THD + N as a function of output power.  
Fig.13 THD + N as a function of input frequency.  
2003 Mar 20  
22  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
MGX325  
MGX328  
2
2
10  
10  
handbook, halfpage  
handbook, halfpage  
+
THD  
(%)  
N
+
THD  
(%)  
N
10  
10  
1
1
(1)  
1  
1  
(1)  
(2)  
10  
10  
10  
10  
10  
10  
(2)  
(3)  
2  
2  
3  
3  
2  
1  
2
2
3
4
5
10  
10  
1
10  
10  
10  
10  
10  
10  
10  
P
(W)  
f (Hz)  
o
i
2 × 4 SE; VP = ±15 V.  
(1) 10 kHz.  
2 × 4 SE; VP = ±15 V.  
(1) Po = 10 W.  
(2) 1 kHz.  
(2) Po = 1 W.  
(3) 100 Hz.  
Fig.14 THD + N as a function of output power.  
Fig.15 THD + N as a function of input frequency.  
MGX326  
MGX329  
2
2
10  
10  
handbook, halfpage  
handbook, halfpage  
+
+
THD  
(%)  
N
THD  
(%)  
N
10  
10  
1
1
1  
1  
10  
10  
10  
(1)  
(2)  
10  
10  
10  
(1)  
(2)  
2  
2  
(3)  
3  
3  
2
3
4
5
2  
1  
2
10  
10  
10  
10  
10  
10  
10  
1
10  
10  
f (Hz)  
P
(W)  
i
o
1 × 8 BTL; VP = ±15 V.  
(1) 10 kHz.  
1 × 8 BTL; VP = ±15 V.  
(1) Po = 10 W.  
(2) 1 kHz.  
(2) Po = 1 W.  
(3) 100 Hz.  
Fig.16 THD + N as a function of output power.  
Fig.17 THD + N as a function of input frequency.  
2003 Mar 20  
23  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
MGX332  
MGX333  
10  
100  
handbook, halfpage  
handbook, halfpage  
(1)  
(2)  
P
(3)  
η
(%)  
diss  
(W)  
8
80  
60  
40  
20  
6
(1)  
(2)  
4
(3)  
2
0
10  
0
0
2  
1  
2
20  
40  
60  
80  
100  
(W)  
10  
1
10  
10  
P
(W)  
P
o
o
fi = 1 kHz.  
(1) 2 × 4 SE, VP = ±15 V.  
(2) 2 × 8 SE, VP = ±20 V.  
(3) 1 × 8 BTL, VP = ±15 V.  
fi = 1 kHz.  
(1) 2 × 8 SE, VP = ±20 V.  
(2) 2 × 4 SE, VP = ±15 V.  
(3) 1 × 8 BTL, VP = ±15 V.  
Fig.18 Power dissipation as a function of output  
power.  
Fig.19 Efficiency as a function of output power.  
MGX336  
MGX337  
100  
100  
handbook, halfpage  
handbook, halfpage  
(1)  
P
P
o
o
(W)  
(W)  
80  
80  
(1)  
(3)  
60  
60  
40  
20  
0
(2)  
(3)  
40  
(2)  
20  
0
10  
15  
20  
25  
30  
35  
(V)  
10  
15  
20  
25  
30  
35  
(V)  
V
V
DD  
DD  
THD + N = 0.5%; fi = 1 kHz.  
(1) 1 × 8 BTL.  
THD + N = 10%; fi = 1 kHz.  
(1) 1 × 8 BTL.  
(2) 2 × 4 SE.  
(2) 2 × 4 SE.  
(3) 2 × 8 SE.  
(3) 2 × 8 SE.  
Fig.20 Output power as a function of supply  
voltage.  
Fig.21 Output power as a function of supply  
voltage.  
2003 Mar 20  
24  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
MGX331  
MGX330  
0
0
handbook, halfpage  
handbook, halfpage  
α
α
cs  
cs  
(dB)  
(dB)  
20  
20  
40  
60  
40  
60  
80  
(1)  
(2)  
(1)  
80  
(2)  
100  
100  
2
3
4
5
2
3
4
5
10  
10  
10  
10  
10  
10  
10  
10  
10  
10  
f (Hz)  
f (Hz)  
i
i
2 × 8 SE; VP = ±20 V.  
(1) Po = 1 W.  
2 × 4 SE; VP = ±15 V.  
(1) Po = 1 W.  
(2) Po = 10 W.  
(2) Po = 10 W.  
Fig.22 Channel separation as a function of input  
frequency.  
Fig.23 Channel separation as a function of input  
frequency.  
MGX340  
MGX341  
40  
40  
handbook, halfpage  
handbook, halfpage  
G
G
(dB)  
(dB)  
(1)  
35  
35  
(1)  
(2)  
30  
30  
(2)  
(3)  
(3)  
25  
25  
20  
10  
20  
10  
2
3
4
5
2
3
4
5
10  
10  
10  
10  
10  
10  
10  
10  
f (Hz)  
f (Hz)  
i
i
Vi = 100 mV; Rs = 5.6 k; Ci = 330 pF.  
(1) 1 × 8 BTL, VP = ±15 V.  
(2) 2 × 8 SE, VP = ±20 V.  
(3) 2 × 4 SE, VP = ±15 V.  
Vi = 100 mV; Rs = 0 k.  
(1) 1 × 8 BTL, VP = ±15 V.  
(2) 2 × 8 SE, VP = ±20 V.  
(3) 2 × 4 SE, VP = ±15 V.  
Fig.24 Gain as a function of input frequency.  
Fig.25 Gain as a function of input frequency.  
2003 Mar 20  
25  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
MGX338  
MGX339  
320  
100  
handbook, halfpage  
handbook, halfpage  
I
q
f
(mA)  
80  
clk  
(kHz)  
310  
60  
40  
20  
0
300  
290  
0
5
10  
15  
20  
25  
30  
35  
0
5
10  
15  
20  
25  
30  
35  
V
(V)  
V
(V)  
DD  
DD  
RL = .  
RL = .  
Fig.26 Quiescent current as a function of supply  
voltage.  
Fig.27 Clock frequency as a function of supply  
voltage.  
MGX346  
MGX347  
0
0
handbook, halfpage  
handbook, halfpage  
SVRR  
(dB)  
SVRR)  
(dB)  
20  
20  
(1)  
(1)  
40  
40  
(2)  
(3)  
(2)  
60  
60  
(3)  
80  
80  
100  
100  
2
3
4
5
10  
10  
10  
10  
10  
0
1
2
3
4
5
f (Hz)  
i
V
(V)  
ripple(p-p)  
VP = ±20 V; Vripple = 2 V (p-p) with respect to ground.  
(1) Both supply lines in phase.  
VP = ±20 V; Vripple with respect to ground (in phase).  
(1) fripple = 1 kHz.  
(2) Both supply lines in anti-phase.  
(3) One supply line rippled.  
(2) fripple = 100 Hz.  
(3) fripple = 10 Hz.  
Fig.28 SVRR as a function of input frequency.  
Fig.29 SVRR as a function of Vripple(p-p).  
2003 Mar 20  
26  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
MGX335  
MGX334  
10  
10  
handbook, halfpage  
V
handbook, halfpage  
V
ripple(p-p)  
(V)  
ripple(p-p)  
(V)  
8
8
6
4
2
0
6
(1)  
4
(1)  
(2)  
2
(2)  
0
10  
2  
1  
2
2
3
4
10  
1
10  
10  
10  
10  
10  
10  
P
(W)  
f (Hz)  
o
i
3000 µF per supply line; fi = 10 Hz.  
(1) 1 × 4 SE, VP = ±15 V.  
(2) 1 × 8 SE, VP = ±20 V.  
3000 µF per supply line.  
(1) Po = 10 W into 1 × 4 SE, VP = ±15 V.  
(2) Po = 10 W into 1 × 8 SE, VP = ±20 V.  
Fig.30 Supply voltage ripple as a function of output  
power.  
Fig.31 Supply voltage ripple as a function of input  
frequency.  
MGX342  
MGX344  
10  
150  
handbook, halfpage  
handbook, halfpage  
I
q
+
THD  
(%)  
N
(mA)  
120  
1
(1)  
90  
60  
30  
0
1  
2  
3  
10  
10  
10  
(2)  
(3)  
100  
200  
300  
400  
500  
(kHz)  
600  
100  
200  
300  
400  
500  
(kHz)  
600  
f
f
clk  
clk  
VP = ±20 V; Po = 1 W into 8 .  
(1) 10 kHz.  
VP = ±20 V; RL = .  
(2) 1 kHz.  
(3) 100 Hz.  
Fig.33 Quiescent current as a function of clock  
frequency.  
Fig.32 THD + N as a function of clock frequency.  
2003 Mar 20  
27  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
MGX345  
MGX343  
1000  
50  
handbook, halfpage  
handbook, halfpage  
V
P
res(rms)  
o
(mV)  
(W)  
40  
800  
600  
400  
200  
0
30  
20  
10  
0
100  
100  
200  
300  
400  
500  
(kHz)  
600  
200  
300  
400  
500  
(kHz)  
600  
f
f
clk  
clk  
VP = ±20 V; RL = 8 .  
VP = ±20 V; RL = 8 ; fi = 1 kHz; THD + N = 10%.  
Fig.34 PWM residual voltage as a function of clock  
frequency.  
Fig.35 Output power as a function of clock  
frequency.  
MGX349  
MGX348  
10  
120  
handbook, halfpage  
S/N  
handbook, halfpage  
V
o
(V)  
(dB)  
100  
1
1  
10  
(1)  
(2)  
80  
60  
40  
20  
0
2  
10  
3  
10  
4  
10  
5  
10  
6  
10  
2  
1  
2
3
0
1
2
3
4
5
6
10  
10  
1
10  
10  
10  
V
(V)  
P (W)  
o
MODE  
VP = ±20 V; Rs = 5.6 k.; filter: 20 kHz AES17  
(1) 2 × 8 SE.  
Vi = 100 mV; fi = 1 kHz.  
(2) 1 × 8 BTL.  
Fig.36 Output voltage as a function of mode  
selection voltage.  
Fig.36 Signal-to-noise ratio as a function of output  
power.  
2003 Mar 20  
28  
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ahdnbok,uflapegwidt  
V
DDP  
V
DDA  
V
V
DDA  
+25 V  
STABI PROT  
18 13  
V
V
V
DDP1  
DDA2  
DDA1  
DDP2  
23  
3
10  
14  
15  
16  
BOOT1  
OUT1  
R
FB  
IN1−  
9
8
RELEASE1  
SWITCH1  
ENABLE1  
DRIVER  
HIGH  
INPUT  
STAGE  
PWM  
MODULATOR  
V
in1  
CONTROL  
AND  
HANDSHAKE  
IN1+  
DRIVER  
LOW  
SGND1  
11  
mute  
SGND  
C
OSC  
STABI  
V
V
SSP1  
7
6
OSC  
V
SSA  
TEMPERATURE SENSOR  
CURRENT PROTECTION  
TDA8922TH  
R
OSCILLATOR  
MANAGER  
OSC  
DDP2  
MODE  
V
MODE  
mute  
mode  
22  
21  
BOOT2  
OUT2  
SGND  
0 V  
DRIVER  
HIGH  
ENABLE2  
2
5
SGND2  
SGND  
CONTROL  
AND  
IN2+  
SWITCH2  
HANDSHAKE  
INPUT  
STAGE  
PWM  
MODULATOR  
V
DRIVER  
LOW  
in2  
RELEASE2  
IN2−  
4
R
FB  
1
12  
24  
V
19  
17  
20  
V
V
V
V
HW  
SSP1  
SSP2  
SSA2  
SSA1  
SSD  
25 V  
V
V
V
SSA  
SSA  
SSA  
V
MGU998  
SSP  
Fig.37 Typical SE application schematic of TDA8922TH.  
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ahdnbok,uflapegwidt  
V
DDP  
V
DDA  
V
V
DDA  
+25 V  
STABI PROT  
12  
V
4
V
V
DDA2  
DDA1  
DDP2  
16  
DDP1  
9
20  
7
8
BOOT1  
OUT1  
R
FB  
IN1−  
3
RELEASE1  
SWITCH1  
ENABLE1  
DRIVER  
HIGH  
INPUT  
STAGE  
PWM  
MODULATOR  
V
in1  
CONTROL  
AND  
HANDSHAKE  
IN1+  
2
5
10  
DRIVER  
LOW  
SGND1  
mute  
SGND  
C
OSC  
STABI  
V
V
SSP1  
1
OSC  
V
SSA  
TEMPERATURE SENSOR  
CURRENT PROTECTION  
TDA8922J  
R
OSCILLATOR  
MANAGER  
OSC  
DDP2  
23  
MODE  
V
MODE  
mute  
mode  
15  
14  
BOOT2  
OUT2  
SGND  
0 V  
DRIVER  
HIGH  
ENABLE2  
SGND2 19  
SGND  
CONTROL  
AND  
IN2+ 22  
SWITCH2  
HANDSHAKE  
INPUT  
STAGE  
PWM  
MODULATOR  
V
DRIVER  
LOW  
in2  
RELEASE2  
IN221  
R
FB  
18  
6
17  
11  
13  
V
V
V
V
V
SSP1  
SSP2  
SSA2  
SSA1  
SSD  
25 V  
V
V
V
SSA  
SSA  
SSA  
V
MGU999  
SSP  
Fig.38 Typical SE application schematic of TDA8922J.  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
17 PACKAGE OUTLINES  
HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height  
SOT566-3  
E
A
D
x
X
c
E
H
y
2
v
M
A
E
D
1
D
2
12  
1
pin 1 index  
Q
A
A
2
(A )  
3
E
1
A
4
θ
L
p
detail X  
24  
13  
w M  
Z
b
p
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
max.  
(1)  
(2)  
(2)  
A
A
A
b
c
D
D
D
E
E
1
E
e
H
E
L
p
Q
v
w
x
y
Z
θ
UNIT  
2
3
4
p
1
2
2
8°  
0°  
+0.08 0.53 0.32  
0.04 0.40 0.23  
16.0 13.0 1.1 11.1 6.2  
15.8 12.6 0.9 10.9 5.8  
2.9  
2.5  
14.5 1.1  
13.9 0.8  
1.7  
1.5  
2.7  
2.2  
3.5  
3.2  
mm  
1
3.5  
0.35  
0.25 0.25 0.03 0.07  
Notes  
1. Limits per individual lead.  
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-01-30  
03-02-18  
SOT566-3  
2003 Mar 20  
31  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
DBS23P: plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm)  
SOT411-1  
non-concave  
D
h
x
D
E
h
view B: mounting base side  
A
2
d
A
A
5
4
β
E
2
B
j
E
E
1
L
2
L
L
3
1
L
c
2
Q
v M  
1
23  
e
m
e
w
M
1
Z
b
p
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
(1)  
(1)  
UNIT A  
A
A
b
c
D
d
D
E
e
e
e
E
E
E
j
L
L
L
L
3
m
Q
v
w
x
β
Z
2
4
5
p
h
1
2
h
1
2
1
2
4.6 1.15 1.65 0.75 0.55 30.4 28.0  
4.3 0.85 1.35 0.60 0.35 29.9 27.5  
12.2  
11.8  
10.15 6.2 1.85 3.6 14 10.7 2.4  
9.85 5.8 1.65 2.8 13 9.9 1.6  
1.43  
0.78  
2.1  
1.8  
6
mm  
12  
2.54 1.27 5.08  
4.3  
0.6 0.25 0.03 45°  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
98-02-20  
02-04-24  
SOT411-1  
2003 Mar 20  
32  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
18 SOLDERING  
18.3.2 WAVE SOLDERING  
18.1 Introduction  
Conventional single wave soldering is not recommended  
for surface mount devices (SMDs) or printed-circuit boards  
with a high component density, as solder bridging and  
non-wetting can present major problems.  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “Data Handbook IC26; Integrated Circuit Packages”  
(document order number 9398 652 90011).  
To overcome these problems the double-wave soldering  
method was specifically developed.  
There is no soldering method that is ideal for all IC  
packages. Wave soldering is often preferred when  
through-hole and surface mount components are mixed on  
one printed-circuit board. Wave soldering can still be used  
for certain surface mount ICs, but it is not suitable for fine  
pitch SMDs. In these situations reflow soldering is  
recommended.  
If wave soldering is used the following conditions must be  
observed for optimal results:  
Use a double-wave soldering method comprising a  
turbulent wave with high upward pressure followed by a  
smooth laminar wave.  
For packages with leads on two sides and a pitch (e):  
– larger than or equal to 1.27 mm, the footprint  
longitudinal axis is preferred to be parallel to the  
transport direction of the printed-circuit board;  
18.2 Through-hole mount packages  
18.2.1 SOLDERING BY DIPPING OR BY SOLDER WAVE  
The maximum permissible temperature of the solder is  
260 °C; solder at this temperature must not be in contact  
with the joints for more than 5 seconds. The total contact  
time of successive solder waves must not exceed  
5 seconds.  
– smaller than 1.27 mm, the footprint longitudinal axis  
must be parallel to the transport direction of the  
printed-circuit board.  
The footprint must incorporate solder thieves at the  
downstream end.  
The device may be mounted up to the seating plane, but  
the temperature of the plastic body must not exceed the  
specified maximum storage temperature (Tstg(max)). If the  
printed-circuit board has been pre-heated, forced cooling  
may be necessary immediately after soldering to keep the  
temperature within the permissible limit.  
For packages with leads on four sides, the footprint must  
be placed at a 45° angle to the transport direction of the  
printed-circuit board. The footprint must incorporate  
solder thieves downstream and at the side corners.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
18.2.2 MANUAL SOLDERING  
Apply the soldering iron (24 V or less) to the lead(s) of the  
package, either below the seating plane or not more than  
2 mm above it. If the temperature of the soldering iron bit  
is less than 300 °C it may remain in contact for up to  
10 seconds. If the bit temperature is between  
Typical dwell time is 4 seconds at 250 °C.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
300 and 400 °C, contact may be up to 5 seconds.  
18.3.3 MANUAL SOLDERING  
18.3 Surface mount packages  
Fix the component by first soldering two  
diagonally-opposite end leads. Use a low voltage (24 V or  
less) soldering iron applied to the flat part of the lead.  
Contact time must be limited to 10 seconds at up to  
300 °C. When using a dedicated tool, all other leads can  
be soldered in one operation within 2 to 5 seconds  
between 270 and 320 °C.  
18.3.1 REFLOW SOLDERING  
Typical reflow peak temperatures range from  
215 to 250 °C. The top-surface temperature of the  
packages should preferably be kept:  
below 220 °C for all the BGA packages and packages  
with a thickness 2.5mm and packages with a thickness  
<2.5 mm and a volume 350 mm3 so called thick/large  
packages  
below 235 °C for packages with a thickness <2.5 mm  
and a volume <350 mm3 so called small/thin packages.  
2003 Mar 20  
33  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
18.4 Suitability of IC packages for wave, reflow and dipping soldering methods  
SOLDERING METHOD  
WAVE  
REFLOW(2) DIPPING  
suitable(3)  
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable  
MOUNTING  
PACKAGE(1)  
Through-hole mount DBS, DIP, HDIP, SDIP, SIL  
suitable  
Surface mount  
suitable  
suitable  
DHVQFN, HBCC, HBGA, HLQFP, HSQFP,  
HSOP, HTQFP, HTSSOP, HVQFN, HVSON,  
SMS  
not suitable(4)  
PLCC(5), SO, SOJ  
suitable  
suitable  
LQFP, QFP, TQFP  
not recommended(5)(6) suitable  
not recommended(7)  
suitable  
SSOP, TSSOP, VSO, VSSOP  
Notes  
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy  
from your Philips Semiconductors sales office.  
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum  
temperature (with respect to time) and body size of the package, there is a risk that internal or external package  
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the  
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.  
3. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.  
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder  
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,  
the solder might be deposited on the heatsink surface.  
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.  
The package footprint must incorporate solder thieves downstream and at the side corners.  
6. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not  
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.  
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than  
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.  
2003 Mar 20  
34  
Philips Semiconductors  
Objective specification  
2 × 25 W class-D power amplifier  
TDA8922  
19 DATA SHEET STATUS  
DATA SHEET  
STATUS(1)  
PRODUCT  
STATUS(2)(3)  
LEVEL  
DEFINITION  
I
Objective data  
Development This data sheet contains data from the objective specification for product  
development. Philips Semiconductors reserves the right to change the  
specification in any manner without notice.  
II  
Preliminary data Qualification  
This data sheet contains data from the preliminary specification.  
Supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to change the specification without  
notice, in order to improve the design and supply the best possible  
product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips  
Semiconductors reserves the right to make changes at any time in order  
to improve the design, manufacturing and supply. Relevant changes will  
be communicated via a Customer Product/Process Change Notification  
(CPCN).  
Notes  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was  
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.  
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
20 DEFINITIONS  
21 DISCLAIMERS  
Short-form specification  
The data in a short-form  
Life support applications  
These products are not  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes in the products -  
including circuits, standard cells, and/or software -  
described or contained herein in order to improve design  
and/or performance. When the product is in full production  
(status ‘Production’), relevant changes will be  
Application information  
Applications that are  
communicated via a Customer Product/Process Change  
Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these  
products, conveys no licence or title under any patent,  
copyright, or mask work right to these products, and  
makes no representations or warranties that these  
products are free from patent, copyright, or mask work  
right infringement, unless otherwise specified.  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
2003 Mar 20  
35  
Philips Semiconductors – a worldwide company  
Contact information  
For additional information please visit http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.  
© Koninklijke Philips Electronics N.V. 2003  
SCA75  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
753503/01/pp36  
Date of release: 2003 Mar 20  
Document order number: 9397 750 10757  
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