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TDA 16846

型号：

TDA 16846

描述：

控制器的开关电源支持低功耗待机和功率因数校正[ Controller for Switch Mode Power Supplies Supporting Low Power Standby and Power Factor Correction ]

品牌：

INFINEON[ Infineon ]

页数：

28 页

PDF大小：

333 K

下载PDF手册
ICs for Consumer Electronics  
Controller for Switch Mode Power Supplies Supporting Low Power  
Standby and Power Factor Correction  
TDA 16846/TDA 16847  
Data Sheet 2000-01-14  
TDA 16846/TDA 16847  
Revision History:  
Current Version: 2000-01-14  
Previous Version: 1999-07-05  
Page  
Page  
Subjects (major changes since last revision)  
(in previous (in current  
Version)  
3
Version)  
3, 28  
P-DSO package added  
Edition 01.00  
Published by Infineon Technologies AG i. Gr.,  
St.-Martin-Strasse 53  
D-81541 München  
©
Infineon Technologies AG 2000  
All Rights Reserved.  
Attention please!  
The information herein is given to describe certain components and shall not be considered as warranted characteristics.  
Terms of delivery and rights to technical change reserved.  
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and  
charts stated herein.  
Infineon Technologiesis an approved CECC manufacturer.  
Information  
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office  
in Germany or our Infineon Technologies Representatives worldwide (see address list).  
Warnings  
Due to technical requirements components may contain dangerous substances. For information on the types in question please contact  
your nearest Infineon Technologies Office.  
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Tech-  
nologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect  
the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to  
support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other  
persons may be endangered.  
Controller for Switch Mode Power Supplies  
Supporting Low Power Standby and Power  
Factor Correction  
TDA 16846  
TDA 16847  
Preliminary Data  
Bipolar IC  
1
Overview  
1.1  
Features  
• Line Current Consumption with PFC  
• Low Power Consumption  
• Stable and Adjustable Standby Frequency  
• Very Low Start-up Current  
• Soft-Start for Quiet Start-up  
• Free usable Fault Comparators  
P-DIP-14-3  
P-DSO-14-3  
• Synchronization and Fixed Frequency Facility  
• Over- and Undervoltage Lockout  
• Switch Off at Mains Undervoltage  
• Temporary high power circuit (only TDA 16847)  
• Mains Voltage Dependent Fold Back Point Correction  
• Continuous Frequency Reduction with Decreasing Load  
• Adjustable and Voltage Dependent Ringing Suppression Time  
Type  
Ordering Code  
Q67000-A9377  
Q67000-A9378  
Q67006-A9430  
Q67006-A9412  
Package  
TDA 16846  
TDA 16847  
TDA 16846G  
TDA 16847G  
P-DIP-14-3  
P-DIP-14-3  
P-DSO-14-3  
P-DSO-14-3  
1.2  
Description  
The TDA 16846 is optimized to control free running or fixed frequency flyback converters  
with or without Power Factor Correction (Current Pump). To provide low power  
consumption at light loads, this device reduces the switching frequency continuously  
with load, towards an adjustable minimum (e. g. 20 kHz in standby mode). Additionally,  
the start up current is very low. To avoid switching stresses of the power devices, the  
power transistor is always switched on at minimum voltage. A special circuit is  
implemented to avoid jitter. The device has several protection functions: VCC over- and  
undervoltage, mains undervoltage, current limiting and 2 free usable fault comparators.  
Regulation can be done by using the internal error amplifier or an opto coupler feedback  
(additional input). The output driver is ideally suited for driving a power MOSFET, but it  
can also be used for a bipolar transistor. Fixed frequency and synchronized operation  
are also possible.  
Data Sheet  
3
2000-01-14  
TDA 16846  
TDA 16847  
The TDA 16846 is suited for TV-, VCR- sets and SAT receivers. It also can be good used  
in PC monitors.  
The TDA 16847 is identical with TDA 16846 but has an additional power measurement  
output (pin 8) which can be used for a Temporary High Power Circuit.  
OTC  
PCS  
RZI  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
VCC  
OUT  
GND  
PVC  
SRC  
OCI  
FC1  
FC2  
SYN  
REF  
8
N.C./PMO  
AEP02647  
Figure 1  
1.3  
Pin Configuration (top view)  
Pin Definitions and Functions  
Symbol Function  
Pin  
1
OTC  
Off Time Circuit  
2
PCS  
RZI  
Primary Current Simulation  
3
Regulation and Zero Crossing Input  
Soft-Start and Regulation Capacitor  
Opto Coupler Input  
4
SRC  
OCI  
5
6
FC2  
Fault Comparator 2  
7
SYN  
N.C./PMO  
REF  
FC1  
Synchronization Input  
Not Connected (TDA 16846)/PMO (TDA 16847)  
Reference Voltage and Current  
Fault Comparator 1  
8
9
10  
11  
12  
13  
14  
PVC  
GND  
OUT  
VCC  
Primary Voltage Check  
Ground  
Output  
Supply Voltage  
Data Sheet  
4
2000-01-14  
TDA 16846  
TDA 16847  
1.4  
Pin  
1
Short Description of the Pin Functions  
Function  
A parallel RC-circuit between this pin and ground determines the ringing  
suppression time and the standby-frequency.  
2
3
A capacitor between this pin and ground and a resistor between this pin and  
the positive terminal of the primary elcap quantifies the max. possible output  
power of the SMPS.  
This is the input of the error amplifier and the zero crossing input. The output  
of a voltage divider between the control winding and ground is connected to  
this input. If the pulses at pin 3 exceed a 5 V threshold, the control voltage at  
pin 4 is lowered.  
4
5
This is the pin for the control voltage. A capacitor has to be connected  
between this pin and ground. The value of this capacitor determines the  
duration of the softstart and the speed of the control.  
If an opto coupler for the control is used, it’s output has to be connected  
between this pin and ground. The voltage divider at pin 3 has then to be  
changed, so that the pulses at pin 3 are below 5 V.  
6
7
Fault comparator 2: If a voltage > 1.2 V is applied to this pin, the SMPS stops.  
If fixed frequency mode is wanted, a parallel RC circuit has to be connected  
between this pin and ground. The RC-value determines the frequency. If  
synchronized mode is wanted, sync pulses have to be fed into this pin.  
8
9
Not connected (TDA 16846). / This is the power measurement output of the  
Temporary High Power Circuit. A capacitor and a RC-circuit has to be  
connected between this pin and ground (TDA 16847).  
Output for reference voltage (5 V). With a resistor between this pin and ground  
the fault comparator 2 (pin 6) is enabled.  
10  
11  
Fault comparator 1: If a voltage > 1 V is applied to this pin, the SMPS stops.  
This is the input of the primary voltage check. The voltage at the anode of the  
primary elcap has to be fed to this pin via a voltage divider. If the voltage of  
this pin falls below 1 V, the SMPS is switched off. A second function of this pin  
is the primary voltage dependent fold back point correction (only active in free  
running mode).  
12  
13  
Common ground.  
Output signal. This pin has to be connected across a serial resistor with the  
gate of the power transistor.  
14  
Connection for supply voltage and startup capacitor. After startup the supply  
voltage is produced by the control winding of the transformer and rectified by  
an external diode.  
Data Sheet  
5
2000-01-14  
TDA 16846  
TDA 16847  
1.5  
Block Diagrams  
PVC  
11  
D4  
R4  
Fold Back Point Correction  
7
SYN  
R6 x 1/3  
Primary  
KSY  
Voltage  
Check  
-
+
-
R7  
PVA  
-
+
+
R6  
5 V  
D5  
30 k  
Ω
1 V  
R8  
R3  
1.5 V  
75 k  
Ω
15 kΩ  
-
Control Voltage  
Off Time  
Comparator  
3.5 V  
VCC  
G1  
+
Limit  
1
2 V  
5 V  
+
-
9
8
6
ED2  
1
REF  
N.C.  
FC2  
OTC  
RZI  
CS1  
RSTC/RSTF  
G4  
+
-
1
Error  
Amplifier  
3.5 V  
R2  
Error-  
Flipflop  
D2  
FC2  
1.2 V  
+
-
3
S
Q
R
D3  
Buffer for  
Control Voltage  
4
5
SRC  
OCI  
+
+
-
On Time  
Flipflop  
R1  
20 k  
Output  
Driver  
&
On Time  
Comparator  
G3  
&
Ω
S
Q
R
13  
-
+
OUT  
G2  
5 V  
2
PCS  
I1  
ED1  
Zero Crossing  
Signal  
1.5 V  
D1  
< 25 mV  
Startup  
Diode  
Supply  
Voltage  
Comparator  
FC1  
-
+
Overvoltage  
Comparator  
1 V  
14  
12  
VCC  
+
-
+
-
16 V  
15/8 V  
GND  
10  
FC1  
AEB02648  
1) The input with the lower voltage becomes operative  
Figure 2  
TDA 16846  
Data Sheet  
6
2000-01-14  
TDA 16846  
TDA 16847  
PVC  
11  
D4  
R4  
Fold Back Point Correction  
7
SYN  
R6 x 1/3  
Primary  
KSY  
Voltage  
Check  
-
+
-
R7  
PVA  
-
+
+
R6  
5 V  
D5  
30 k  
Ω
1 V  
R8  
R3  
1.5 V  
75 k  
Ω
15 kΩ  
-
Control Voltage  
VCC  
Off Time  
Comparator  
3.5 V  
G1  
+
Limit  
9
8
1
S2  
2 V  
5 V  
REF  
+
-
ED2  
1
OTC  
RZI  
PMO  
CS1  
RSTC/RSTF  
G4  
6
+
-
FC2  
1
Error  
Amplifier  
3.5 V  
R2  
D2  
Error-  
Flipflop  
FC2  
1.2 V  
+
3
-
S
Q
R
D3  
Buffer for  
Control Voltage1)  
4
5
SRC  
OCI  
+
+
-
On Time  
Flipflop  
R1  
20 k  
Output  
Driver  
&
On Time  
Comparator  
G3  
&
Ω
S
Q
R
13  
-
+
OUT  
G2  
5 V  
2
PCS  
I1  
S1  
Discharge Time  
Flipflop  
ED1  
Zero  
Crossing  
Signal  
1.5 V  
S
Q
R
D1  
< 25 mV  
Startup  
Diode  
FC1  
-
+
Overvoltage  
Comparator  
Supply Voltage  
Comparator  
1 V  
14  
12  
VCC  
+
-
+
-
16 V  
15/8 V  
GND  
10  
FC1  
AEB02737  
1) The input with the lower voltage becomes operative  
Figure 3  
TDA 16847  
Data Sheet  
7
2000-01-14  
TDA 16846  
TDA 16847  
2
Functional Description  
Start Up Behaviour (Pin 14)  
When power is applied to the chip and the voltage V14 at Pin 14 (VCC) is less than the  
upper threshold (VON) of the Supply Voltage Comparator (SVC), input current I14 will be  
less than 100 µA. The chip is not active and driver output (Pin 13) and control output  
(Pin 4) will be actively held low. When V14 exceeds the upper SVC threshold (VON) the  
chip starts working and I14 increases. When V14 falls below the lower SVC threshold  
(VOFF) the chip starts again at his initial condition. Figure 4 shows the start-up circuit and  
Figure 5 shows the voltage V14 during start up. Charging of C14 is done by resistor R2 of  
the “Primary Current Simulation” (see later) and the internal diode D1, so no additional  
start up resistor is needed. The capacitor C14 delivers the supply current until the  
auxiliary winding of the transformer supplies the chip with current through the external  
diode D14.  
D14  
VCC  
C14  
14  
SVC  
TR  
D1  
C2  
PCS  
2
TDA 16846  
R2  
VOut  
Cp  
AES02649  
Figure 4  
Startup Circuit  
Data Sheet  
8
2000-01-14  
TDA 16846  
TDA 16847  
V
max  
V14  
VOn  
VOff  
Startup  
Operation  
t
AED02650  
Figure 5  
Startup Voltage Diagram  
Primary Current Simulation PCS (Pin 2) / Current Limiting  
A voltage proportional to the current of the power transistor is generated at Pin 2 by the  
RC-combination R2, C2 (Figure 4). The voltage at Pin 2 is forced to 1.5 V when the  
power transistor is switched off and during its switch on time C2 is charged by R2 from  
the rectified mains. The relation of V2 and the current in the power transistor (Iprimary) is  
:
L
primary × Iprimary  
V2 = 1,5 V+ -------------------------------  
R2 × C2  
L
primary: Primary inductance of the transformer  
The voltage V2 is applied to one input of the On Time Comparator ONTC (see Figure 2).  
The other input is the control voltage. If V2 exceeds the control voltage, the driver  
switches off (current limiting). The maximum value of the control voltage is the internal  
reference voltage 5 V, so the maximum current in the power transistor (IMprimary) is  
:
3,5 V × R2 × C2  
IMprimary = --------------------------------------  
Lprimary  
The control voltage can be reduced by either the Error Amplifier EA (current mode  
regulation), or by an opto coupler at Pin 5 (regulation with opto coupler isolation) or by  
the voltage V11 at Pin 11 (Fold Back Point Correction).  
Data Sheet  
9
2000-01-14  
TDA 16846  
TDA 16847  
Fold Back Point Correction PVC (Pin 11)  
V11 is deviated by a voltage divider from the rectified mains and reduces the limit of the  
possible current maximum in the power transistor if the mains voltage increases. I.e. this  
limit is independent of the mains (only active in free running mode). The maximum  
current (IMprimary) depending on the voltage V11 at Pin 11 is  
:
(4 V – V11 ⁄ 3) × R2 × C2  
IMprimary = ------------------------------------------------------------  
Lprimary  
Off-Time Circuit OTC (Pin 1)  
Figure 6 shows the Off-Time Circuit which determines the load dependent frequency  
course. When the driver switches off (Figure 7) the capacitor C1 is charged by current I1  
(approx. 1 mA) until the capacitor’s voltage reaches 3.5 V. The charge time TC1 is  
:
C1 × 1,5 V  
-------------------------  
TC1 ≈  
1mA  
For proper operation of the special internal anti jitter circuit, TC1 should have the same  
value as the resonance time “TR” of the power circuit (Figure 7). After charging C1 up to  
3.5 V the current source is disconnected and C1 is discharged by resistor R1. The voltage  
V1 at Pin 1 is applied to the Off-Time Comparator (OFTC). The other input of OFTC is  
the control voltage. The value of the control voltage at the input of OFTC is limited to a  
minimum of 2 V (for stable frequency at very light load). The On-Time Flip Flop (ONTF)  
is set, if the output of OFTC is high 1) and the voltage V3 at Pin 3 falls below 25 mV (zero  
crossing signal is high). This ensures switching on of the power transistor at minimum  
voltage. If no zero crossing signal is coming into pin 3, the power transistor is switched  
on after an additional delay until V1 falls below 1.5 V (see Figure 6, OFTCD). As long as  
V1 is higher than the limited control voltage, ONTF is disabled to suppress wrong zero  
crossings of V3, due to parasitic oscillations from the transformer after switch-off. The  
discharge time of C1 is a function of the control voltage.  
1)  
i.e. V1 is less than the limited control voltage.  
.
Control Voltage Output Power Off-time TD1  
1.5 - 2 V  
2 - 3.5 V  
3.5 - 5 V  
Low  
Constant (TD1MAX.), const. frequency stand by  
Decreasing  
Medium  
High  
Free running, switch-on at first minimum  
If the control voltage is below 2 V (at low output power) the “off-time” is maximum and  
constant  
TD1max ≈ 0,47 × R1 × C1  
Data Sheet  
10  
2000-01-14  
TDA 16846  
TDA 16847  
External  
Internal  
From SYNC  
1.5 V  
From Error FF  
OFTCD  
Control Voltage  
+
-
Limit  
2 V  
OFTC  
1
+
OTC  
1
Output  
Driver  
-
ONTF  
&
1
S
R
ED3  
ED2  
&
R1  
C1  
Q
I1  
2 V  
From ONTC  
From UVLO  
RSTC  
RSTC  
S
Q
+
-
R
Ringing Suppression Time  
Zero Crossing Signal  
ED1  
3.5 V  
RZI  
3
AES02651  
Figure 6  
Off-Time-Circuit  
Data Sheet  
11  
2000-01-14  
TDA 16846  
TDA 16847  
tR  
Power  
Trans.  
VDrain  
tC1  
tD1max  
3.5 V  
2 V  
V5  
V1  
0 V  
V13  
V3  
t
AED02652  
Figure 7  
Pulse Diagram of Off-Time-Circuit  
Figure 8 shows the converters switching frequency as a function of the output power.  
f
Conventional  
Free Running  
TDA 16846  
e.g. 20 kHz  
POUT  
AED02653  
Figure 8  
Load Dependant Frequency Course  
Data Sheet  
12  
2000-01-14  
TDA 16846  
TDA 16847  
Error Amplifier EA / Soft-Start (Pin 3, Pin 4)  
Figure 9 shows the simplified Error Amplifier circuit. The positive input of the Error  
Amplifier (EA) is the reference voltage 5 V. The negative input is the pulsed output  
voltage from the auxiliary winding, divided by R31 and R32. The capacitor C3 is  
dimensioned only for delaying zero crossings and smoothing the first spike after switch-  
off. Smoothing of the regulation voltage is done with the soft start capacitor C4 at Pin 4.  
During start up C4 is charged with a current of approx. 2 µA (Soft Start). Figure 10 shows  
the voltage diagrams of the Error Amplifier circuit.  
External  
Internal  
Error  
Amplifier  
TR  
C3  
R31  
5 V  
+
-
Down  
RZI  
3
4
R32  
C4  
VReg  
SRC  
AES02654  
Figure 9  
Error Amplifier  
VRef  
V3  
Down  
V4  
t
AED02655  
Figure 10  
Regulation Pulse Diagram  
Data Sheet  
13  
2000-01-14  
TDA 16846  
TDA 16847  
Fixed Frequency and Synchronization Circuit SYN (Pin 7)  
Figure 11 shows the Fixed Frequency and Synchronization Circuit. The circuit is  
disabled when Pin 7 is not connected. With R7 and C7 at Pin 7 the circuit is working. C7  
is charged fast by approx. 1 mA and discharged slowly by R7 (Figure 11). The power  
transistor is switched on at beginning of the charge phase. The switching frequency is  
(charge time ignored)  
:
1,18  
f ≈ --------------  
R7 × C7  
When the oscillator circuit is working the Fold Back Point Correction is disabled (not  
necessary in fixed frequency mode). “Switch on” is only possible when a “zero crossing”  
has occurred at Pin 3, otherwise “switch-on” will be delayed (Figure 12).  
External  
Internal  
OP1  
SYN  
7
-
+
OP1OUT  
R7  
C7  
30  
k
Ω
15 k  
Ω
Logic  
LO  
5 V  
75 k  
Ω
OUT 13  
RZI  
3
Zero Crossing Signal  
AES02656  
Figure 11  
Synchronization and Fixed Frequency Circuit  
Data Sheet  
14  
2000-01-14  
TDA 16846  
TDA 16847  
V
VTrans  
3.6 V  
V7  
1.5 V  
0.7 V  
RZI(3)  
t
AED02657  
Figure 12  
Pulse Diagram for Fixed Frequency Circuit  
Synchronization mode is also possible. The synchronization frequency must be higher  
than the oscillator frequency.  
External  
Internal  
9
7
470  
Ω
5 V  
SYN  
R7  
39 k  
C7  
1 nF  
Ω
SFH 6136  
AES02658  
Figure 13  
Ext. Synchronization Circuit  
Data Sheet  
15  
2000-01-14  
TDA 16846  
TDA 16847  
3
Protection Functions  
The chip has several protection functions:  
Current Limiting  
See “Primary Current Simulation PCS (Pin 2) / Current Limiting” and “Fold Back Point  
Correction PVC (Pin 11)”.  
Over- and Undervoltage Lockout OV/SVC (Pin 14)  
When V14 at Pin 14 exceeds 16 V, e. g. due to a fault in the regulation circuit, the Error  
Flip Flop ERR is set and the output driver is shut-down. When V14 goes below the lower  
SVC threshold, ERR is reset and the driver output (Pin 13) and the soft-start (Pin 4) are  
shut down and actively held low.  
Primary Voltage Check PVC (Pin 11)  
When the voltage V11 at Pin 11 goes below 1 V the Error Flip Flop (ERR) is set. E.g. a  
voltage divider from the rectified mains at Pin 11 prevents from high input currents at too  
low input voltage.  
Free Usable Fault Comparator FC1 (Pin 10)  
When the voltage at Pin 10 exceeds 1 V, the Error Flip Flop (ERR) is set. This can be  
used e. g. for mains overvoltage shutdown.  
Free Usable Fault Comparator FC2 (Pin 6)  
When the voltage at Pin 6 exceeds 1.2 V, the Error Flip Flop (ERR) is set. A resistor  
between Pin 9 (REF) and ground is necessary to enable this fault comparator.  
Voltage dependent Ringing Suppression Time  
During start-up and short-circuit operation, the output voltage of the converter is low and  
parasitic zero crossings are applied for a longer time at Pin 3. Therefore the Ringing  
Suppression Time TC1 (see “Off-Time Circuit OTC (Pin 1)”) is made longer with  
factor 2.5 at low output voltage. To ensure start-up of the circuit, the value of resistor R1  
(Pin 1, Figure 6) must be higher than 20 kΩ.  
Data Sheet  
16  
2000-01-14  
TDA 16846  
TDA 16847  
4
Temporary High Power Circuit FC2, PMO, REF  
(Pin 6, 8, 9, TDA 16847)  
Figure 14 shows the Temporary High Power Circuit:  
Internal  
External  
VCC  
9
8
REF  
CS2  
R9  
51 k  
Ω
I8  
R8  
PMO  
Discharge Time  
to Error Flipflop  
C8  
C6  
S2  
6
FC2  
1
+
-
R6  
10 M  
FC2  
Ω
1.2 V  
AEB02739  
Figure 14  
The Temporary High Power Circuit (THPC) consists of two parts:  
First a power measurement circuit is implemented: The capacitor C8 at Pin 8 is charged  
with a constant current I8 during the discharge time of the flyback transformer and  
connected to ground the other time. So the average of the sawtooth voltage V8 at Pin 8  
is proportional to the converters output power (at constant output voltages). The charge  
current I8 for C8 is dimensioned by the resistor R9 at Pin 9:  
I8 = 5 V/R9  
Data Sheet  
17  
2000-01-14  
TDA 16846  
TDA 16847  
Second a High Power Shutdown Comparator (FC2) is implemented: When the voltage  
V6 at Pin 6 exceeds 1.2 V the Error Flip Flop (ERR) is set. The output voltage of the  
power measurement circuit (Pin 8) is smoothed by R8/C6 and applied to the “high power  
shutdown” input at Pin 6. The relation between this voltage V6 and the output power of  
the converter P is approximately:  
V6 ≈ (P × LSecondary × 5 V)/(VOUT2 × C8 × R9)  
L
Secondary: The transformers secondary inductance  
OUT: The converters output voltage  
V
So the time constant of R9/C8 for a certain high power shutdown level PSD is:  
2
R9 × C8 ≈ (PSD × LSecondary × 4.2)/VOUT  
The converters high power shutdown level can be dimensioned lower (by R9, C8) than  
the current limit level (see “current limiting”). So because of the delay R8/C6, the  
converter can deliver maximum output power (current limit level) for a certain time (e. g.  
for power pulses like motor start current) and a power below the high power shutdown  
level for unlimited time. This has the advantage that the thermal dimensioning of the  
power devices is only needed for the lower power level. Once the voltage V6 exceeds  
1.2 V there are no more charge or discharge actions at Pin 8. The voltage V6 remains  
high due to the bias current out of HPC and the converter remains switched-off. Reset  
can be done by either plug-off the supply from the mains or with a high value resistor R6  
(Figure 14). R6 causes a reset every view seconds. When Pin 9 is not connected or gets  
too less current the temporary high power circuit is disabled.  
Data Sheet  
18  
2000-01-14  
TDA 16846  
TDA 16847  
5
Electrical Characteristics  
5.1  
Absolute Maximum Ratings  
All voltages listed are referenced to ground (0 V, VSS) except where noted.  
Parameter  
Symbol Limit Values Unit Remarks  
min.  
– 0.3  
– 0.3  
– 0.3  
max.  
17  
6
Supply Voltage at Pin 14  
VCC  
V
V
V
V
–
–
–
Voltage at Pin 1, 4, 5, 6, 7, 9, 10 –  
Voltage at Pin 2, 8, 11  
–
17  
6
Voltage at Pin 3  
Current into Pin 3  
RZI  
– 10  
– 1  
mA V3 < – 0.3 V  
Current into Pin 9  
Current into Pin 13  
REF  
OUT  
–
mA –  
100  
mA V13 > VCC  
mA V13 < 0 V  
– 100  
–
ESD Protection  
–
2
kV MIL STD 883C  
method 3015.6,  
100 pF, 1500 Ω  
Storage Temperature  
Tstg  
– 65  
– 25  
–
125  
125  
110  
°C  
°C  
–
–
Operating Junction Temperature TJ  
Thermal Resistance  
Junction-Ambient  
RthJA  
K/W P-DIP-14-3  
Soldering Temperature  
Soldering Time  
–
–
–
–
260  
10  
°C  
–
–
s
Note: Stresses above those listed here may cause permanent damage to the device.  
Exposure to absolute maximum rating conditions for extended periods may affect  
device reliability.  
Data Sheet  
19  
2000-01-14  
TDA 16846  
TDA 16847  
5.2  
Characteristics  
Unless otherwise stated, – 25 °C < Tj < 125 °C, VCC = 12 V  
Parameter  
Symbol  
Limit Values  
Unit Test Condition  
min. typ. max.  
Start-Up Circuit  
Supply current, OFF  
Supply current, ON  
Turn-ON threshold  
Turn-OFF threshold  
I14  
I14  
–
–
40  
5
100 µA 0 < VCC < V14  
ON  
8
mA Output low  
V14  
14.5 15  
7.5  
15.5 V  
8.5  
–
–
ON  
V14  
8
V
OFF  
Primary Current Simulation PCS (Pin 2) / Current Limiting  
Basic value  
Peak value  
On-time  
V2  
V2  
–
1.45 1.5  
1.55 V  
5.15 V  
I2 = 100 µA  
V11 = 1.2 V  
4.85  
9.0  
5
10.5 11.5 µs  
V11 = 1.2 V,  
C2 = 220 pF,  
I2 = 75 µA  
Bias current Pin 2  
–
– 1.0 – 0.3 –  
µA  
–
Fold Back Point Correction PVC (Pin 11)  
Peak value  
On-time  
V2  
3.8  
6.2  
4.1  
7.5  
4.3  
8.5  
V
V11 = 4.5 V  
–
µs  
V11 = 4.5 V,  
C2 = 220 pF,  
I2 = 75 µA  
Bias current Pin 11  
–
– 1.0 – 0.3 –  
µA  
–
Off-Time Circuit OTC (Pin 1)  
Charge current  
Charge current  
Peak value  
I1  
0.9  
1.1  
1.4  
mA V3 > 3 V  
I1  
0.35 0.5  
3.38 3.5  
0.65 mA V3 < 2 V  
V1  
V1  
3.62 V  
2.08 V  
–
–
Basic value  
1.92  
2
Data Sheet  
20  
2000-01-14  
TDA 16846  
TDA 16847  
5.2  
Characteristics (cont’d)  
Unless otherwise stated, – 25 °C < Tj < 125 °C, VCC = 12 V  
Parameter  
Symbol  
Limit Values  
Unit Test Condition  
min. typ. max.  
T12 Charge time  
TC1  
0.85 1.0  
1.3  
3.0  
80  
µs  
µs  
V3 > 3 V,  
C1 = 680 pF,  
R1 = 100 kΩ  
T13 Charge time  
TC1  
1.9  
2.4  
72  
V3 < 2 V,  
C1 = 680 pF,  
R1 = 100 kΩ  
Off-time  
TD1MAX. 65  
µs  
C1 = 680 pF,  
R1 = 100 kΩ  
Bias current Pin 1  
–
–
– 1.1 – 0.4 –  
µA  
–
Zero crossing threshold  
(Pin 3)  
15  
25  
35  
mV –  
Delay to switch-on  
Bias current Pin 3  
–
–
280  
– 2  
350  
480 ns  
–
– 1.2 –  
µA V3 < 25 mV  
Error Amplifier EA (Pin 3, Pin 4)  
Input threshold (Pin 3)  
Bias current Pin 3  
VEATH  
4.85  
–
5
5.15 V  
–
–
–
– 0.9 –  
µA V3 > 3 V  
Soft-start charge current  
(Pin 4)  
– 2.5 – 1.8 – 1.2 µA  
–
Opto Coupler Input (Pin 5)  
Input voltage range  
V5  
R1  
0.3  
15  
–
6
V
–
–
Pull high resistor to VREF  
20  
25  
kΩ  
Data Sheet  
21  
2000-01-14  
TDA 16846  
TDA 16847  
5.2  
Characteristics (cont’d)  
Unless otherwise stated, – 25 °C < Tj < 125 °C, VCC = 12 V  
Parameter  
Symbol  
Limit Values  
Unit Test Condition  
min. typ. max.  
Fixed Frequency and Synchronization Circuit SYN (Pin 7)  
Frequency  
–
78  
88  
98  
kHz C7 = 470 pF,  
R7 = 20 kΩ  
Charge current  
Upper threshold  
Lower threshold  
Charge time  
I7  
1.0  
3.5  
1.3  
3.6  
1.6  
3.7  
mA –  
V7  
V7  
–
V
–
–
–
–
–
1.43 1.5  
0.4 0.55 0.75 µs  
– 2.4 – 1.8 – 1.1 µA  
1.57 V  
Bias current Pin 7  
Input voltage range  
–
V7  
0.3  
–
6
V
V
Undervoltage Lockout SVC (Pin 14)  
Threshold  
V14  
7.5  
8
8.5  
–
OFF  
Overvoltage Lockout OV (Pin 14)  
Threshold  
V14 OV  
15.7 16.5 17  
V
V
–
–
Delta-OV-V14 ON  
–
0.5  
–
1
5
–
Primary Voltage Check PVC (Pin 11)  
Threshold  
V11  
0.95  
1.06 V  
–
Reference Voltage (Pin 9)  
Voltage at Pin 9  
V9  
I9  
4.8  
5.15 V  
I9 = 100 µA  
Current into Pin 9  
– 200 –  
0
µA VEATH(Pin 3)  
–
V9 < 50 mV  
Data Sheet  
22  
2000-01-14  
TDA 16846  
TDA 16847  
5.2  
Characteristics (cont’d)  
Unless otherwise stated, – 25 °C < Tj < 125 °C, VCC = 12 V  
Parameter  
Symbol  
Limit Values  
Unit Test Condition  
min. typ. max.  
Fault Comparator FC2 (Pin 6)  
HPC Threshold  
V6  
1.12 1.2  
1.28 V  
–
–
Bias Current Pin 6  
–
– 1.0 – 0.3 0.1  
µA  
Fault Comparator FC1 (Pin 10)  
Threshold  
V10  
0.95  
1
1.06 V  
1.2 µA  
–
–
Bias current Pin 10  
–
0.48 0.9  
Power Measurement Output PMO (Pin 8, only TDA 16847)  
Charge current Pin 8  
I8  
– 110 – 100 – 90 µA I9 = – 100 µA  
Output Driver OD (Pin 13)  
Output voltage low state  
Output voltage high state  
V13  
V13  
V13  
1.1  
9.2  
0.8  
1.8  
10  
2.4  
11  
V
V
V
I13 = 100 mA  
low  
I13 = – 100 mA  
high  
aclow  
Output voltage during low  
supply voltage  
1.8  
2.5  
I13 = – 10 mA,  
V14 increasing:  
0 < V14 < V14  
ON  
V14 decreasing:  
0 < V14 < V14  
OFF  
Rise time  
Fall time  
–
–
70  
30  
110  
50  
180 ns  
80 ns  
C13 = 10 nF,  
V13 = 2 … 8 V  
C13 = 10 nF,  
V13 = 2 … 8 V  
Note: The listed characteristics are ensured over the operating range of the integrated  
circuit. Typical characteristics specify mean values expected over the production  
spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and  
the given supply voltage.  
Data Sheet  
23  
2000-01-14  
TDA 16846  
TDA 16847  
4
3
1
2
R62  
820  
R61  
Ω
C61  
10 nF  
R63  
C62  
1 nF  
1 k  
Ω
IC 02  
SFH 617 A-2  
100 k  
Ω
C26  
22 µF  
D26  
1N4148  
R60  
C25  
C28  
2.2 k  
P60  
Ω
R65  
100 k  
14  
4
5
3
Ω
500  
Ω
R38  
10 nF  
4.7 nF  
R24  
D41  
MUR4100  
TR1  
(AL = 190 nH)  
9.1 k  
Ω
11  
R29  
9.1 k  
V1  
100 V  
18 k  
Ω
Ω
IC1  
TDA 16846  
C24  
C22  
150 pF  
C41  
220 µF  
7 Turns  
52 Turns  
P
21k0Ω  
1 nF  
R23  
6, 10, 12  
1
D42  
MUR120  
3.9 MΩ  
V2  
16 V  
C30  
1.5 nF  
R22  
R30  
56 kΩ  
C42  
470  
9 Turns  
1 MΩ  
µF  
C22  
N.C.  
2
8
9
13  
7
560 pF  
C9  
220 pF  
D9  
MUR4100  
D43  
MUR120  
T1  
V3  
R35  
8.5 V  
SPP (0.6  
N6055  
Ω )  
C
10 nF  
C43  
8
15  
Ω
54 Turns  
5 Turns  
470 µF  
D8  
STTA506D  
L8  
2 mH  
D1-D4  
4 x BYW 76  
R5  
5.1 k  
C5  
C7  
150  
Ω
µF/450 V  
1 nF  
RFI Filter  
180-270 V  
C10  
1 nF  
R10  
4.7 MΩ  
F1  
3.15 A  
AES02659  
Figure 15  
Circuit Diagram for Application with PFC  
Data Sheet  
24  
2000-01-14  
TDA 16846  
TDA 16847  
D26  
1N4148  
C26  
22  
µF  
C25  
14  
4
5
3
R38  
10 nF  
R24  
D41  
MUR4100  
TR1  
(AL = 190 nH)  
9.1 k  
Ω
11  
R29  
9.1 k  
V1  
100 V  
18 k  
Ω
Ω
IC1  
TDA 16846  
C24  
C22  
150 pF  
C41  
7 Turns  
52 Turns  
220 µF  
P
21k0Ω  
1 nF  
R23  
6, 10, 12  
1
D42  
MUR120  
3.9 MΩ  
V2  
16 V  
C30  
1.5 nF  
R22  
R30  
56 kΩ  
C42  
470  
9 Turns  
1 MΩ  
µF  
C22  
N.C.  
2
8
9
13  
7
680 pF  
C9  
220 pF  
D43  
MUR120  
T1  
V3  
R35  
8.5 V  
SPP (1.4  
N6055  
Ω )  
C43  
470  
15  
Ω
77 Turns  
5 Turns  
D10  
BA1 59  
µF  
D11  
D1-D4  
4 x 1N4007  
C7  
150  
µF/385 V  
RFI Filter  
180-270 V  
C10  
1 nF  
R10  
4.7 MΩ  
F1  
3.15 A  
AES02660  
Figure 16  
Circuit Diagram for Standard Application  
Data Sheet  
25  
2000-01-14  
TDA 16846  
TDA 16847  
1N4148  
D26  
C26  
22  
µF  
C25  
14  
4
5
3
R38  
10 nF  
R24  
D41  
MUR4100  
TR1  
(AL = 190 nH)  
9.1 k  
Ω
11  
R29  
9.1 k  
V1  
100 V  
18 k  
Ω
Ω
C24  
C22  
150 pF  
C41  
7 Turns  
52 Turns  
220 µF  
IC1  
TDA 16847  
P
21k0Ω  
1 nF  
R23  
10, 12  
1
D42  
MUR120  
3.9 MΩ  
V2  
C30  
1.5 nF  
16 V  
R30  
56 k  
R22  
C42  
470  
Ω
9 Turns  
1 MΩ  
7
9
µF  
C22  
R32  
2
8
6
13  
680 pF  
51 k Ω  
C9  
220 pF  
D43  
MUR120  
T1  
V3  
R33  
R35  
8.5 V  
SPP (1.4  
N6055  
Ω )  
C43  
470  
1 M  
Ω
15 Ω  
C31  
77 Turns  
5 Turns  
D10  
BA 159  
µF  
C32  
4.7 µF  
100 pF  
D11  
D1-D4  
4 x 1N4007  
C7  
150  
µF/385 V  
RFI Filter  
180-270 V  
C10  
1 nF  
R10  
4.7 MΩ  
F1  
3.15 A  
AES02738  
Figure 17  
Circuit Diagram for Application with Temporary High Power Circuit  
Data Sheet  
26  
2000-01-14  
TDA 16846  
TDA 16847  
Package Outlines  
P-DIP-14-3  
(Plastic Dual In-line Package)  
Sorts of Packing  
Package outlines for tubes, trays etc. are contained in our  
Data Book "Package Information".  
Dimensions in mm  
2000-01-14  
Data Sheet  
27  
TDA 16846  
TDA 16847  
P-DSO-14-3  
(Plastic Dual In-line Package)  
Sorts of Packing  
Package outlines for tubes, trays etc. are contained in our  
Data Book "Package Information".  
Dimensions in mm  
2000-01-14  
Data Sheet  
28  
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