NX2124/2124A
HCON =IOUT2 ´ D´ RDS(ON) ´ K
LCON=IOUT2 ´ (1- D)´ RDS(ON) ´ K
PTOTAL =P + P
360mV
P
ISET
=
K ´ RDSON
P
...(20)
If MOSFET RDSON=9mW, the worst case thermal
consideration K=1.5, then
HCON
LCON
where the RDS(ON) will increases as MOSFET junc-
tion temperature increases, K is RDS(ON) temperature
dependency. As a result, RDS(ON) should be selected for
the worst case, in which K approximately equals to 1.4
at 125oC according to IRFR3706 datasheet. Conduc-
tion loss should not exceed package rating or overall
system thermal budget.
320mV
360mV
ISET
=
=
= 26.7A
K ´ RDSON 1.5´ 9mW
Layout Considerations
The layout is very important when designing high
frequency switching converters. Layout will affect noise
pickup and can cause a good design to perform with
less than expected results.
Switching loss is mainly caused by crossover con-
duction at the switching transition. The total switching
loss can be approximated.
There are two sets of components considered in
the layout which are power components and small sig-
nal components. Power components usually consist of
input capacitors, high-side MOSFET, low-side MOSFET,
inductor and output capacitors. A noisy environment is
generated by the power components due to the switch-
ing power. Small signal components are connected to
sensitive pins or nodes. A multilayer layout which in-
cludes power plane, ground plane and signal plane is
recommended .
1
PSW
=
´ V ´ IOUT ´ TSW ´ F
IN S
...(21)
2
where IOUT is output current, TSW is the sum of TR
and TF which can be found in mosfet datasheet, and FS
is switching frequency. Switching loss PSW is frequency
dependent.
Also MOSFET gate driver loss should be consid-
ered when choosing the proper power MOSFET.
MOSFET gate driver loss is the loss generated by dis-
charging the gate capacitor and is dissipated in driver
circuits.It is proportional to frequency and is defined as:
Layout guidelines:
1. First put all the power components in the top
layer connected by wide, copper filled areas. The input
capacitor, inductor, output capacitor and the MOSFETs
should be close to each other as possible. This helps to
reduce the EMI radiated by the power loop due to the
high switching currents through them.
Pgate = (QHGATE ´ VHGS + QLGATE ´ VLGS )´ FS
...(22)
where QHGATE is the high side MOSFETs gate
charge,QLGATE is the low side MOSFETs gate charge,VHGS
is the high side gate source voltage, and VLGS is the low
side gate source voltage.
This power dissipation should not exceed maxi-
mum power dissipation of the driver device.
2. Low ESR capacitor which can handle input RMS
ripple current and a high frequency decoupling ceramic
cap which usually is 1uF need to be practically touch-
ing the drain pin of the upper MOSFET, a plane connec-
tion is a must.
Over Current Limit Protection
Over current Limit for step down converter is
achieved by sensing current through the low side
MOSFET. For NX2124, the current limit is decided by
the RDSON of the low side mosfet. When synchronous
FET is on, and the voltage on SW pin is below 360mV,
the over current occurs. The over current limit can be
calculated by the following equation.
3. The output capacitors should be placed as close
as to the load as possible and plane connection is re-
quired.
4. Drain of the low-side MOSFET and source of
the high-side MOSFET need to be connected thru a plane
ans as close as possible.A snubber nedds to be placed
as close to this junction as possible.
5. Source of the lower MOSFET needs to be con-
Rev.1.8
02/28/08
13
