NX2138
finised and FB pin voltage is over 90% of VREF, the
PGOOD pin is pulled to high after a 1.6ms delay.
should be close to each other as possible. This helps
to reduce the EMI radiated by the power loop due to
the high switching currents through them.
Smart Over Output Voltage Protection
Active loads in some applications can leak cur-
rent from a higher voltage than VOUT, cause output volt-
age to rise. When the FB pin voltage is sensed over
112% of VREF, the high side MOSFET will be turned off
and low side MOSFET will be turned on to discharge
the VOUT. NX2138 resumes its switching operation after
2. Low ESR capacitor which can handle input
RMS ripple current and a high frequency decoupling
ceramic cap which usually is 1uF need to be practi-
cally touching the drain pin of the upper MOSFET, a
plane connection is a must.
3. The output capacitors should be placed as close
as to the load as possible and plane connection is re-
quired.
FB pin voltage drops to VREF
.
If FB pin voltage keeps rising and is sensed over
125% of VREF, the low side MOSFET will be latched to
be on to discharge the output voltage and over voltage
protection is triggered. To resume the switching opera-
tion, resetting voltage on pin VCC or pin EN is neces-
sary.
4. Drain of the low-side MOSFET and source of
the high-side MOSFET need to be connected thru a
plane and as close as possible. A snubber needs to be
placed as close to this junction as possible.
5. Source of the lower MOSFET needs to be con-
nected to the GND plane with multiple vias. One is not
enough. This is very important. The same applies to
the output capacitors and input capacitors.
6. Hdrv and Ldrv pins should be as close to
MOSFET gate as possible. The gate traces should be
wide and short. A place for gate drv resistors is needed
to fine tune noise if needed.
Under Output Voltage Protection
Typically when the FB pin voltage is under 70%
of VREF, the high side and low side MOSFET will be
turned off. To resume the switching operation, VCC or
ENSW has to be reset.
7. Vcc capacitor, BST capacitor or any other by-
passing capacitor needs to be placed first around the
IC and as close as possible. The capacitor on comp to
GND or comp back to FB needs to be place as close to
the pin as well as resistor divider.
Layout Considerations
The layout is very important when designing high
frequency switching converters. Layout will affect noise
pickup and can cause a good design to perform with
less than expected results.
8. The output sense line which is sensing output
back to the resistor divider should not go through high
frequency signals, should be kept away from the in-
ductor and other noise sources. The resistor divider
must be located as close as possible to the FB pin of
the device.
There are two sets of components considered in
the layout which are power components and small sig-
nal components. Power components usually consist of
input capacitors, high-side MOSFET, low-side
MOSFET, inductor and output capacitors. A noisy en-
vironment is generated by the power components due
to the switching power. Small signal components are
connected to sensitive pins or nodes. A multilayer lay-
out which includes power plane, ground plane and sig-
nal plane is recommended .
9. All GNDs need to go directly thru via to GND
plane.
10. In multilayer PCB, separate power ground
and analog ground. These two grounds must be con-
nected together on the PC board layout at a single point.
The goal is to localize the high current path to a sepa-
rate loop that does not interfere with the more sensi-
tive analog control function.
Layout guidelines:
1. First put all the power components in the top
layer connected by wide, copper filled areas. The input
capacitor, inductor, output capacitor and the MOSFETs
Rev. 1.6
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