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2SK2413

型号：

2SK2413

描述：

切换N沟道功率MOS FET工业用[ SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE ]

品牌：

NEC[ NEC ]

页数：

8 页

PDF大小：

122 K

下载PDF手册
DATA SHEET  
MOS FIELD EFFECT TRANSISTOR  
2SK2413  
SWITCHING  
N-CHANNEL POWER MOS FET  
INDUSTRIAL USE  
DESCRIPTION  
PACKAGE DIMENSIONS  
The 2SK2413 is N-Channel MOS Field Effect Transistor de-  
signed for high speed switching applications.  
(in millimeter)  
FEATURES  
4.5 ±±.ꢀ  
• Low On-Resistance  
8.± ±±.ꢀ  
RDS(on)1 = 70 mΩ MAX. (@ VGS = 10 V, ID = 5.0 A)  
RDS(on)2 = 95 mΩ MAX. (@ VGS = 4 V, ID = 5.0 A)  
• Low Ciss  
Ciss = 860 pF TYP.  
• Built-in G-S Gate Protection Diodes  
• High Avalanche Capability Ratings  
1
ꢀ 3  
QUALITY GRADE  
Standard  
1.4 ±±.ꢀ  
±.5 ±±.1  
1.4 ±±.ꢀ  
±.5 ±±.1  
Pleasereferto"QualitygradeonNECSemiconductorDevices"(Document  
number IEI-1209) published by NEC Corporation to know the  
specification of quality grade on the devices and its recommended  
±.5 ±±.1  
applications.  
1. Gate  
ꢀ. Drain  
3. Source  
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)  
Drain to Source Voltage  
Gate to Source Voltage  
Drain Current (DC)  
VDSS  
60  
V
V
MP-10 (ISOLATED TO-220)  
VGSS  
±20  
±10  
±40  
1.8  
ID(DC)  
ID(pulse)  
A
Drain  
Drain Current (pulse)*  
A
Total Power Dissipation (TA = 25 ˚C) PT  
W
˚C  
Channel Temperature  
Tch  
Tstg  
IAS  
150  
Body  
Diode  
Gate  
Storage Temperature  
–55 to +150 ˚C  
Single Avalanche Current**  
Single Avalanche Energy**  
10  
10  
A
Gate Protection  
EAS  
mJ  
Diode  
Source  
*
PW ≤ 10 µs, Duty Cycle ≤ 1 %  
** Starting Tch = 25 ˚C, RG = 25 Ω, VGS = 20 V → 0  
The information in this document is subject to change without notice.  
Document No. TC-2494  
(O. D. No. TC-8032)  
Date Published November 1994  
Printed in Japan  
P
1994  
©
2SK2413  
ELECTRICAL CHARACTERISTICS (TA = 25 ˚C)  
CHARACTERISTIC  
Drain to Source On-Resistance  
Drain to Source On-Resistance  
Gate to Source Cutoff Voltage  
Forward Transfer Admittance  
Drain Leakage Current  
Gate to Source Leakage Current  
Input Capacitance  
SYMBOL  
RDS(on)1  
RDS(on)2  
VGS(off)  
| yfs |  
IDSS  
MIN.  
TYP.  
50  
MAX.  
70  
UNIT  
mΩ  
mΩ  
V
TEST CONDITIONS  
VGS = 10 V, ID = 5.0 A  
VGS = 4 V, ID = 5.0 A  
VDS = 10 V, ID = 1 mA  
VDS = 10 V, ID = 5.0 A  
VDS = 60 V, VGS = 0  
VGS = ±20 V, VDS = 0  
VDS = 10 V  
70  
95  
1.0  
7.0  
1.6  
12  
2.0  
S
µA  
µA  
pF  
pF  
pF  
ns  
±10  
±10  
IGSS  
Ciss  
860  
440  
110  
15  
Output Capacitance  
Coss  
VGS = 0  
Reverse Transfer Capacitance  
Turn-On Delay Time  
Crss  
f = 1 MHz  
td(on)  
tr  
ID = 5.0 A  
Rise Time  
90  
ns  
VGS(on) = 10 V  
Turn-Off Delay Time  
td(off)  
tf  
75  
ns  
VDD = 30 V  
Fall Time  
30  
RG = 10 Ω  
ns  
Total Gate Charge  
QG  
24  
nC  
nC  
nC  
V
ID = 20 A  
Gate to Source Charge  
Gate to Drain Charge  
QGS  
3.0  
6.0  
1.0  
95  
VDD = 48 V  
QGD  
VF(S-D)  
trr  
VGS = 10 V  
Body Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
IF = 10 A, VGS = 0  
IF = 10 A, VGS = 0  
di/dt = 100 A/µs  
ns  
Qrr  
250  
nC  
Test Circuit 1 Avalanche Capability  
Test Circuit 2 Switching Time  
D.U.T.  
D.U.T.  
V
GS  
L
R
L
90 %  
R
G
= 25 Ω  
V
GS  
Wave  
Form  
V
GS (on)  
10 %  
0
PG.  
R
G
PG  
R = 10 Ω  
G
50 Ω  
V
DD  
V
DD  
90 %  
I
D
V
GS = 20 → 0 V  
90 %  
10 %  
I
D
I
D
10 %  
0
V
0
GS  
BVDSS  
I
AS  
Wave  
Form  
V
DS  
t
d (on)  
t
r
t
d (off)  
t
f
I
D
t
VDD  
t
on  
t
off  
µ
t = 1  
s
Duty Cycle ≤ 1 %  
Starting Tch  
Test Circuit 3 Gate Charge  
D.U.T.  
= 2 mA  
R
L
I
G
PG.  
50 Ω  
V
DD  
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.  
2
2SK2413  
Radial Tape Specification  
Dimension (unit: mm)  
Item  
P2  
P
T
∆P  
∆h  
∆h  
Component Body Length along Tape  
Component Body Height  
Component Body Width  
A1  
A
T
8.0 ± 0.2  
13.0 ± 0.2  
4.5 ± 0.2  
0.5 ± 0.1  
2.5 MIN.  
12.7 ± 1.0  
12.7 ± 0.3  
6.35 ± 0.5  
A1  
Component Lead Width Dimension  
Lead Wire Enclosure  
d
I1  
Component Center Pitch  
Feedhole Pitch  
P
P0  
P2  
Feedhole Center to Center Lead  
F1 F2  
P0  
d
+0.4  
2.5  
Component Lead Pitch  
F1, F2  
–0.1  
D0  
Deflection Front or Rear  
Deflection Left or Right  
∆h  
∆P  
±1.0  
±1.3  
+1.0  
18.0  
Carrier Strip Width  
W
–0.5  
Adhesive Tape Width  
W0  
W1  
W2  
H0  
H1  
H
5.0 MIN.  
9.0 ± 0.5  
0.7 MIN.  
16.0 ± 0.5  
32.2 MAX.  
20.0 MAX.  
4.0 ± 0.2  
0.7 ± 0.2  
Feedhole Location  
Adhesive Tape Position  
Height of Seating Plane  
Feedhole to upper of Component  
Feedhole to Bottom of Component  
Tape Feedhole Diameter  
Overall Taped Package Thickness  
D0  
t
3
2SK2413  
TYPICAL CHARACTERISTICS (TA = 25 ˚C)  
DERATING FACTOR OF FORWARD BIAS  
SAFE OPERATING AREA  
TOTAL POWER DISSIPATION vs.  
AMBIENT TEMPERATURE  
100  
80  
2.0  
1.6  
1.2  
60  
40  
0.8  
0.4  
0
20  
0
20  
40  
60  
80 100 120 140 160  
20  
40  
60  
80 100 120 140 160  
Ta - Ambient Temperature - ˚C  
Ta - Ambient Temperature - ˚C  
DRAIN CURRENT vs.  
DRAIN TO SOURCE VOLTAGE  
FORWARD BIAS SAFE OPERATING AREA  
100  
10  
1
50  
40  
30  
20  
Pulsed  
ID(pulse)  
VGS = 10 V  
VGS = 6 V  
µ
µ
ID (DC)  
VGS = 4 V  
10  
0
TA = 25 ˚C  
Single Pulse  
0.1  
1
10  
100  
2
4
6
8
10  
VDS - Drain to Source Voltage - V  
VDS - Drain to Source Voltage - V  
FORWARD TRANSFER CHARACTERISTICS  
1000  
100  
Pulsed  
VDS = 10 V  
TA = –25 ˚C  
25 ˚C  
10  
1
75 ˚C  
125 ˚C  
0
1
2
3
4
5
6
7
8
VGS - Gate to Source Voltage - V  
4
2SK2413  
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH  
1000  
100  
Rth (ch-a) = 69.4 ˚C/W  
10  
1
0.1  
Single Pulse  
100 1000  
0.01  
µ
µ
10  
100  
1 m  
10 m  
100 m  
1
10  
PW - Pulse Width - s  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
GATE TO SOURCE VOLTAGE  
FORWARD TRANSFER ADMITTANCE vs.  
DRAIN CURRENT  
120  
100  
80  
100  
10  
1
Pulsed  
VDS = 10 V  
Pulsed  
TA = –25 ˚C  
25 ˚C  
75 ˚C  
125 ˚C  
60  
ID = 5 A  
40  
20  
0
0
10  
20  
1
10  
100  
VGS - Gate to Source Voltage - V  
ID - Drain Current - A  
DRAIN TO SOURCE ON-STATE  
RESISTANCE vs. DRAIN CURRENT  
GATE TO SOURCE CUTOFF VOLTAGE vs.  
CHANNEL TEMPERATURE  
160  
140  
120  
100  
80  
2.0  
1.5  
1.0  
VDS = 10 V  
ID = 1 mA  
Pulsed  
VGS = 4 V  
60  
VGS = 10 V  
0.5  
0
40  
20  
0
–50  
0
50  
100  
150  
1
10  
ID - Drain Current - A  
100  
Tch - Channel Temperature - ˚C  
5
2SK2413  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
CHANNEL TEMPERATURE  
SOURCE TO DRAIN DIODE  
FORWARD VOLTAGE  
100  
10  
Pulsed  
120  
10 V  
VGS = 4 V  
80  
40  
0
VGS = 0  
VGS = 10 V  
1
ID = 5 A  
0.1  
0
1.0  
2.0  
–50  
0
50  
100  
150  
Tch - Channel Temperature - ˚C  
VSD - Source to Drain Voltage - V  
CAPACITANCE vs. DRAIN TO  
SOURCE VOLTAGE  
SWITCHING CHARACTERISTICS  
10000  
1000  
100  
10  
VGS = 0  
f = 1 MHz  
tr  
Ciss  
Coss  
td (off)  
1000  
100  
10  
tf  
Crss  
td (on)  
VDD = 30 V  
VGS = 10 V  
RG = 10 Ω  
1.0  
0.1  
1.0  
10  
100  
1
10  
100  
VDS - Drain to Source Voltage - V  
ID - Drain Current - A  
REVERSE RECOVERY TIME vs.  
DRAIN CURRENT  
DYNAMIC INPUT/OUTPUT CHARACTERISTICS  
80  
70  
16  
14  
100  
ID = 10 A  
VDD = 48 V  
60  
50  
12  
10  
VGS  
VDS  
40  
30  
20  
8
6
4
10  
0
2
0
di/dt = 50 A/µs  
VGS = 0  
10  
0.1  
0
10  
20  
30  
40  
1.0  
10  
100  
Qg - Gate Charge - nC  
ID - Drain Current - A  
6
2SK2413  
SINGLE AVALANCHE ENERGY vs.  
INDUCTIVE LOAD  
SINGLE AVALANCHE ENERGY  
DERATING FACTOR  
100  
10  
100  
80  
VDD = 30 V  
RG = 25 Ω  
VGS = 20 V → 0  
IAS ≤ 10 A  
IAS = 10 A  
60  
40  
1.0  
20  
0
VDD = 30 V  
VGS = 20 V → 0  
RG = 25 Ω  
µ
µ
10  
100  
1 m  
10 m  
25  
50  
75  
100  
125  
150  
L - Inductive Load - H  
Starting Tch - Starting Channel Temperature - ˚C  
REFERENCE  
Document Name  
Document No.  
TEI-1202  
IEI-1209  
NEC semiconductor device reliability/quality control system.  
Quality grade on NEC semiconductor devices.  
Semiconductor device mounting technology manual.  
Semiconductor device package manual.  
IEI-1207  
IEI-1213  
Guide to quality assurance for semiconductor devices.  
Semiconductor selection guide.  
MEI-1202  
MF-1134  
TEA-1034  
TEA-1035  
TEA-1037  
Power MOS FET features and application switching power supply.  
Application circuits using Power MOS FET.  
Safe operating area of Power MOS FET.  
The diode connected between the gate and source of the transistor serves as a protector against ESD. When  
this device is actually used, an additional protection circuit is externally required if a voltage exceeding the  
rated voltage may be applied to this device.  
7
2SK2413  
[MEMO]  
No part of this document may be copied or reproduced in any form or by any means without the prior written  
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this  
document.  
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual  
property rights of third parties by or arising from use of a device described herein or any other liability arising  
from use of such device. No license, either express, implied or otherwise, is granted under any patents,  
copyrights or other intellectual property rights of NEC Corporation or others.  
The devices listed in this document are not suitable for use in aerospace equipment, submarine cables, nuclear  
reactor control systems and life support systems. If customers intend to use NEC devices for above applications  
or they intend to use "Standard" quality grade NEC devices for applications not intended by NEC, please contact  
our sales people in advance.  
Application examples recommended by NEC Corporation  
Standard: Computer, Office equipment, Communication equipment, Test and Measurement equipment,  
Machine tools, Industrial robots, Audio and Visual equipment, Other consumer products, etc.  
Special: Automotive and Transportation equipment, Traffic control systems, Antidisaster systems, Anticrime  
systems, etc.  
M4 92.6  
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