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IZ74HCT27A

型号:

IZ74HCT27A

描述:

三路3输入NOR门[ Triple 3-Input NOR Gate ]

品牌:

INTEGRAL[ INTEGRAL CORP. ]

页数:

5 页

PDF大小:

42 K

TECHNICAL DATA  
IN74HCT27A  
Triple 3-Input NOR Gate  
The IN74HCT27A is high-speed Si-gate CMOS device and is pin  
compatible with low power Schottky TTL (LSTTL). The device provide  
the Triple 3-input NOR function.  
·
·
·
·
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 mA  
High Noise Immunity Characteristic of CMOS Devices  
ORDERING INFORMATION  
IN74HCT27AN  
IN74HCT27AD  
IZ74HCT27A  
Plastic  
SOIC  
Chip  
TA = -55° to 125° C for all packages  
LOGIC DIAGRAM  
A1  
PIN ASSIGNMENT  
Y1  
Y2  
Y3  
B1  
C1  
V
A1  
B1  
A2  
B2  
1
2
3
4
5
6
7
14  
13  
12  
CC  
C1  
Y1  
A2  
B2  
11 C3  
10 B3  
C2  
A3  
Y3  
9
8
Y2  
C2  
A3  
B3  
C3  
GND  
FUNCTION TABLE  
Inputs  
Output  
A
L
B
L
C
L
Y = A + B + C  
H
L
L
L
X
X
H
X
H
X
H
X
X
PIN 14 =VCC  
PIN 7 = GND  
X = don’t care  
INTEGRAL  
1
IN74HCT27A  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
-0.5 to +7.0  
-1.5 to VCC +1.5  
-0.5 to VCC +0.5  
±20  
Unit  
V
VCC  
DC Supply Voltage (Referenced to GND)  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
V
IN  
V
VOUT  
IIN  
V
mA  
mA  
mA  
mW  
IOUT  
ICC  
DC Output Current, per Pin  
±25  
DC Supply Current, VCC and GND Pins  
±50  
PD  
Power Dissipation in Still Air, Plastic DIP**  
SOIC Package**  
750  
500  
Tstg  
TL  
Storage Temperature  
-65 to +150  
260  
°C  
°C  
Lead Temperature, 1 mm from Case for 10 Seconds  
(Plastic DIP or SOIC Package)  
*Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation should be restricted to the Recommended Operating Conditions.  
**Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C  
SOIC Package: : - 7 mW/°C from 65° to 125°C  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
VCC  
Parameter  
Min  
4.5  
0
Max  
5.5  
Unit  
V
DC Supply Voltage (Referenced to GND)  
DC Input Voltage, Output Voltage (Referenced to GND)  
Operating Temperature, All Package Types  
V , VOUT  
IN  
VCC  
V
TA  
-55  
+125  
°C  
ns  
tr, tf  
Input Rise and Fall Time (Figure 1)  
VCC =2.0 V  
VCC =4.5 V  
VCC =6.0 V  
0
0
0
1000  
500  
400  
This device contains protection circuitry to guard against damage due to high static voltages or electric  
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages  
to this high-impedance circuit. For proper operation, V and VOUT should be constrained to the range GND£(V or  
IN  
IN  
VOUT)£VCC.  
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused  
outputs must be left open.  
INTEGRAL  
2
IN74HCT27A  
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)  
Symbol  
Parameter  
Test Conditions  
VCC  
V
Guaranteed Limit  
Unit  
25 °C  
to  
£85 £125  
°C  
°C  
-55°C  
V
Minimum High-Level  
Input Voltage  
VOUT£0.1V or  
VOUT ³ VCC-0.1V  
êIOUTê£ 20 ?A  
4.5  
5.5  
2.0  
2.0  
2.0  
2.0  
2.0  
2.0  
V
V
V
IH  
V
IL  
Maximum Low -Level  
Input Voltage  
VOUT£0.1V or  
VOUT ³ VCC-0.1V  
êIOUTê£ 20 ?A  
4.5  
5.5  
0.8  
0.8  
0.8  
0.8  
0.8  
0.8  
VOH  
Minimum High-Level  
Output Voltage  
V =V or V  
IL  
4.5  
5.5  
4.4  
5.4  
4.4  
5.4  
4.4  
5.4  
IN  
IH  
êIOUTê £ - 20 ?A  
V = V or V  
IL  
4.5  
3.98  
3.84 3.70  
IN  
IH  
êIOUTê £ - 4.0 mA  
VOL  
Maximum Low-Level  
Output Voltage  
V = V or V  
IL  
êIOUTê £ 20 ?A  
4.5  
5.5  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
IN  
IH  
V = V or V  
IL  
4.5  
0.26  
0.33  
0.4  
IN  
IH  
êIOUTê £ 4.0 mA  
IIL  
IIH  
ICC  
Maximum Low-Level  
Input Leakage Current  
V = 0 V  
5.5  
-0.1  
-1.0  
-1.0  
mA  
mA  
mA  
IN  
Maximum High-Level  
Input Leakage Current  
V = VCC  
IN  
5.5  
5.5  
0.1  
2.0  
1.0  
20  
1.0  
40  
Maximum Quiescent  
Supply Current  
(per Package)  
V =VCC or 0 V  
IN  
IOUT=0 ?A  
V =2.4V any one input,  
IN  
ICCT  
Maximum  
4.5  
£-55°C  
25°C ?  
-125°C  
mÀ  
V =0 V or VCC, others inputs  
IN  
Additional Quiescent  
Supply Current on  
input pin  
IOUT=0 ?A  
2.9  
2.4  
INTEGRAL  
3
IN74HCT27A  
AC ELECTRICAL CHARACTERISTICS (CL=50pF,Input tr=tf=6.0 ns)  
VCC  
V
Guaranteed Limit  
Symbol  
Parameter  
25 °C to £85°C  
-55°C  
£125°C  
Unit  
tPHL, tPLH Maximum Propagation Delay (Figure 1)  
4.5  
4.5  
24  
15  
31  
19  
37  
22  
ns  
ns  
tTHL, tTLH Maximum Output Transition Time  
(Figure 1)  
CIN  
Maximum Input Capacitance  
5.0  
10  
10  
10  
pF  
Power Dissipation Capacitance (Per Gate)  
TA=25°C,VCC=5.0 V  
CPD  
Used to determine the no-load dynamic power  
consumption:  
54  
pF  
PD=CPDVCC2f+ICCVCC  
t
tr  
f
V1  
0.9  
0.9  
V2  
V2  
Input  
GND  
0.1  
0.1  
tPHL  
tPLH  
VCC  
0.9  
0.9  
V2  
0.1  
V2  
Output  
0 V  
0.1  
tTHL  
tTLH  
V1 = 3 V  
V2 = 1.3 V  
Figure 1. Switching Waveforms  
VCC  
VI  
VO  
Termination resistance RT – should  
be equal to ZOUT of pulse  
generators  
DEVICE  
UNDER  
TEST  
PULSE  
GENERATOR  
RT  
CL  
50 pF  
Figure 2. Test Circuit  
INTEGRAL  
4
IN74HCT27A  
CHIP PAD DIAGRAM IZ74HCT27A  
Chip marking  
74HCT27  
(x=0.114; y=1.104  
)
12  
11  
10  
09  
13  
08  
14  
01  
07  
06  
05  
03  
04  
02  
1.27 ±0.03  
Pad size 0.108 x 0.108 mm (Pad size is given as per passivation layer)  
Thickness of chip 0.46 ± 0,02 mm  
PAD LOCATION  
Pad No  
01  
Symbol  
À1  
X
Y
0.129  
0.132  
0.433  
0.751  
1.017  
1.047  
1.047  
1.047  
1.017  
0.751  
0.433  
0.262  
0.128  
0.129  
0.442  
0.124  
0.133  
0.133  
0.148  
0.392  
0.561  
0.828  
1.073  
1.088  
1.088  
1.095  
0.838  
0.606  
02  
B1  
03  
À2  
04  
B2  
05  
C2  
06  
Y2  
GND  
À3  
07  
08  
09  
B3  
10  
C3  
11  
Y1  
H
12  
13  
C1  
Vcc  
14  
INTEGRAL  
5
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