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NW6006

型号：

NW6006

描述：

与间断拨号音检测器增强型II来电显示解码器[ ENHANCED TYPE II CALLER ID DECODER WITH STUTTER DIAL TONE DETECTOR ]

品牌：

IDT[ INTEGRATED DEVICE TECHNOLOGY ]

页数：

22 页

PDF大小：

323 K

下载PDF手册
NW6006  
ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
FEATURES  
DESCRIPTION  
·
1200 baud Bell 202 and ITU-T V.23 Frequency Shift Keying  
(FSK) Demodulation  
The NW6006 device is a single-chip, 3/5 Volt CMOS caller ID with  
call waiting detection circuit. It can receive signals following Bellcore  
GR-30-CORE & SR-TSV-002476, BT SIN227 & SIN242, and ETSI  
ETS 300 788-1/-2 specifications.  
·
·
Stutter dial tone detection  
Compliant with following specifications:  
Bellcore GR-30-CORE & SR-TSV-002476  
TIA/EIA-716, TIA/EIA-777 Draft  
The NW6006 provides 1200 baud Bell 202 and ITU-T V.23 FSK  
demodulation, detection in stutter dial tone mode and CAS/DT-AS  
detection. Two seperate differential input amplifiers allow the device to  
be connected with both Tip/Ring and Telephone Hybrid receive pair.  
TIA/EIA PN-4195 Draft  
British Telecom (BT) SIN227 & SIN242  
ETSI ETS 300 778-1 and -2  
·
·
Bellcore “CPE Alerting Signal (CAS)”, British Telecom “Idle State FSK demodulation is implemented only on Tip/Ring, while DT-AS(or  
and Loop State Tone Alert Signal” and ETSI “Dual Tone Alerting CAS) detection can be on either Tip/Ring or Hybrid Receive. In  
Signal (DT-AS)” detection  
Two seperate OP amps with adjustable gain for Tip/Ring and  
Telephone Hybrid connections  
Monitoring of the stop bit for framing error check  
Serial FSK data interface with selectable output of bit stream or 1  
byte buffer  
addition, NW6006 provides a serial FSK data interface via which the  
data can be selected to be processed as a bit stream or extracted  
from a 1 byte built-in buffer. An on-chip Stutter Dial Tone Detector is  
provided to support the voice mail applications.  
·
·
The device can be used in feature or cordless phones with voice  
mail for BT Calling Line Identity Presentation (CLIP), CCA CLIP and  
Bellcore Calling Identity Delivery (CID) systems. It can also be used in  
caller ID boxes, modem, fax machines, answering machines,  
database query systems and Computer Telephony Integration (CTI)  
systems.  
·
·
·
·
·
FSK carrier detection  
3 V or 5 V operation  
Low power CMOS with intelligent powerdown mode  
Operating temperature range: -40 °C to +85 °C  
Packages available:  
NW6006-XS 20 pin SOIC  
(where ‘X’ is the revision ID)  
FUNCTIONAL BLOCK DIAGRAM  
OSCOUT OSCIN  
CB0 CB1 CB2  
SDTEN  
Oscillator  
Bias  
Control Bit Decoder  
Stutter Dial Tone  
Detector  
SDTEN  
FSKEN  
PWDN  
CASEN  
GS1EN  
MODE  
GS2EN  
VREF  
IN1+  
Generator  
PWDN  
ST/GT  
DR/STD  
GS1EN  
Guard Time  
+
-
Tone Alert  
Detector  
IN1-  
GS1  
EST  
CD/STRDT  
CASEN  
IN2+  
+
-
FSK  
Demodulator  
DCLK  
DATA  
Data/Timing Recovery  
IN2-  
GS2  
GS2EN  
MODE  
FSKEN  
Figure 1. Block Diagram  
The IDT logo is a registered trademark of Integrated Device Technology, Inc  
INDUSTRIAL TEMPERATURE RANGE  
JULY 2002  
ã 2002 Integrated Device Technology, Inc.  
DSC-6049/3  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
PIN INFORMATION  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VREF  
IN1+  
IN2+  
IN2-  
GS2  
CB2  
CB1  
VCC  
2
3
IN1-  
4
GS1  
5
GND  
6
OSCIN  
OSCOUT  
CB0  
7
CD/STRDT  
ST/GT  
8
9
DCLK  
DATA  
EST  
10  
DR/STD  
Figure 2. Pin Assignment  
Name  
VREF  
Type  
O
Pin No.  
1
Description  
Reference Voltage.  
This output is used to bias the input OP amp. It is typically VCC/2.  
Non-inverting Input of the gain adjustable Tip/Ring OP amp.  
Inverting Input of the gain adjustable Tip/Ring OP amp.  
IN1+  
IN1-  
I
I
2
3
Gain Select Output of the gain adjustable Tip/Ring OP amp.  
The Tip/Ring signal can be attenuated or amplified at GS1 by adjusting the feedback resistor between GS1 and IN1-.  
The FSK signal is always detected by Tip/Ring OP amp while DT-AS(CAS) signal can be detected by either Tip/Ring  
or Hybrid OP amp. The OP amp selection is controlled by CB1 and CB2 bits.  
Ground.  
GS1  
O
4
GND  
-
I
5
6
Oscillator Input.  
OSCIN  
A 3.579545 MHz crystal or ceramic resonator should be connected between this pin and the OSCOUT. It can also  
be driven by an external clock source.  
Oscillator Output.  
OSCOUT  
CB0  
O
I
7
8
9
A 3.579545 MHz crystal or ceramic resonator should be connected between this pin and the OSCIN. When an  
external clock drives OSCIN, this pin can be left floating.  
Control Bit 0 (FSK Data Interface Mode Select).  
This pin can select the 3-wire FSK data interface mode. A ‘0’ on this pin indicates interface mode 0; while a ‘1’ on  
DR STD  
this pin indicates interface mode 1. (The FSK data interface is consisted of DATA, DCLK and  
When CB0 is high and CB1, CB2 are both low, the device is set into the power down state.  
Data Clock of the Serial FSK Interface.  
/
pins.)  
DCLK  
I/NC  
In mode 0 (CB0 is low), this pin is unused; In mode 1 (CB0 is high), this pin is an input which clock the FSK data  
byte out to the DATA pin.  
Data Output of the Serial FSK Interface.  
In mode 0 (CB0 is low), the FSK serial bit stream is output to the DATA pin directly.  
In mode 1 (CB0 is high), the start bit is stripped off, the data byte and the stop bit is stored in a 9-bit buffer. At the  
DATA  
O
10  
DR STD  
end of each word signaled by the  
/
pin, the microcontroller should shift the byte out onto the DATA pin by  
applying 8 read pulses to the DCLK pin. A 9th DCLK pulse will shift out the stop bitfor framing error checking.  
2
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
PIN INFORMATION (CONTINUED)  
Name  
Type  
Pin No.  
Description  
Data Ready or DT-AS Detection Delayed Steering Output.  
This pin is active low. When FSK demodulation is enabled, this pin is the Data Ready output. In FSK interface mode 0,  
this pin is unused and reads ‘1’. While in mode 1, this pin is normally high and goes low for half a bit time at the end of  
DR  
DR  
to high. In this way, reading  
DR STD  
/
O/NC  
11  
a word. If DCLK starts during  
low, the first rising edge of the DCLK input will return  
DR  
of the first DATA bit can clear the interrupt requested by a low going  
.
When DT-AS detection is enabled, this pin is the Delayed Steering Output. An active low signal on this output indicates  
the detection of a ‘guard time qualified’ DT-AS.  
DT-AS Early Steering Output.  
EST  
O
12  
13  
This pin is an active high output to indicate the detection of a raw DT-AS signal. It is used with the ST/GT pin and  
external components to time qualify the detection.  
DT-AS Detection Steering Input/Guard Time Output.  
It’s a CMOS output and an input of voltage comparator. It is used in conjunction with the EST pin and external  
components to time qualify a raw DT-AS signal detection.  
ST/GT  
I/O  
DR STD  
If the voltage at this pin is greater than the voltage threshold,  
/
pin is asserted low to indicate that a DT-AS has  
DR STD  
pin  
been detected. A voltage less than the threshold enable the device to accept a new DT-AS and return the  
/
to high.  
FSK Carrier Detector or Stutter Dial Tone Detector Output.  
This is an active low CMOS output signal to indicate the presence of in-band FSK signal or valid Stutter Dial Tone  
signal.  
3/5 V Power Supply.  
Control Bit 1 (Function Select 1).  
This pin is used with CB2 to select FSK demodulation, Tip/Ring DT-AS/Dial Tone detection, Hybrid DT-AS/Dial Tone  
detection with or without Stutter Dial Tone Detection. See Table 1. When CB0 is high, CB1 and CB2 pins are both low,  
the device is set into the power down state.  
CD STRDT  
/
O
-
14  
15  
VCC  
CB1  
I
16  
Control Bit 2 (Function Select 0).  
This pin is used with CB2 to select FSK demodulation, Tip/Ring DT-AS/Dial Tone detection, Hybrid DT-AS/Dial Tone  
detection with or without Stutter Dial Tone Detection. See Table 1. When CB0 is high, CB1 and CB2 pins are both low,  
the device is set into the power down state.  
CB2  
GS2  
I
17  
18  
Gain Select Output of the gain adjustable Hybrid OP amp.  
O
The hybrid receive signal can be amplified or attenuated at GS2 by adjusting the feedback resistor between GS2 and  
IN2-. When the CPE is off-hook, DT-AS detection of the GS2 signal should be enabled via the CB1 and CB2 pins.  
Inverting Input of the gain adjustable Hybrid OP amp.  
IN2-  
IN2+  
I
I
19  
20  
Non-inverting Input of the gain adjustable Hybrid OP amp.  
Abbreviation Index  
CAS  
CDS  
CID  
----------------------------------------------------------- CPE Alerting Signal  
---------------------------------------------------------- Caller Display Service  
---------------------------------------------------------- Calling Identity Delivery  
CIDCW ---------------------------------------------------------- Calling Identity Delivery on Call Waiting  
CLIP  
CNAM  
CND  
CNIC  
CO  
---------------------------------------------------------- Calling Line Identity Presentation  
--------------------------------------------------------- Calling Name Delivery  
--------------------------------------------------------- Calling Number Delivery  
---------------------------------------------------------- Calling Number Identification Circuit  
---------------------------------------------------------- Central Office  
DT-AS  
MEI  
SDT  
TE  
---------------------------------------------------------- Dual Tone Alert Signal  
---------------------------------------------------------- Multiple Extension Interworking  
---------------------------------------------------------- Stutter Dial Tone  
---------------------------------------------------------- Terminal Equipment  
3
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
PIN INFORMATION (CONTINUED)  
Table 1. Description of Control Bit Pins CB0-2  
Pin  
CB0  
Name  
FSK Data Interface Mode  
Select  
Description  
0
1
FSK Data Interface Mode 0: FSK bit stream is output directly.  
FSK Data Interface Mode 1: FSK byte is stored in a 1-byte buffer, which can be  
read serially by the microcontroller.  
CB1  
1
CB2  
1
FSK Demodulation is enabled. Tip/Ring input (GS1) is selected. In FSK  
DR STD DR  
Demodulation (CB0 = ‘1’),  
/
is .  
1
0
0
0
1
0
Hybrid DT-AS Detection is enabled. Hybrid Receive input (GS2) is selected.  
DR STD STD  
/
is  
When CB0 is high (‘1’): Stutter Dial Tone Detection is enabled.  
STRDT  
.
CD STRDT  
/
is  
.
CD STRDT CD  
When CB0 is low (‘0’): Stutter Dial Tone Detection is disabled.  
/
is  
.
.
CB1  
CB2  
Function Select 1  
Function Select 0  
DR STD  
Tip/Ring DT-AS Detection is enabled. Tip/Ring input (GS1) is selected.  
STD  
/
is  
When CB0 is high (‘1’): Stutter Dial Tone Detection is enabled.  
STRDT  
.
CD STRDT  
/
is  
.
CD STRDT CD  
When CB0 is low (‘0’): Stutter Dial Tone Detection is disabled.  
/
is  
Tip/Ring DT-AS detection is required for Bellcore MEI and BT on-hook CLIP.  
When CB0 is high (‘1’): the NW6006 will be powered down. It draws minimal  
power supply current.  
When CB0 is low (‘0’): for factory testing only.  
also defines standards. TIA specification TIA/EIA-716 defines Type I  
CPE requirements. A type II CPE specification document is drafted  
as TIA/EIA-777.  
FUNCTIONAL DESCRIPTION  
CALLER ID SPECS SUPPORTED  
The NW6006 is a type II Caller ID device with Call Waiting  
capability. It supports Bellcore, BT and ETSI specifications. The major  
differences between above specs are as follows (see Fig. 11, Fig. 12  
and Fig. 13 for reference):  
BRITISH TELECOM  
BT SIN227 and SIN242 define the signal interface between the  
Central Office (CO) and the Terminal Equipment (TE) for the Caller  
Display Service (CDS). CDS provides CLIP (Calling Line Identity  
Presentation) that delivers to an idle state (on hook) TE the identity of  
an incoming caller before the first ring.  
BELLCORE AND TIA  
Bellcore GR-30-CORE and SR-TSV-002476 define the  
requirement for the signalling services of Calling Number Delivery  
(CND), Calling Name Delivery (CNAM), VMWI (Visual Message  
Waiting Indicator) and Calling Identity Delivery on Call Waiting  
(CIDCW).  
A polarity reversal on the A and B wires indicates the arrival of a  
CDS call. After that comes an Idle State Tone Alert Signal, and then  
Caller ID FSK information transmitted in ITU-T V.23 format. When the  
subscriber is engaged in a call, the arrival of information about  
another incoming call is indicated by a Loop State Tone Alert Signal.  
The NW6006 can detect tone alert signal and demodulate the  
incoming ITU-T V.23 FSK signals.  
In CND or CNAM service, information of the calling party is  
embedded in the silent interval between the first and second ringing.  
The NW6006 can detect and demodulate the incoming Bell-202 FSK  
data. In CIDCW service, information about an incoming caller is sent  
to the subscriber who is engaged in another call. A CPE Alerting  
Signal (CAS) indicates that a CIDCW data is incoming. The NW6006  
can detect the alerting signal and demodulate the incoming FSK  
information which contains CIDCW data. The demodulated data is  
output onto the serial interface.  
ETSI  
The ETSI caller identity specifications ETS 300 788-1 for on-hook  
and ETS 300 788-2 for off-hook define the requirements for CPE,  
while ETS 300 659-1 for on-hook and ETS 300 659-2 for off-hook  
define the end office requirements. The services such as CLIP and  
CLIP with Call Waiting in ETSI specifications are similar to those of  
Bellcore. The ETSI specifications are popularly used in Europe.  
In North America, Telecommunications Industry Association (TIA)  
4
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
DT-AS DETECTION ON EITHER TIP/RING OR HYBRID  
RECEIVE PAIR  
BLOCK DESCRIPTION  
The NW6006 requires a 3.579545 MHz system clock and consists  
of four major functional blocks: Analog Input Circuit, Dual Tone Alert  
Signal Detection, Stutter Dial Tone Detection and FSK Demodulation.  
In off-hook services, the detection of Dual Tone Alert Signal (DT-AS)  
will affect the quality of the call waiting service. Even though the end  
office has muted the far end party before and after it sends DT-AS, the  
near end user who is to receive the FSK information may be still  
talking. Therefore, the CPE must be able to detect DT-AS successfully  
in the presence of near end speech. Furthermore, imitation of DT-AS  
by speech will also affect the DT-AS detector, thus false detection may  
be generated.  
ANALOG INPUT CIRCUIT  
The input signal is processed by the Analog Input Circuit block,  
which is comprised of two OP amps and a bias source (VREF). VREF  
is the output of a low impedance voltage source used to bias the input  
OP amp, and is typically equal to VCC/2. The Tip/Ring OP amp  
(IN1+, IN1-, GS1 pins) is for connecting to Tip and Ring, while the  
Hybrid OP amp (IN2+, IN2-, GS2 pins) is for connecting to Hybrid  
Receive Pair. The gain adjustable OP amps are also used to select  
the input gain by connecting a feedback resistor between GS and the  
IN- pin. Fig. 3 shows the differential input configuration. In single-  
ended configuration, the gain adjustable OP amp is connected as  
shown in Fig. 4.  
To achieve better DT-AS detection quality, a method is to put DT-AS  
detection on the telephone hybrid receive pair instead of on Tip/Ring.  
As the near end speech has been attenuated while the DT-AS level is  
the same as on Tip/Ring, the DT-AS immunity is improved.  
A CPE capability called Multiple Extension Interworking, in process  
of being defined by Bellcore, requests the CPE be capable of detecting  
DT-AS when the line is off-hook, although the CPE itself may be on-  
hook. Under some conditions, an on-hook CPE may send an  
acknowledgment to the end office. Also, the on-hook CPE’s capability  
of detecting DT-AS enables the call logs between on and off-hook  
CPEs to be maintained synchronous. In this way, when all off-hook  
CPEs are MEI compatible and DT-AS is received, one of the CPEs will  
send the acknowledgment signal and all CPEs will receive FSK.  
VREF  
NW6006  
R3  
R4  
C1  
C2  
R1  
R2  
IN+  
IN-  
Therefore, if the DT-AS detector is connected only to the hybrid  
receive pair, the CPE can not detect DT-AS when it is on-hook. When  
the CPE is on-hook, either the hybrid is non-functional or the signal  
level is severely attenuated. Thus, an on-hook CPE must be able to  
detect DT-AS from Tip/Ring.  
R5  
GS  
Voltage Gain  
Av = R5/R2  
Differential Input Amplifier  
C1=C2  
Input Impedance  
R1=R2 (For unity gain R5=R2)  
R3=(R4R5)/(R4+R5)  
The NW6006 provides two input OP amps via which the device can  
be connected both to Tip/Ring and to the Hybrid Receive pairs. Both  
connection can be differential or single-ended. FSK demodulation is  
implemented only on Tip/Ring, while DT-AS detection can be on either  
Tip/Ring or Hybrid Receive. Tip/Ring DT-AS detection is required for  
MEI and BT’s on-hook CLIP.  
Zin =2ÖR1²+ (1/wC)²  
Figure 3. Differential Input Gain Control Circuit  
NW6006  
It should be noted here that as the Hybrid OP amp is for DT-AS  
detection only, its gain can always be adjusted specifically for the DT-  
AS signal.  
IN+  
IN-  
C
Rin  
Rf  
GS  
STUTTER DIAL TONE SPECS SUPPORTED  
The NW6006 also supports TIA/EIA Stutter Dial Tone specification  
PN-4159 Draft. This specification defines the requirement for the  
singalling of Stutter Dial Tone (SDT). When there is a message waiting  
in a customer’s voicemail box, the serving telephone company’s  
Central Office (CO) switch may apply a SDT signal to the customer’s  
line when it is taken off-hook. An SDT CPE is used to automatically  
detect the SDT in response to an on-hook to off-hook transition and  
provide an indication.  
Voltage Gain  
Av = Rf / Rin  
VREF  
Figure 4. Single-ended Input Gain Control Circuit  
5
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
DUAL TONE ALERT SIGNAL DETECTION  
Fig. 5 shows the operation of the guard time circuit and Fig. 6  
shows the waveform of the EST, ST/GT and STD pins. The total  
recognition time is tREC = tDP + tGP, where tDP is the tone present detection  
time and tGP is the tone present guard time. The total absent time is tABS  
= tDA + tGA, where tDA is the tone absent detection time and tGA is the tone  
absent guard time. The guard time is the RC time constant for the  
capacitor charge to VCC or discharge to GND. To get the unequal  
present and absent guard time, a diode can be connected as shown  
in Fig. 7 to provide different RC time constant (varying resistance  
value) during charging and discharging.  
The Dual Tone Alert Signal is used only in off-hook signalling in  
Bellcore system and ETSI system, but in BT system it is used in both  
on and off-hook signalling. The low and high tone frequencies of three  
different systems are as follows:  
BT  
Bellcore & ETSI  
Low Tone  
Frequency  
High Tone  
Frequency  
2130 Hz ± 1.1% (on-hook)  
2130 Hz ± 0.6% (off-hook)  
2750 Hz ± 1.1% (on-hook)  
2750 Hz ± 0.6% (off-hook)  
2130 Hz ± 0.5%  
2750 Hz ± 0.5%  
When the device selects DT-AS detection, the bi-purpose output  
pin DR/STD is STD. STD goes low when DT-AS has been detected  
and return high after DT-AS has ended.  
DT-AS  
Alerting Signal  
tDP  
tDA  
EST  
ST/GT  
STD  
tGP  
tGA  
VTGT  
VTGT  
tABS  
The incoming Alert Signal goes through anti-alias filter and then is  
separated into high band and low band by two bandpass filters. The  
tone detection algorithm examines the filter outputs to validate the  
arrival of the DT-AS. The EST pin becomes active when both tones  
are detected. The EST is only the preliminary indication, it must be  
qualified by the “guard time” as required by Bellcore, BT and ETSI (a  
minimum duration for valid signals). STD is the guard time qualified  
DT-AS detection output, it indicates the correct detection.  
tREC  
Q1  
Switch  
Q2  
ON  
ON  
ON  
Switch  
Figure 6. Guard Time Waveform  
VCC  
Q1  
VCC  
NW6006  
Dual tone detected  
P
C3  
R5  
tGP < tGA  
VCC  
C
tGP=RPCIn((VCC-Vd(RP/R2))/  
(VCC-VTGT-Vd(RP/R2)))  
tGA=R1CIn(VCC/VTGT )  
RP=R1R2/(R1+R2)  
ST/GT  
ST/GT  
VTGT  
Comparator  
R1  
Vd=diode forward voltage  
R2  
Q2  
EST  
N
VCC  
tGP > tGA  
EST  
C
tGP=R1CIn(VCC/(VCC-VTGT))  
tGA=RPCIn((VCC-Vd(RP/R2))/  
(VTGT-Vd(RP/R2)))  
STD  
ST/GT  
RP=R1R2/(R1+R2)  
Vd=diode forward voltage  
R1  
R2  
EST  
Figure 5. Guard Time Circuit of Dual Tone Alert Signal  
Detection  
Figure 7. Guard Time Circuits with Unequal Present and  
Absent Times  
6
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
FSK DEMODULATION  
associated interrupt to be cleared by the first read pulse. Otherwise,  
DR stays low for half a nominal bit time (1/2400 sec) and then returns  
to high. After the last bit (Most Significant Bit) has been read,  
additional DCLKs are ignored. Fig. 18 shows the timing diagram of  
Mode ‘1’ operation.  
The key part among the functions offered by NW6006 is FSK  
demodulation. This function is implemented by several stages: first,  
the carrier detector provides an indication of the presence of signal at  
the bandpass filter output; second, the device’s dual mode serial  
interface allows convenient extraction of the 8-bit data words in the  
demodulated FSK bit stream.  
Reading the stop bit is a method of checking framing errors. If it’s  
certain that there is no framing error would occur, the microcontroller  
only needs to send 8 DCLK pulses to shift the data byte out. After the  
checksum byte has be received, all 9 bits should be read and framing  
error checked.  
The FSK characteristics are different in BT, ETSI and Bellcore  
specifications. The signal frequencies in BT and ETSI correspond to  
ITU-T V.23; the Bellcore frequencies correspond to Bell 202. The  
NW6006 is compatible with both formats. It also meets the signal  
characteristics by setting the Tip/Ring input OP amp at unity gain in 5V  
operation.  
STUTTER DIAL TONE DETECTION  
In some specifications, Stutter Dial Tone is used to indicate voice  
mails. The low and high tone frequencies of Stuttered Dial Tone signal  
are 350 Hz (tolerant range: 343 Hz to 357 Hz) and 440 Hz (tolerant  
range: 431 Hz to 449 Hz).  
ITU-T V.23  
1300 Hz ± 1.5%  
2100 Hz ± 1.5%  
Bell 202  
1200 Hz ± 1%  
2200 Hz ± 1%  
Mark Freq. (‘1’)  
Space Freq. (‘0’)  
When the device selects Stutter Dial Tone detection, the bi-  
purpose output pin CD/STRDT is STRDT. STRDT goes low when dial  
tone signal has been detected and return high after dial tone signal  
has been ended (see Fig. 21).  
For 3 V operation, the FSK receiver becomes easier to accept  
lower level signals than in 5 V operation. The Tip/Ring input OP amp  
gain should be reduced to maintain the FSK reject level.  
The incoming Stuttered Dial Tone signal goes through anti-alias  
filter and then is separated into high band and low band by two  
bandpass filters. The tone detection algorithm examines the filter  
outputs to validate the arrival of the Stutter Dial Tone signal. An  
embeded digital algorithm implements guard-time function. If the dial  
tone signal is qualified by the algorithm, the STRDT pin goes active to  
indicate a correct detection.  
Serial FSK Interface  
The three wire DATA, DCLK and DR form the data interface of the  
FSK demodulation. The DATA pin is the serial data pin that outputs  
data to external devices. The DCLK pin is the data clock which is used  
in Mode ‘1’ and is generated by an external device. The DR pin is the  
data ready signal used in Mode ‘1’, also an output from the NW6006  
to external devices. DR/STD pin is a dual purpose output pin, when  
FSK function is selected it is DR.  
Two modes are selectable via control of the device’s CB0 pin:  
Mode ‘0’ (CB0 is low), where the FSK bit stream is output directly;  
Mode ‘1’ (CB0 is high), where the data byte and the stop bit are stored  
in a 9 bit buffer.  
Mode ‘0’ (CB0 is low)  
In this mode, the device demodulates the incoming FSK signal,  
and output the data directly to the DATA pin. DCLK and DR pins are  
unused. Fig. 19 and Fig. 20 show the timing diagram of Mode ‘0’  
operation.  
Mode ‘1’ (CB0 is high)  
In this mode, the received byte is stored on chip. The  
microcontroller supplies read pulses (DCLK) to shift the register  
contents serially out of the NW6006, onto the DATA pin. The NW6006  
asserts DR to denote the word boundary and indicate to the  
microprocessor that a new word has become available. Internal to the  
device, the demodulated data bits are sampled and stored. Midway  
through the stop bit, the 8 data bits and the stop bit are parallel loaded  
into an 9-bit shift register and DR goes low. The contents of register  
are shifted out to DATA pin on DCLK’s rising edge with LSB (Least  
Significant Bit) out first. If DCLK begins while DR is low, DR will return to  
high upon the first DCLK rising edge. This feature allows the  
7
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
FSK CARRIER DETECTION  
(a) Connection of One Device with Crystal Oscillator  
NW6006  
OSCIN OSCOUT  
The carrier detector detects the presence of a signal of sufficient  
amplitude at the output of the FSK bandpass filter. If the signal is  
qualified by a digital algorithm, it set the CD output to low indicating a  
successful carrier detection. NW6006 supplies a 10 ms hysteresis to  
allow for momentary signal drop out once CD has been activated.  
When there is no activity at the FSK bandpass filter output for 10 ms,  
CD is released.  
3.579545MHz  
(b) Common Crystal Connection of Several Devices  
Sharing One Timing Source  
When CD is inactive (high), the raw output of the FSK  
demodulator is ignored by the FSK data output interface. In mode‘0’,  
the DATA pin is forced high. In mode ‘1’, the internal shift register is not  
updated. If DCLK is clocked, DATA is undefined.  
NW6006  
NW6006  
NW6006  
OSCIN  
OSCIN OSCOUT  
OSCIN OSCOUT  
OSCOUT  
to the next device  
Since signals such as DT-AS, DTMF tones and speech are within  
the FSK frequency band and thus may activate the carrier detector.  
The NW6006 should be put into DT-AS or power down mode when  
FSK is not expected to avoid false carrier detection and false  
demodulation.  
3.579545MHz  
Figure 8. Applicaiton of Clock Driven Circuit  
OTHER FUNCTIONS  
Power-down Mode  
APPLICATION NOTE  
CONTROL BITS PROGRAMMING  
The device provides the power-down feature to reduce the power  
consumption. Power-down can be activated by setting Control Bits 0-2  
to ‘100’. Note that momentary transition of CB0-2 into the power-down  
code won’t activate power-down but will reset the device.  
Functionality of the NW6006 can be selected by coding CB0-CB2,  
as shown in Table 2.  
Table 2. Control Bits Programming  
In this mode, both input OP amps, reference voltage and the  
oscillator are non functional. When the device is in power-down, DATA,  
DR/STD, CD/STRDT are high; EST and ST/GT are low.  
Functionality Group  
FSK Demodulation Mode 0  
FSK Demodulation Mode 1  
Hybrid DT-AS Detection with Stuttered  
Dial Tone Detection  
Hybrid DT-AS Detection Only  
Tip/Ring DT-AS Detection with Stuttered  
Dial Tone Detection  
CB0  
CB1  
CB2  
0
1
1
1
1
1
1
1
0
An intelligent Power-down feature is implemented to further reduce  
the operating current. When FSK is selected, DT-AS detector and  
Stuttered Dial Tone Detection are powered down. When DT-AS and  
STRDT are selected, FSK demodulator is powered down. The Tip/  
Ring and Hybrid input OP amps are not affected in the intelligent  
Power-down.  
0
1
1
0
0
1
Tip/Ring DT-AS Detection Only  
Power Down  
Factory Test Only  
0
1
0
0
0
0
1
0
0
Crystal Oscillator  
HYBRID CONNECTION  
A 3.579545 MHz crystal oscillator or other external clock source is  
required for NW6005. The crystal can be directly connected between  
OSCIN and OSCOUT pins without any external component. If an  
external clock source is used, OSCIN pin should be driven by the  
clock source and OSCOUT pin is left floating or is used to drive other  
devices. Fig. 8 shows some applications.  
To optimize the device’s talkdown and talkoff performance, Hybrid  
connection is recommended. There are two Op Amps in NW6006  
which bring convenience for Hybrid connection. When connected to  
the Hybrid Op Amp, the Hybrid circuit will attenuate the speech signal  
at least 9 dB from the microphone to the speaker, which leads a much  
better performance of near-end talkdown and talkoff.  
It is highly recommended to demodulate the FSK signal using the  
Tip/Ring OP Amp and to detect the CAS signal using the Hybrid OP  
Amp. This implementation brings not only optimized talkdown and  
talkoff performance, but also the convenience to adjust FSK and CAS  
sensitivity separately.  
8
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
GAIN SETTING  
Ideally, the gain of the two Op Amps would be set to 0 dB. But in  
real applications, the gain setting should be determined by industry  
standards as well as by customer requirements. The circuit and  
calculation method of gain setting is illustrated in Figs. 3 and 4. For  
Hybrid connection, the single-ended solution (Fig. 4) is often selected.  
Typically, the CAS sensitivity should be lower than the FSK  
sensitivity in order to prevent missing the FSK signal while the CAS  
signal is detected. Therefore, it is suggested to set the gain of the Op  
Amp for FSK demodulation 3 dB higher than that of the Op Amp for  
CAS detection.  
THE DIFFERENCE BETWEEN FSK MODE 0 AND MODE1  
In FSK mode 0, the FSK serial bit stream is output to the DATA pin  
directly. DCLK and DR pins are unused. The microcontroller reads out  
the data by the serial data interface which is implemented by software  
programming. The flexibility of using software improves the immunity  
to interference.  
In FSK mode 1, the received byte is stored in an on-chip register.  
The microcontroller supplies read pulses (DCLK) to shift the register  
contents serially out of the NW6006, onto the DATA pin. The DR pin is  
also used to indicate the word boundary.  
VALID DT-AS EVALUATION  
DT-AS output will generate false detection if being interfered by  
speech. In this way, valid DT-AS pulse evaluation becomes necessary.  
The evaluation defines a minimum and maximum pulse duration,  
and maximum drop out time within that pulse duration. See Figure 22  
for reference.  
9
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
APPLICATION INFORMATION  
Microphone  
Speaker  
Tx+  
Tx-  
TIP  
TIP  
Telephone  
Hybrid  
RING  
RING  
Rx+  
Rx-  
NW6006  
2n2  
C1 R1  
VREF  
IN1+  
IN2+  
IN2-  
470k  
39k  
A
330k  
470k  
IN1-  
GS2  
R2  
C2  
470k  
2n2  
GS1  
CB2  
39k  
B
GND  
OSCIN  
CB1  
VCC= 5V +/-10%  
VCC  
GND  
Xtal  
FSK Interface Mode 1 is selected  
OSCOUT  
CB0  
CD/STRDT  
ST/GT  
EST  
R3  
DCLK  
DATA  
DR/STD  
R4  
To Microcontroller  
From Microcontroller  
Note:  
1. Resistors are 1%, 0.1Watt; Unless stated, capacitors are 5%, 6.3 V.  
2. All diodes in the circuit are 1N4148 or equivalent.  
3. Xtal is 3.579545 MHz, 0.1% crystal or ceramic resonator.  
4. Tip/Ring op amp gain = 0 dB; Hybrid Receive op amp gain = -3 dB.  
5. For 1000 Vrms, 60 Hz isolation from Tip to Earth and Ring to Earth:  
R1, R2 = 430 k, 0.5 W, 5%, 500 V min.  
6. For BT application, R3=R4= 422k;  
C1, C2 = 2n2, 250 V min.  
For Bellcore application, R3=825k, R4=226k.  
Figure 9. Typical Application Circuit For Bellcore MEI Compatible Type II Telephone  
with Stutter Dial Tone Detection, 5 V Operation  
10  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
Microphone  
Speaker  
Tx+  
Tx-  
TIP  
TIP  
Telephone  
Hybrid  
RING  
RING  
Rx+  
Rx-  
NW6006  
2n2  
C1 R1  
VREF  
IN1+  
IN2+  
IN2-  
470k  
39k  
A
200k  
470k  
IN1-  
GS2  
C2 R2  
282k  
2n2  
GS1  
CB2  
39k  
B
GND  
OSCIN  
CB1  
VCC= 3V +/-10%  
VCC  
GND  
Xtal  
OSCOUT  
CB0  
CD/STRDT  
ST/GT  
EST  
FSK Interface Mode 1 is selected  
R3  
DCLK  
DATA  
DR/STD  
R4  
To Microcontroller  
From Microcontroller  
Note:  
1. Resistors are 1%, 0.1Watt; Unless stated, capacitors are 5%, 6.3 V.  
2. All diodes in the circuit are 1N4148 or equivalent.  
3. Xtal is 3.579545 MHz, 0.1% crystal or ceramic resonator.  
4. Tip/Ring op amp gain = 0 dB; Hybrid Receive op amp gain = -3 dB.  
5. For 1000 Vrms, 60 Hz isolation from Tip to Earth and Ring to Earth:  
R1, R2 = 430 k, 0.5 W, 5%, 500 V min.  
6. For BT application, R3=R4= 422k;  
C1, C2 = 2n2, 250 V min.  
For Bellcore application, R3=825k, R4=226k.  
Figure 10. Typical Application Circuit For Bellcore MEI Compatible Type II Telephone  
with Stutter Dial Tone Detection, 3 V Operation  
11  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
Note 1  
Note 4  
1st Ringing  
Ch. Seizure  
Mark  
Message  
2nd Ringing  
A/B Wires  
A
B
C
D
E
F
Note 2  
Note 2  
PWDN  
Note6  
Note 3  
FSKEN  
Note6  
Note 5  
CD  
DR  
Note 7  
...  
...  
DCLK  
Note 7  
DATA  
..101010..  
Data  
Figure 11. Bellcore On-hook Data Transmission Timing Diagram  
Notes:  
1) A= 2 sec typ., B= 250 - 500 ms, C= 250 ms, D= 150ms, E depends on data length, Max C+D+E = 2.9 - 3.7 sec, F ³ 200 ms.  
2) In a battery operated CPE, NW6006 may be enabled only after the end of ringing to conserve power.  
3) The microcontroller in the CPE powers down the NW6006 after CD goes inactive.  
4) The microcontroller times out if CD is not activated on the 2nd ring and puts the device into Power-down mode.  
5) FSK may be always enabled while the CPE is on-hook. To prevent the FSK demodulator from reacting to other inband signals such as speech, DT-AS or DTMT tones. The designer may  
choose to disable FSKduring the period that FSK signal is not expected.  
6) PWDN and FSKEN are internal signals decoded from Control Bits CB2-0.  
7) When CB0 is low, both DR and DCLK pins are unused.  
12  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
CPE mutes handset and  
disable keypad  
CPE unmutes handset and  
enable keypad  
CPE off-hook  
CPE sends  
ACK  
Note 2  
CAS  
Mark  
Message  
A/B wires  
Note 1  
A
B
C
D
E
F
G
Note 3  
PWDN  
Note7  
Note 5  
Note 6  
Note 4  
FSKEN  
Note7  
STD  
Hybrid  
DT-ASEN  
Note7  
CD  
DR  
Note8  
...  
DCLK  
Note8  
DATA  
Data  
Figure 12. Bellcore Off-hook Data Transmission Timing Diagram  
Notes:  
1) A= 75 - 85 ms, B= 0 -100 ms, C= 55 - 65 ms, D= 0 - 500 ms, E= 58 - 75ms, F depends on data length, G£ 50 ms.  
2) If AC power is not available, the designer may use the line power when the CPE goes off-hook and use battery power while on-hook. The CPE should also be CID (on-hook) capable .  
3) If the end office fails to send the FSK signal, the CPE should disable FSKEN and unmute the handset and enable the keypad after this interval.  
4) When FSK signal is not expected, the FSKEN should be set low to disable the FSK demodulator.  
5) FSKEN should be high as soon as the CPE has finished sending the acknowledgement signal ACK.  
6) FSKEN should be low when CD become inactive.  
7) PWDN, FSKEN and Hybrid DT-ASEN are internal signals decoded from Control Bits CB2-0.  
8) When CB0 is low, both DR and DCLK pins are unused.  
13  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
Line Reversal  
Alerting  
Ch. Seizure  
Mark  
Message  
Ring  
Signal  
A/B Wires  
A
B
C
D
E
F
G
Note 1  
Tip/Ring  
DT-ASEN  
Note 5  
PWDN  
Note 5  
STD  
15 ±1 ms  
Current Wetting Pulse  
50 - 150 ms  
<120 m A  
20 ±5 ms  
< 0.5 mA (optional)  
Zss  
TE DC load  
Note 2  
Note 3  
TE AC load  
Note 4  
FSKEN  
Note 5  
CD  
DR  
Note 6  
...  
...  
DCLK  
Note 6  
DATA  
..101010..  
Data  
Figure 13. BT Idle State (on-hook) Data Transmission Timing Diagram  
Notes:  
1) A³ 100ms, B=88 - 110 ms, C³ 45 ms (up to 5 sec), D= 80 -262 ms, E= 45 - 75 ms, F£ 2.5 sec (typ. 500 ms), G³ 200 ms.  
2) By choosing tGA=15 ms, tABS will be 15-25 ms (refer to Fig. 8). Current wetting pulse and AC/DC load should be applied right after the STD rising edge.  
3) AC and DC loads should be removed between 50-150 ms after the end of the FSK signal. The NW6006 may go to power down mode to save power.  
4) FSKEN should be set low to disable the FSK demodulator, when the FSK signal is not expected.  
5) Tip/Ring DT-ASEN, PWDN and FSKEN are internal signals decoded from Control Bits CB2-0.  
6) When CB0 is low, both DR and DCLK pins are unused.  
14  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
MAXIMUM RATING - Exceeding the following listed values may cause permanent damage.  
Power Supply Voltage: -0.3 V to 6 V  
Voltage on any pin other than supplies: GND - 0.3 V to VCC + 0.3 V  
Current at any pin other than supplies: £ 10 mA  
Storage Temperature: -65 °C to +150 °C  
RECOMMENDED OPERATING CONDITIONS  
Operating Temperature: -40 °C to +85 °C  
Power Supply Voltage: 3 V ± 10% or 5 V ± 10%  
Clock Frequency: 3.579545 MHz ± 0.1%  
Input Voltage: 0 V to VCC  
CRYSTAL SPECIFICATIONS  
Frequency: 3.579545 MHz  
Resonancy tolerance: ± 0.1%( -40°C to +85°C)  
Resonance mode: Parallel  
Load capacitance: 18 pF  
Maximum series resistance: 150 W  
Maximum drive level: 2 mW  
DC ELECTRICAL CHARACTERISTICS  
Parameter  
Pin  
Description  
Power Supply Standby  
Current  
Min  
Typ  
Max  
Units  
Test Conditions  
ICCS  
0.5  
15  
mA  
Test 1  
Operating Supply Current  
±
ICC  
VCC  
VCC = 5 V 10%  
Test 2  
2.5  
1.8  
3.8  
2.7  
mA  
mA  
VCC = 3 V ± 10%  
Schmitt Trigger Input High  
Threshold  
VT+  
0.5VCC  
0.7VCC  
V
Schmitt Trigger Input Low  
Threshold  
Schmitt Hysteresis  
VT-  
VHYS  
VIH  
DCLK  
0.3VCC  
0.2  
0.5VCC  
V
V
CB0  
CB1  
CB2  
CMOS Input High Voltage  
0.7VCC  
GND  
-0.8  
VCC  
V
VIL  
CMOS Input Low Voltage  
Output High Sourcing  
Current  
0.3VCC  
V
DCLK, DATA, EST  
IOH  
mA  
VOH=0.9VCC  
DR STD CD  
, ST/GT  
/
,
Test 1: All inputs are VCC/GND except for oscillator pins. No analog input. Output unloaded. NW6006 in power down mode.  
Test 2: All inputs are VCC/GND except for oscillator pins. No analog input. Ouput unloaded. FSK is enabled.  
15  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
DC ELECTRICAL CHARACTERISTICS (CONTINUED)  
Parameter  
Pin  
Description  
Min  
Typ  
Max  
Units  
Test Conditions  
DCLK, DATA  
Output Low Sinking  
Current  
DR STD CD  
mA  
IOL  
/
,
2
VOL = 0.1VCC  
EST, ST/GT  
IN1+, IN1-  
IN2+, IN2-  
DCLK  
m
A
Iin1  
Iin2  
Input Current  
Input Current  
1
Vin = VCC to GND  
mA  
10  
CB0, CB1, CB2  
mA  
V
W
k
IOZ1  
VREF  
RREF  
ST/GT  
Output High Impedance  
Output Voltage  
Output Resistance  
5
Vout = VCC to GND  
No Load  
0.5VCC-0.1  
0.5VCC+0.1  
2
VREF  
V
Comparator Threshold  
Voltage  
0.5VCC-0.05  
0.5VCC+0.05  
VTGT  
ST/GT  
AC ELECTRICAL CHARACTERISTICS  
DUAL TONE ALERT SIGNAL DETECTION  
Parameter  
FL  
Description  
Low Tone Frequency  
High Tone Frequency  
Min  
Typ  
2130  
2750  
Max  
Units  
Hz  
Hz  
Notes  
Nominal frequency  
Nominal frequency  
FH  
FDA  
FDR  
Frequency Deviation Accept  
Frequency Deviation Reject  
1.1%  
3.5%  
Within this range, tones are accepted.  
Outside this range, tones are rejected.  
dBV  
dBV  
SIGAC  
SIGRJ  
Accept Signal Level per tone  
-40  
-2  
Input op amp configured to 0 dB gain for  
5 V operation, gain for 3 V operation is  
TBD. Signal level is per tone.  
Reject Signal Level per tone  
-47  
7
±
±
(VCC = 5 V 10%, 3 V 10%)  
Positive and Negative Twist Accept #  
Signal to Noise Ratio ##  
TA  
SNR  
dB  
dB  
20  
STUTTER DIAL TONE SIGNAL DETECTION  
Parameter  
Description  
Min  
Typ  
350  
440  
Max  
Units  
Hz  
Hz  
Notes  
Nominal frequency  
Nominal frequency  
FL  
FH  
Low Tone Frequency  
High Tone Frequency  
Frequency Deviation Accept  
High Tone  
Low Tone  
Frequency Deviation Reject  
High Tone  
FDA  
FDR  
-7  
-9  
7
9
Hz  
Within this range, tones are accepted.  
Outside this range, tones are rejected.  
-13  
-11  
-31  
13  
11  
-12  
Low Tone  
SIGAC  
SIGRJ  
Accept Signal Level per tone  
Reject Signal Level per tone  
(VCC = 5 V ± 10%, 3 V ± 10%)  
Positive and Negative Twist Accept #  
Signal to Noise Ratio ##  
dBV  
dBV  
Input op amp configured to 0 dB gain for  
5 V operation, gain for 3 V operation is  
TBD. Signal level is per tone.  
-36  
6
TA  
SNR  
-6  
20  
dB  
dB  
# Twist = 20 |log ( fH amplitude / f amplitude )|.  
L
## Both tones have the same amplitude and at nominal frequencies. Band limited random noise 300-3400 Hz. Measurement valid only when tone is present.  
16  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
AC ELECTRICAL CHARACTERISTICS (CONTINUED)  
GAIN ADJUSTABLE OP AMP  
Parameter  
IIN  
Description  
Input Leakage Current  
Min  
Typ  
Max  
1
Units  
m
A
Test Conditions  
GND VIN VCC  
£
£
W
M
RIN  
Input Resistance  
10  
VOS  
Input Offset Voltage  
10  
mV  
dB  
dB  
dB  
MHz  
V
PSRR  
CMRR  
AVOL  
fC  
VO  
CL  
Power Supply Rejection Ratio  
Common Mode Rejection  
DC Open Loop Voltage Gain  
Unity Gain Bandwidth  
40  
30  
50  
0.3  
0.5  
1kHz ripple on VCC  
£
£
VCMmin VIN VCMmax  
³ W  
Load 100 k  
Output Voltage Swing  
VCC -0.5  
50  
Maximum Capacitive Load (GS)  
Maximum Resistive Load (GS)  
Common Mode Range Voltage  
pF  
W
k
RL  
VCM  
100  
1.0  
VCC-1.0  
FSK DETECTION  
Parameter  
Description  
Input Detection Level  
Reject Signal Level  
Min  
Typ  
Max  
Units  
Notes  
Production tested at VCC =3V 10%, or 5V  
10%. Both mark and space have the same  
±
ID  
-40  
-6.5  
dBV  
±
RS  
TR  
-48  
dBV  
amplitude.  
Transmission Rate  
Input Frequency Detection  
Bell 202 ‘1’ (mark)  
Input Frequency Detection  
Bell 202 ‘0’ (space)  
Input Frequency Detection  
ITU-T V.23 ‘1’ (mark)  
Input Frequency Detection  
ITU-T V.23 0 (space)  
Positive and Negative Twist Accept  
1188  
1188  
1200  
1200  
1212  
baud  
FMARK  
FSPACE  
FMARK  
1212  
2222  
Hz  
Hz  
Hz  
2178  
2200  
1300  
2100  
1280.5  
1319.5  
FSPACE  
TA  
2068.5  
-10  
2131.5  
10  
Hz  
dB  
Both mark and space have the same amplitude  
and at nominal frequencies. Band limited  
random noise: 200-3400 Hz. Present only when  
FSK signal is present. #  
SNR  
Signal to Noise Ratio  
20  
dB  
# BT band is 200-3400 Hz, while Bellcore band is 0-4 kHz.  
Notes:  
dBV = decibels above or below a reference voltage of 1 Vrms.  
17  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
AC TIMING CHARACTERISTICS  
POWER UP/DOWN AND FSK DETECTION  
Parameter  
Description  
Power Up Time  
Power Down Time  
Min  
Typ  
Max  
50  
1
Units  
ms  
ms  
Test Conditions  
t1  
t2  
t3  
t4  
t5  
CD  
CD  
25  
ms  
Input FSK to  
Input FSK to  
Hysteresis  
low delay  
high delay  
10  
10  
ms  
ms  
DUAL TONE ALERT SIGNAL  
Parameter  
Description  
Min  
Typ  
Max  
Units  
Test Conditions  
t6  
t7  
Alert Signal Present Detect Time  
Alert Signal Absent Detect Time  
4
0.1  
14  
8
ms  
ms  
Power down is  
enabled by  
Control Bits  
OSCOUT  
t1  
t2  
Figure 14. Power Up/Down Timing  
Tip/Ring  
FSK Signal  
CD  
t3  
t4  
Figure 15. FSK Detection Time  
Tip/Ring  
or Hybrid  
Alert Signal  
Receive Pair  
EST  
t6  
t7  
Figure 16. Dual Tone Alert Signal Detection Time  
18  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
AC TIMING CHARACTERISTICS (CONTINUED)  
SERIAL INTERFACE (MODE ‘1’)  
Parameter  
t11  
Description  
DCLK Cycle Time  
Min  
1
Typ  
Max  
Units  
m
s
Test Conditions  
m
s
m
s
ns  
ns  
ns  
ns  
t12  
t13  
t14  
t15  
DCLK High Time  
DCLK Low Time  
DCLK Rise Time  
DCLK Fall Time  
DCLK Low Setup to  
0.3  
0.3  
100  
100  
t16  
DR  
500  
500  
t17  
DR  
DCLK Low Hold Time after  
t13  
t12  
DCLK  
t14  
t15  
t11  
Figure 17. DCLK Timing in Mode ‘1’  
Nth byte  
(N+1)th byte  
Internal  
Demodulated Bit  
start  
b7  
b0  
b1  
b2  
b3  
b4  
b5  
b6  
b7  
stop  
start  
stop  
Stream  
note 1  
DR  
t16  
note 2  
t17  
DCLK  
DATA  
b1  
b0  
b7  
b0  
b2 b3 b4 b5 b6  
b7  
stop  
stop  
(N-1)th byte  
Nth byte  
Figure 18. Serial Data Interface Timing in MODE ‘1’  
Notes:  
1. DCLK clears DR.  
2. DR not cleared by DCLK, low for a maximum time of 1/2 bit width.  
19  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
AC TIMING CHARACTERISTICS (CONTINUED)  
SERIAL INTERFACE (MODE ‘0’)  
Parameter  
Description  
Min  
1188  
Typ  
1200  
1
Max  
1212  
5
200  
200  
Units  
Test Conditions  
DR  
t21  
t22  
t23  
Data Rate  
baud  
ms  
ns  
1
Input FSK to DATA Delay  
DATA Rise Time  
DATA Fall Time  
2
2
ns  
Test conditions:  
1. FSK input data at 1200 ± 12 buad.  
2. Load of 50 pF.  
DATA  
t22  
t23  
Figure 19. DATA Output Timing in Mode ‘0’  
Nth byte  
(N+1)th byte  
start  
0
stop start  
stop start  
TIP/RING  
DATA  
b7  
1
b0 b1 b2 b3 b4 b5 b6 b7  
1
0
b0 b1 b2 b3 b4 b5 b6 b7  
1
0
b0 b1  
t21  
Nth byte  
(N+1)th byte  
start  
start  
start  
b7  
b0 b1 b2 b3 b4 b5 b6 b7  
b0 b1 b2 b3 b4 b5 b6 b7  
b0
stop  
stop  
Figure 20. Serial Data Interface Timing in MODE ‘0’  
20  
NW6006 ENHANCED TYPE II CALLER ID DECODER  
WITH STUTTER DIAL TONE DETECTOR  
INDUSTRIAL TEMPERATURE RANGE  
STUTTER DIAL TONE SIGNAL  
Parameter  
t18  
Description  
Stutter Dial Tone Signal Present Detect  
Time  
Min  
Typ  
Max  
Units  
Test Conditions  
40  
50  
68  
ms  
Stutter Dial Tone Signal Absent Detect  
Time  
Stutter Dial Tone Signal Duration Time  
t19  
t20  
32  
64  
48  
52  
ms  
ms  
100  
108  
SDT signal 100 ms on, 100 ms off.  
Tip/Ring  
or Hybrid  
Receive Pair  
Dial Tone  
Signal  
t20  
STRDT  
t19  
t18  
Figure 21. Stutter Dial Tone Signal Detection Time  
Min.  
Max.  
Pulse Duration  
Min  
Maximum Dropout  
Span  
Figure 22. Valid DT-AS Pulses  
21  
PHYSICAL DIMENSIONS in Millimeters  
Symbol  
Dimension in MM  
Dimension in Inch  
Min  
2.35  
0.10  
0.33  
0.23  
7.40  
Max  
2.65  
0.30  
0.51  
0.32  
7.60  
Min  
Max  
A
A1  
B
C
E
e
0.093  
0.004  
0.013  
0.009  
0.291  
0.104  
0.012  
0.020  
0.013  
0.299  
1.27 BSC  
0.050 BSC  
H
h
L
q
10.00  
0.25  
0.40  
0
10.65  
0.75  
1.27  
8
0.394  
0.010  
0.016  
0
0.419  
0.029  
0.050  
8
D
12.60  
13.00  
-
-
Figure 23. NW6006-XS 20 Pin SOIC Package Diagram  
CORPORATE HEADQUARTERS  
for SALES:  
for Tech Support:  
2975 Stender Way  
Santa Clara, CA 95054  
800-345-7015 or 408-727-6116  
fax: 408-492-8674  
www.idt.com  
408-330-1552  
email: telecomhelp@idt.com  
22  
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